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authorJohn Fastabend <john.r.fastabend@intel.com>2011-02-23 00:58:19 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-03-12 07:12:54 -0500
commit17049d30c2dec6f26d6165cc135578f9e41d53d3 (patch)
treeb58a6c005d89c15a58213cc2e62e9d4de81d8c37 /drivers/net/ixgbe/ixgbe_dcb_nl.c
parent3b97fd695453ced96f22bdf1a84453f6744d25cc (diff)
ixgbe: IEEE 802.1Qaz, implement priority assignment table
This patch adds support to use the priority assignment table in the ieee_ets structure to map priorities to traffic classes. Previously ixgbe only supported a 1:1 mapping. Now we can enable and disable hardware DCB support when multiple traffic classes are actually being used. This allows the default case all priorities mapped to traffic class 0 to work in normal hardware mode and utilize the full packet buffer. This patch does not address putting the hardware in 4TC mode so packet buffer space may be underutilized in this case. A follow up patch can address this optimization. But at least we have the hooks to do this now. Also CEE will behave as it always has and map priorities 1:1 with traffic classes. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_dcb_nl.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index 8abef8d588fd..fec4c724c37a 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -416,6 +416,8 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
416 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) { 416 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
417 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS]; 417 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
418 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS]; 418 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
419 /* Priority to TC mapping in CEE case default to 1:1 */
420 u8 prio_tc[MAX_TRAFFIC_CLASS] = {0, 1, 2, 3, 4, 5, 6, 7};
419 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 421 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
420 422
421#ifdef CONFIG_FCOE 423#ifdef CONFIG_FCOE
@@ -437,7 +439,7 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
437 DCB_TX_CONFIG, prio_type); 439 DCB_TX_CONFIG, prio_type);
438 440
439 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max, 441 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
440 bwg_id, prio_type); 442 bwg_id, prio_type, prio_tc);
441 } 443 }
442 444
443 if (adapter->dcb_cfg.pfc_mode_enable) 445 if (adapter->dcb_cfg.pfc_mode_enable)
@@ -645,6 +647,7 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
645 __u8 prio_type[IEEE_8021QAZ_MAX_TCS]; 647 __u8 prio_type[IEEE_8021QAZ_MAX_TCS];
646 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN; 648 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
647 int i, err; 649 int i, err;
650 __u64 *p = (__u64 *) ets->prio_tc;
648 /* naively give each TC a bwg to map onto CEE hardware */ 651 /* naively give each TC a bwg to map onto CEE hardware */
649 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7}; 652 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
650 653
@@ -679,9 +682,14 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
679 } 682 }
680 } 683 }
681 684
685 if (*p)
686 ixgbe_dcbnl_set_state(dev, 1);
687 else
688 ixgbe_dcbnl_set_state(dev, 0);
689
682 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame); 690 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
683 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max, 691 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
684 bwg_id, prio_type); 692 bwg_id, prio_type, ets->prio_tc);
685 return err; 693 return err;
686} 694}
687 695