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authorPeter P Waskiewicz <peter.p.waskiewicz.jr@intel.com>2008-09-11 23:04:46 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-09-24 18:55:05 -0400
commitb46172402f39719e97b921cc3ca85141f3e8b1c2 (patch)
tree5dc5e2df7b0e08d3f6bc206594b835ae0d337b9d /drivers/net/ixgbe/ixgbe_82598.c
parent51ac6445b108abab5e5ebeb5e68665d4509a6f29 (diff)
ixgbe: Whitespace, copyright update and version number change patch
This patch cleans up a bit of whitespace issues with the driver, updates the copyright information, and bumps the version number up. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82598.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c58
1 files changed, 18 insertions, 40 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index a08a267f1667..7cddcfba809e 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation. 4 Copyright(c) 1999 - 2008 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -20,7 +20,6 @@
20 the file called "COPYING". 20 the file called "COPYING".
21 21
22 Contact Information: 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 25
@@ -42,33 +41,11 @@
42static s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw, 41static s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw,
43 ixgbe_link_speed *speed, 42 ixgbe_link_speed *speed,
44 bool *autoneg); 43 bool *autoneg);
45static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
46static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num);
47static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
48static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
49 ixgbe_link_speed *speed,
50 bool *link_up, bool link_up_wait_to_complete);
51static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
52 ixgbe_link_speed speed,
53 bool autoneg,
54 bool autoneg_wait_to_complete);
55static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw); 44static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
56static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, 45static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw,
57 ixgbe_link_speed speed, 46 ixgbe_link_speed speed,
58 bool autoneg, 47 bool autoneg,
59 bool autoneg_wait_to_complete); 48 bool autoneg_wait_to_complete);
60static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
61static s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
62static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
63static s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan,
64 u32 vind, bool vlan_on);
65static s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw);
66static s32 ixgbe_blink_led_stop_82598(struct ixgbe_hw *hw, u32 index);
67static s32 ixgbe_blink_led_start_82598(struct ixgbe_hw *hw, u32 index);
68static s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
69static s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
70static s32 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw);
71static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
72 49
73/** 50/**
74 */ 51 */
@@ -112,8 +89,8 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
112 * Determines the link capabilities by reading the AUTOC register. 89 * Determines the link capabilities by reading the AUTOC register.
113 **/ 90 **/
114static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw, 91static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
115 ixgbe_link_speed *speed, 92 ixgbe_link_speed *speed,
116 bool *autoneg) 93 bool *autoneg)
117{ 94{
118 s32 status = 0; 95 s32 status = 0;
119 s32 autoc_reg; 96 s32 autoc_reg;
@@ -180,8 +157,8 @@ s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw,
180 *autoneg = true; 157 *autoneg = true;
181 158
182 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, 159 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
183 IXGBE_MDIO_PMA_PMD_DEV_TYPE, 160 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
184 &speed_ability); 161 &speed_ability);
185 162
186 if (status == 0) { 163 if (status == 0) {
187 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G) 164 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
@@ -408,8 +385,9 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
408 * 385 *
409 * Reads the links register to determine if link is up and the current speed 386 * Reads the links register to determine if link is up and the current speed
410 **/ 387 **/
411static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 388static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
412 bool *link_up, bool link_up_wait_to_complete) 389 ixgbe_link_speed *speed, bool *link_up,
390 bool link_up_wait_to_complete)
413{ 391{
414 u32 links_reg; 392 u32 links_reg;
415 u32 i; 393 u32 i;
@@ -452,8 +430,8 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, ixgbe_link_speed *spe
452 * Set the link speed in the AUTOC register and restarts link. 430 * Set the link speed in the AUTOC register and restarts link.
453 **/ 431 **/
454static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, 432static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
455 ixgbe_link_speed speed, bool autoneg, 433 ixgbe_link_speed speed, bool autoneg,
456 bool autoneg_wait_to_complete) 434 bool autoneg_wait_to_complete)
457{ 435{
458 s32 status = 0; 436 s32 status = 0;
459 437
@@ -525,15 +503,15 @@ static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
525 * Sets the link speed in the AUTOC register in the MAC and restarts link. 503 * Sets the link speed in the AUTOC register in the MAC and restarts link.
526 **/ 504 **/
527static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, 505static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw,
528 ixgbe_link_speed speed, 506 ixgbe_link_speed speed,
529 bool autoneg, 507 bool autoneg,
530 bool autoneg_wait_to_complete) 508 bool autoneg_wait_to_complete)
531{ 509{
532 s32 status; 510 s32 status;
533 511
534 /* Setup the PHY according to input speed */ 512 /* Setup the PHY according to input speed */
535 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg, 513 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
536 autoneg_wait_to_complete); 514 autoneg_wait_to_complete);
537 515
538 /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */ 516 /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
539 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX); 517 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
@@ -653,7 +631,7 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
653 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); 631 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
654 } else { 632 } else {
655 hw->mac.link_attach_type = 633 hw->mac.link_attach_type =
656 (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE); 634 (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
657 hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK); 635 hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
658 hw->mac.link_settings_loaded = true; 636 hw->mac.link_settings_loaded = true;
659 } 637 }
@@ -715,7 +693,7 @@ static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
715 * Turn on/off specified VLAN in the VLAN filter table. 693 * Turn on/off specified VLAN in the VLAN filter table.
716 **/ 694 **/
717s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, 695s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,
718 bool vlan_on) 696 bool vlan_on)
719{ 697{
720 u32 regindex; 698 u32 regindex;
721 u32 bitindex; 699 u32 bitindex;
@@ -770,7 +748,7 @@ static s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw)
770 for (vlanbyte = 0; vlanbyte < 4; vlanbyte++) 748 for (vlanbyte = 0; vlanbyte < 4; vlanbyte++)
771 for (offset = 0; offset < hw->mac.vft_size; offset++) 749 for (offset = 0; offset < hw->mac.vft_size; offset++)
772 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), 750 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset),
773 0); 751 0);
774 752
775 return 0; 753 return 0;
776} 754}