diff options
author | Alexander Duyck <alexander.h.duyck@intel.com> | 2009-11-19 07:42:21 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-20 13:00:13 -0500 |
commit | 55cac248caa4a5f181a11cd2f269a672bef3d3b5 (patch) | |
tree | a4eec7f298d197646124346e5bb7cb9eb4de2586 /drivers/net/igb/igb_ethtool.c | |
parent | bb2ac47bcfd47ed9431ff1676ec8d79250c941c9 (diff) |
igb: Add full support for 82580 devices
This patch makes use of the 82580 PHY and MAC support added and adds a set
of supported device IDs for said hardware.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/igb_ethtool.c')
-rw-r--r-- | drivers/net/igb/igb_ethtool.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index 2e238bfa1f91..ac9d5272650d 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -881,6 +881,49 @@ struct igb_reg_test { | |||
881 | #define TABLE64_TEST_LO 5 | 881 | #define TABLE64_TEST_LO 5 |
882 | #define TABLE64_TEST_HI 6 | 882 | #define TABLE64_TEST_HI 6 |
883 | 883 | ||
884 | /* 82580 reg test */ | ||
885 | static struct igb_reg_test reg_test_82580[] = { | ||
886 | { E1000_FCAL, 0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
887 | { E1000_FCAH, 0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF }, | ||
888 | { E1000_FCT, 0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF }, | ||
889 | { E1000_VET, 0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
890 | { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
891 | { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
892 | { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF }, | ||
893 | { E1000_RDBAL(4), 0x40, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
894 | { E1000_RDBAH(4), 0x40, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
895 | { E1000_RDLEN(4), 0x40, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF }, | ||
896 | /* RDH is read-only for 82580, only test RDT. */ | ||
897 | { E1000_RDT(0), 0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
898 | { E1000_RDT(4), 0x40, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
899 | { E1000_FCRTH, 0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 }, | ||
900 | { E1000_FCTTV, 0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
901 | { E1000_TIPG, 0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF }, | ||
902 | { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
903 | { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
904 | { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF }, | ||
905 | { E1000_TDBAL(4), 0x40, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
906 | { E1000_TDBAH(4), 0x40, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
907 | { E1000_TDLEN(4), 0x40, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF }, | ||
908 | { E1000_TDT(0), 0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
909 | { E1000_TDT(4), 0x40, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
910 | { E1000_RCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 }, | ||
911 | { E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, | ||
912 | { E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF }, | ||
913 | { E1000_TCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 }, | ||
914 | { E1000_RA, 0, 16, TABLE64_TEST_LO, | ||
915 | 0xFFFFFFFF, 0xFFFFFFFF }, | ||
916 | { E1000_RA, 0, 16, TABLE64_TEST_HI, | ||
917 | 0x83FFFFFF, 0xFFFFFFFF }, | ||
918 | { E1000_RA2, 0, 8, TABLE64_TEST_LO, | ||
919 | 0xFFFFFFFF, 0xFFFFFFFF }, | ||
920 | { E1000_RA2, 0, 8, TABLE64_TEST_HI, | ||
921 | 0x83FFFFFF, 0xFFFFFFFF }, | ||
922 | { E1000_MTA, 0, 128, TABLE32_TEST, | ||
923 | 0xFFFFFFFF, 0xFFFFFFFF }, | ||
924 | { 0, 0, 0, 0 } | ||
925 | }; | ||
926 | |||
884 | /* 82576 reg test */ | 927 | /* 82576 reg test */ |
885 | static struct igb_reg_test reg_test_82576[] = { | 928 | static struct igb_reg_test reg_test_82576[] = { |
886 | { E1000_FCAL, 0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | 929 | { E1000_FCAL, 0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, |
@@ -1013,6 +1056,10 @@ static int igb_reg_test(struct igb_adapter *adapter, u64 *data) | |||
1013 | u32 i, toggle; | 1056 | u32 i, toggle; |
1014 | 1057 | ||
1015 | switch (adapter->hw.mac.type) { | 1058 | switch (adapter->hw.mac.type) { |
1059 | case e1000_82580: | ||
1060 | test = reg_test_82580; | ||
1061 | toggle = 0x7FEFF3FF; | ||
1062 | break; | ||
1016 | case e1000_82576: | 1063 | case e1000_82576: |
1017 | test = reg_test_82576; | 1064 | test = reg_test_82576; |
1018 | toggle = 0x7FFFF3FF; | 1065 | toggle = 0x7FFFF3FF; |
@@ -1167,6 +1214,9 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1167 | case e1000_82576: | 1214 | case e1000_82576: |
1168 | ics_mask = 0x77D4FBFD; | 1215 | ics_mask = 0x77D4FBFD; |
1169 | break; | 1216 | break; |
1217 | case e1000_82580: | ||
1218 | ics_mask = 0x77DCFED5; | ||
1219 | break; | ||
1170 | default: | 1220 | default: |
1171 | ics_mask = 0x7FFFFFFF; | 1221 | ics_mask = 0x7FFFFFFF; |
1172 | break; | 1222 | break; |
@@ -1338,6 +1388,9 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter) | |||
1338 | igb_write_phy_reg(hw, PHY_CONTROL, 0x9140); | 1388 | igb_write_phy_reg(hw, PHY_CONTROL, 0x9140); |
1339 | /* autoneg off */ | 1389 | /* autoneg off */ |
1340 | igb_write_phy_reg(hw, PHY_CONTROL, 0x8140); | 1390 | igb_write_phy_reg(hw, PHY_CONTROL, 0x8140); |
1391 | } else if (hw->phy.type == e1000_phy_82580) { | ||
1392 | /* enable MII loopback */ | ||
1393 | igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041); | ||
1341 | } | 1394 | } |
1342 | 1395 | ||
1343 | ctrl_reg = rd32(E1000_CTRL); | 1396 | ctrl_reg = rd32(E1000_CTRL); |