diff options
author | Carolyn Wyborny <carolyn.wyborny@intel.com> | 2011-05-24 02:52:51 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-07-11 21:43:00 -0400 |
commit | 2c670b5bd794ef93c81bf8797b7d6393c8453fc6 (patch) | |
tree | 909c57569fa2bdc049c049760dda8e713d603250 /drivers/net/igb/e1000_defines.h | |
parent | 4297f99b846942c6068f4ec80585c05ac94e612e (diff) |
igb: Add support of SerDes Forced mode for certain hardware
This patch changes the serdes link code to support a forced mode for
some hardware, based on bit set in EEPROM.
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/igb/e1000_defines.h')
-rw-r--r-- | drivers/net/igb/e1000_defines.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index 446eb5cb25e1..2cd4082c86ca 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -437,6 +437,7 @@ | |||
437 | #define E1000_RAH_POOL_1 0x00040000 | 437 | #define E1000_RAH_POOL_1 0x00040000 |
438 | 438 | ||
439 | /* Error Codes */ | 439 | /* Error Codes */ |
440 | #define E1000_SUCCESS 0 | ||
440 | #define E1000_ERR_NVM 1 | 441 | #define E1000_ERR_NVM 1 |
441 | #define E1000_ERR_PHY 2 | 442 | #define E1000_ERR_PHY 2 |
442 | #define E1000_ERR_CONFIG 3 | 443 | #define E1000_ERR_CONFIG 3 |
@@ -587,8 +588,8 @@ | |||
587 | #define E1000_NVM_POLL_READ 0 /* Flag for polling for read complete */ | 588 | #define E1000_NVM_POLL_READ 0 /* Flag for polling for read complete */ |
588 | 589 | ||
589 | /* NVM Word Offsets */ | 590 | /* NVM Word Offsets */ |
590 | #define NVM_ID_LED_SETTINGS 0x0004 | 591 | #define NVM_COMPAT 0x0003 |
591 | /* For SERDES output amplitude adjustment. */ | 592 | #define NVM_ID_LED_SETTINGS 0x0004 /* SERDES output amplitude */ |
592 | #define NVM_INIT_CONTROL2_REG 0x000F | 593 | #define NVM_INIT_CONTROL2_REG 0x000F |
593 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 | 594 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 |
594 | #define NVM_INIT_CONTROL3_PORT_A 0x0024 | 595 | #define NVM_INIT_CONTROL3_PORT_A 0x0024 |