diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 13:51:38 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 13:51:38 -0400 |
commit | f470f8d4e702593ee1d0852871ad80373bce707b (patch) | |
tree | 85a67e65c5e5b9777639bd8f4c763a4cf8787e0e /drivers/net/ethernet | |
parent | dc47d3810cdcb4f32bfa31d50f26af97aced0638 (diff) | |
parent | 504255f8d0480cf293962adf4bc3aecac645ae71 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (62 commits)
mlx4_core: Deprecate log_num_vlan module param
IB/mlx4: Don't set VLAN in IBoE WQEs' control segment
IB/mlx4: Enable 4K mtu for IBoE
RDMA/cxgb4: Mark QP in error before disabling the queue in firmware
RDMA/cxgb4: Serialize calls to CQ's comp_handler
RDMA/cxgb3: Serialize calls to CQ's comp_handler
IB/qib: Fix issue with link states and QSFP cables
IB/mlx4: Configure extended active speeds
mlx4_core: Add extended port capabilities support
IB/qib: Hold links until tuning data is available
IB/qib: Clean up checkpatch issue
IB/qib: Remove s_lock around header validation
IB/qib: Precompute timeout jiffies to optimize latency
IB/qib: Use RCU for qpn lookup
IB/qib: Eliminate divide/mod in converting idx to egr buf pointer
IB/qib: Decode path MTU optimization
IB/qib: Optimize RC/UC code by IB operation
IPoIB: Use the right function to do DMA unmap pages
RDMA/cxgb4: Use correct QID in insert_recv_cqe()
RDMA/cxgb4: Make sure flush CQ entries are collected on connection close
...
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/eq.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw.c | 6 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw.h | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/main.c | 36 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/mlx4.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/mr.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/pd.c | 30 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/port.c | 72 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/qp.c | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/srq.c | 20 |
10 files changed, 147 insertions, 30 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c index 1ad1f6029af8..869a2c220a7b 100644 --- a/drivers/net/ethernet/mellanox/mlx4/eq.c +++ b/drivers/net/ethernet/mellanox/mlx4/eq.c | |||
@@ -484,7 +484,7 @@ static void mlx4_free_eq(struct mlx4_dev *dev, | |||
484 | 484 | ||
485 | mlx4_mtt_cleanup(dev, &eq->mtt); | 485 | mlx4_mtt_cleanup(dev, &eq->mtt); |
486 | for (i = 0; i < npages; ++i) | 486 | for (i = 0; i < npages; ++i) |
487 | pci_free_consistent(dev->pdev, PAGE_SIZE, | 487 | dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, |
488 | eq->page_list[i].buf, | 488 | eq->page_list[i].buf, |
489 | eq->page_list[i].map); | 489 | eq->page_list[i].map); |
490 | 490 | ||
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c index ed452ddfe342..abdfbacab4a6 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw.c +++ b/drivers/net/ethernet/mellanox/mlx4/fw.c | |||
@@ -205,6 +205,8 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
205 | #define QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63 | 205 | #define QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63 |
206 | #define QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64 | 206 | #define QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64 |
207 | #define QUERY_DEV_CAP_MAX_PD_OFFSET 0x65 | 207 | #define QUERY_DEV_CAP_MAX_PD_OFFSET 0x65 |
208 | #define QUERY_DEV_CAP_RSVD_XRC_OFFSET 0x66 | ||
209 | #define QUERY_DEV_CAP_MAX_XRC_OFFSET 0x67 | ||
208 | #define QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68 | 210 | #define QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68 |
209 | #define QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80 | 211 | #define QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80 |
210 | #define QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82 | 212 | #define QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82 |
@@ -319,6 +321,10 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
319 | dev_cap->reserved_pds = field >> 4; | 321 | dev_cap->reserved_pds = field >> 4; |
320 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); | 322 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); |
321 | dev_cap->max_pds = 1 << (field & 0x3f); | 323 | dev_cap->max_pds = 1 << (field & 0x3f); |
324 | MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_XRC_OFFSET); | ||
325 | dev_cap->reserved_xrcds = field >> 4; | ||
326 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); | ||
327 | dev_cap->max_xrcds = 1 << (field & 0x1f); | ||
322 | 328 | ||
323 | MLX4_GET(size, outbox, QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET); | 329 | MLX4_GET(size, outbox, QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET); |
324 | dev_cap->rdmarc_entry_sz = size; | 330 | dev_cap->rdmarc_entry_sz = size; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h index 1e8ecc3708e2..bf5ec2286528 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw.h +++ b/drivers/net/ethernet/mellanox/mlx4/fw.h | |||
@@ -93,6 +93,8 @@ struct mlx4_dev_cap { | |||
93 | int max_mcgs; | 93 | int max_mcgs; |
94 | int reserved_pds; | 94 | int reserved_pds; |
95 | int max_pds; | 95 | int max_pds; |
96 | int reserved_xrcds; | ||
97 | int max_xrcds; | ||
96 | int qpc_entry_sz; | 98 | int qpc_entry_sz; |
97 | int rdmarc_entry_sz; | 99 | int rdmarc_entry_sz; |
98 | int altc_entry_sz; | 100 | int altc_entry_sz; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c index f0ee35df4dd7..94bbc85a532d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/main.c +++ b/drivers/net/ethernet/mellanox/mlx4/main.c | |||
@@ -96,6 +96,8 @@ MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)"); | |||
96 | static int log_num_vlan; | 96 | static int log_num_vlan; |
97 | module_param_named(log_num_vlan, log_num_vlan, int, 0444); | 97 | module_param_named(log_num_vlan, log_num_vlan, int, 0444); |
98 | MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)"); | 98 | MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)"); |
99 | /* Log2 max number of VLANs per ETH port (0-7) */ | ||
100 | #define MLX4_LOG_NUM_VLANS 7 | ||
99 | 101 | ||
100 | static int use_prio; | 102 | static int use_prio; |
101 | module_param_named(use_prio, use_prio, bool, 0444); | 103 | module_param_named(use_prio, use_prio, bool, 0444); |
@@ -220,6 +222,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
220 | dev->caps.reserved_mrws = dev_cap->reserved_mrws; | 222 | dev->caps.reserved_mrws = dev_cap->reserved_mrws; |
221 | dev->caps.reserved_uars = dev_cap->reserved_uars; | 223 | dev->caps.reserved_uars = dev_cap->reserved_uars; |
222 | dev->caps.reserved_pds = dev_cap->reserved_pds; | 224 | dev->caps.reserved_pds = dev_cap->reserved_pds; |
225 | dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? | ||
226 | dev_cap->reserved_xrcds : 0; | ||
227 | dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? | ||
228 | dev_cap->max_xrcds : 0; | ||
223 | dev->caps.mtt_entry_sz = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; | 229 | dev->caps.mtt_entry_sz = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; |
224 | dev->caps.max_msg_sz = dev_cap->max_msg_sz; | 230 | dev->caps.max_msg_sz = dev_cap->max_msg_sz; |
225 | dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); | 231 | dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); |
@@ -230,7 +236,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
230 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; | 236 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; |
231 | 237 | ||
232 | dev->caps.log_num_macs = log_num_mac; | 238 | dev->caps.log_num_macs = log_num_mac; |
233 | dev->caps.log_num_vlans = log_num_vlan; | 239 | dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; |
234 | dev->caps.log_num_prios = use_prio ? 3 : 0; | 240 | dev->caps.log_num_prios = use_prio ? 3 : 0; |
235 | 241 | ||
236 | for (i = 1; i <= dev->caps.num_ports; ++i) { | 242 | for (i = 1; i <= dev->caps.num_ports; ++i) { |
@@ -912,11 +918,18 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) | |||
912 | goto err_kar_unmap; | 918 | goto err_kar_unmap; |
913 | } | 919 | } |
914 | 920 | ||
921 | err = mlx4_init_xrcd_table(dev); | ||
922 | if (err) { | ||
923 | mlx4_err(dev, "Failed to initialize " | ||
924 | "reliable connection domain table, aborting.\n"); | ||
925 | goto err_pd_table_free; | ||
926 | } | ||
927 | |||
915 | err = mlx4_init_mr_table(dev); | 928 | err = mlx4_init_mr_table(dev); |
916 | if (err) { | 929 | if (err) { |
917 | mlx4_err(dev, "Failed to initialize " | 930 | mlx4_err(dev, "Failed to initialize " |
918 | "memory region table, aborting.\n"); | 931 | "memory region table, aborting.\n"); |
919 | goto err_pd_table_free; | 932 | goto err_xrcd_table_free; |
920 | } | 933 | } |
921 | 934 | ||
922 | err = mlx4_init_eq_table(dev); | 935 | err = mlx4_init_eq_table(dev); |
@@ -998,6 +1011,13 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) | |||
998 | "ib capabilities (%d). Continuing with " | 1011 | "ib capabilities (%d). Continuing with " |
999 | "caps = 0\n", port, err); | 1012 | "caps = 0\n", port, err); |
1000 | dev->caps.ib_port_def_cap[port] = ib_port_default_caps; | 1013 | dev->caps.ib_port_def_cap[port] = ib_port_default_caps; |
1014 | |||
1015 | err = mlx4_check_ext_port_caps(dev, port); | ||
1016 | if (err) | ||
1017 | mlx4_warn(dev, "failed to get port %d extended " | ||
1018 | "port capabilities support info (%d)." | ||
1019 | " Assuming not supported\n", port, err); | ||
1020 | |||
1001 | err = mlx4_SET_PORT(dev, port); | 1021 | err = mlx4_SET_PORT(dev, port); |
1002 | if (err) { | 1022 | if (err) { |
1003 | mlx4_err(dev, "Failed to set port %d, aborting\n", | 1023 | mlx4_err(dev, "Failed to set port %d, aborting\n", |
@@ -1033,6 +1053,9 @@ err_eq_table_free: | |||
1033 | err_mr_table_free: | 1053 | err_mr_table_free: |
1034 | mlx4_cleanup_mr_table(dev); | 1054 | mlx4_cleanup_mr_table(dev); |
1035 | 1055 | ||
1056 | err_xrcd_table_free: | ||
1057 | mlx4_cleanup_xrcd_table(dev); | ||
1058 | |||
1036 | err_pd_table_free: | 1059 | err_pd_table_free: |
1037 | mlx4_cleanup_pd_table(dev); | 1060 | mlx4_cleanup_pd_table(dev); |
1038 | 1061 | ||
@@ -1355,6 +1378,7 @@ err_port: | |||
1355 | mlx4_cmd_use_polling(dev); | 1378 | mlx4_cmd_use_polling(dev); |
1356 | mlx4_cleanup_eq_table(dev); | 1379 | mlx4_cleanup_eq_table(dev); |
1357 | mlx4_cleanup_mr_table(dev); | 1380 | mlx4_cleanup_mr_table(dev); |
1381 | mlx4_cleanup_xrcd_table(dev); | ||
1358 | mlx4_cleanup_pd_table(dev); | 1382 | mlx4_cleanup_pd_table(dev); |
1359 | mlx4_cleanup_uar_table(dev); | 1383 | mlx4_cleanup_uar_table(dev); |
1360 | 1384 | ||
@@ -1416,6 +1440,7 @@ static void mlx4_remove_one(struct pci_dev *pdev) | |||
1416 | mlx4_cmd_use_polling(dev); | 1440 | mlx4_cmd_use_polling(dev); |
1417 | mlx4_cleanup_eq_table(dev); | 1441 | mlx4_cleanup_eq_table(dev); |
1418 | mlx4_cleanup_mr_table(dev); | 1442 | mlx4_cleanup_mr_table(dev); |
1443 | mlx4_cleanup_xrcd_table(dev); | ||
1419 | mlx4_cleanup_pd_table(dev); | 1444 | mlx4_cleanup_pd_table(dev); |
1420 | 1445 | ||
1421 | iounmap(priv->kar); | 1446 | iounmap(priv->kar); |
@@ -1489,10 +1514,9 @@ static int __init mlx4_verify_params(void) | |||
1489 | return -1; | 1514 | return -1; |
1490 | } | 1515 | } |
1491 | 1516 | ||
1492 | if ((log_num_vlan < 0) || (log_num_vlan > 7)) { | 1517 | if (log_num_vlan != 0) |
1493 | pr_warning("mlx4_core: bad num_vlan: %d\n", log_num_vlan); | 1518 | pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n", |
1494 | return -1; | 1519 | MLX4_LOG_NUM_VLANS); |
1495 | } | ||
1496 | 1520 | ||
1497 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { | 1521 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { |
1498 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); | 1522 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); |
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h index a2fcd8402d37..5dfa68ffc11c 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h | |||
@@ -335,6 +335,7 @@ struct mlx4_priv { | |||
335 | struct mlx4_cmd cmd; | 335 | struct mlx4_cmd cmd; |
336 | 336 | ||
337 | struct mlx4_bitmap pd_bitmap; | 337 | struct mlx4_bitmap pd_bitmap; |
338 | struct mlx4_bitmap xrcd_bitmap; | ||
338 | struct mlx4_uar_table uar_table; | 339 | struct mlx4_uar_table uar_table; |
339 | struct mlx4_mr_table mr_table; | 340 | struct mlx4_mr_table mr_table; |
340 | struct mlx4_cq_table cq_table; | 341 | struct mlx4_cq_table cq_table; |
@@ -384,6 +385,7 @@ int mlx4_alloc_eq_table(struct mlx4_dev *dev); | |||
384 | void mlx4_free_eq_table(struct mlx4_dev *dev); | 385 | void mlx4_free_eq_table(struct mlx4_dev *dev); |
385 | 386 | ||
386 | int mlx4_init_pd_table(struct mlx4_dev *dev); | 387 | int mlx4_init_pd_table(struct mlx4_dev *dev); |
388 | int mlx4_init_xrcd_table(struct mlx4_dev *dev); | ||
387 | int mlx4_init_uar_table(struct mlx4_dev *dev); | 389 | int mlx4_init_uar_table(struct mlx4_dev *dev); |
388 | int mlx4_init_mr_table(struct mlx4_dev *dev); | 390 | int mlx4_init_mr_table(struct mlx4_dev *dev); |
389 | int mlx4_init_eq_table(struct mlx4_dev *dev); | 391 | int mlx4_init_eq_table(struct mlx4_dev *dev); |
@@ -393,6 +395,7 @@ int mlx4_init_srq_table(struct mlx4_dev *dev); | |||
393 | int mlx4_init_mcg_table(struct mlx4_dev *dev); | 395 | int mlx4_init_mcg_table(struct mlx4_dev *dev); |
394 | 396 | ||
395 | void mlx4_cleanup_pd_table(struct mlx4_dev *dev); | 397 | void mlx4_cleanup_pd_table(struct mlx4_dev *dev); |
398 | void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); | ||
396 | void mlx4_cleanup_uar_table(struct mlx4_dev *dev); | 399 | void mlx4_cleanup_uar_table(struct mlx4_dev *dev); |
397 | void mlx4_cleanup_mr_table(struct mlx4_dev *dev); | 400 | void mlx4_cleanup_mr_table(struct mlx4_dev *dev); |
398 | void mlx4_cleanup_eq_table(struct mlx4_dev *dev); | 401 | void mlx4_cleanup_eq_table(struct mlx4_dev *dev); |
@@ -450,6 +453,7 @@ void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); | |||
450 | 453 | ||
451 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port); | 454 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port); |
452 | int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); | 455 | int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); |
456 | int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port); | ||
453 | 457 | ||
454 | int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | 458 | int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
455 | enum mlx4_protocol prot, enum mlx4_steer_type steer); | 459 | enum mlx4_protocol prot, enum mlx4_steer_type steer); |
diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c index 9c188bdd7f4f..ab639cfef78e 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mr.c +++ b/drivers/net/ethernet/mellanox/mlx4/mr.c | |||
@@ -139,7 +139,7 @@ static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order) | |||
139 | 139 | ||
140 | buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), | 140 | buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), |
141 | GFP_KERNEL); | 141 | GFP_KERNEL); |
142 | buddy->num_free = kzalloc((buddy->max_order + 1) * sizeof (int *), | 142 | buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, |
143 | GFP_KERNEL); | 143 | GFP_KERNEL); |
144 | if (!buddy->bits || !buddy->num_free) | 144 | if (!buddy->bits || !buddy->num_free) |
145 | goto err_out; | 145 | goto err_out; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/pd.c b/drivers/net/ethernet/mellanox/mlx4/pd.c index 1286b886dcea..3736163e30e9 100644 --- a/drivers/net/ethernet/mellanox/mlx4/pd.c +++ b/drivers/net/ethernet/mellanox/mlx4/pd.c | |||
@@ -61,6 +61,24 @@ void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn) | |||
61 | } | 61 | } |
62 | EXPORT_SYMBOL_GPL(mlx4_pd_free); | 62 | EXPORT_SYMBOL_GPL(mlx4_pd_free); |
63 | 63 | ||
64 | int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn) | ||
65 | { | ||
66 | struct mlx4_priv *priv = mlx4_priv(dev); | ||
67 | |||
68 | *xrcdn = mlx4_bitmap_alloc(&priv->xrcd_bitmap); | ||
69 | if (*xrcdn == -1) | ||
70 | return -ENOMEM; | ||
71 | |||
72 | return 0; | ||
73 | } | ||
74 | EXPORT_SYMBOL_GPL(mlx4_xrcd_alloc); | ||
75 | |||
76 | void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) | ||
77 | { | ||
78 | mlx4_bitmap_free(&mlx4_priv(dev)->xrcd_bitmap, xrcdn); | ||
79 | } | ||
80 | EXPORT_SYMBOL_GPL(mlx4_xrcd_free); | ||
81 | |||
64 | int mlx4_init_pd_table(struct mlx4_dev *dev) | 82 | int mlx4_init_pd_table(struct mlx4_dev *dev) |
65 | { | 83 | { |
66 | struct mlx4_priv *priv = mlx4_priv(dev); | 84 | struct mlx4_priv *priv = mlx4_priv(dev); |
@@ -74,6 +92,18 @@ void mlx4_cleanup_pd_table(struct mlx4_dev *dev) | |||
74 | mlx4_bitmap_cleanup(&mlx4_priv(dev)->pd_bitmap); | 92 | mlx4_bitmap_cleanup(&mlx4_priv(dev)->pd_bitmap); |
75 | } | 93 | } |
76 | 94 | ||
95 | int mlx4_init_xrcd_table(struct mlx4_dev *dev) | ||
96 | { | ||
97 | struct mlx4_priv *priv = mlx4_priv(dev); | ||
98 | |||
99 | return mlx4_bitmap_init(&priv->xrcd_bitmap, (1 << 16), | ||
100 | (1 << 16) - 1, dev->caps.reserved_xrcds + 1, 0); | ||
101 | } | ||
102 | |||
103 | void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev) | ||
104 | { | ||
105 | mlx4_bitmap_cleanup(&mlx4_priv(dev)->xrcd_bitmap); | ||
106 | } | ||
77 | 107 | ||
78 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) | 108 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) |
79 | { | 109 | { |
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c index 163a314c148f..a44f080fdfe5 100644 --- a/drivers/net/ethernet/mellanox/mlx4/port.c +++ b/drivers/net/ethernet/mellanox/mlx4/port.c | |||
@@ -148,22 +148,26 @@ int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn, u8 wrap) | |||
148 | 148 | ||
149 | if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) { | 149 | if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) { |
150 | err = mlx4_uc_steer_add(dev, port, mac, qpn, 1); | 150 | err = mlx4_uc_steer_add(dev, port, mac, qpn, 1); |
151 | if (!err) { | 151 | if (err) |
152 | entry = kmalloc(sizeof *entry, GFP_KERNEL); | ||
153 | if (!entry) { | ||
154 | mlx4_uc_steer_release(dev, port, mac, *qpn, 1); | ||
155 | return -ENOMEM; | ||
156 | } | ||
157 | entry->mac = mac; | ||
158 | err = radix_tree_insert(&info->mac_tree, *qpn, entry); | ||
159 | if (err) { | ||
160 | mlx4_uc_steer_release(dev, port, mac, *qpn, 1); | ||
161 | return err; | ||
162 | } | ||
163 | } else | ||
164 | return err; | 152 | return err; |
153 | |||
154 | entry = kmalloc(sizeof *entry, GFP_KERNEL); | ||
155 | if (!entry) { | ||
156 | mlx4_uc_steer_release(dev, port, mac, *qpn, 1); | ||
157 | return -ENOMEM; | ||
158 | } | ||
159 | |||
160 | entry->mac = mac; | ||
161 | err = radix_tree_insert(&info->mac_tree, *qpn, entry); | ||
162 | if (err) { | ||
163 | kfree(entry); | ||
164 | mlx4_uc_steer_release(dev, port, mac, *qpn, 1); | ||
165 | return err; | ||
166 | } | ||
165 | } | 167 | } |
168 | |||
166 | mlx4_dbg(dev, "Registering MAC: 0x%llx\n", (unsigned long long) mac); | 169 | mlx4_dbg(dev, "Registering MAC: 0x%llx\n", (unsigned long long) mac); |
170 | |||
167 | mutex_lock(&table->mutex); | 171 | mutex_lock(&table->mutex); |
168 | for (i = 0; i < MLX4_MAX_MAC_NUM - 1; i++) { | 172 | for (i = 0; i < MLX4_MAX_MAC_NUM - 1; i++) { |
169 | if (free < 0 && !table->refs[i]) { | 173 | if (free < 0 && !table->refs[i]) { |
@@ -465,6 +469,48 @@ int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) | |||
465 | return err; | 469 | return err; |
466 | } | 470 | } |
467 | 471 | ||
472 | int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port) | ||
473 | { | ||
474 | struct mlx4_cmd_mailbox *inmailbox, *outmailbox; | ||
475 | u8 *inbuf, *outbuf; | ||
476 | int err, packet_error; | ||
477 | |||
478 | inmailbox = mlx4_alloc_cmd_mailbox(dev); | ||
479 | if (IS_ERR(inmailbox)) | ||
480 | return PTR_ERR(inmailbox); | ||
481 | |||
482 | outmailbox = mlx4_alloc_cmd_mailbox(dev); | ||
483 | if (IS_ERR(outmailbox)) { | ||
484 | mlx4_free_cmd_mailbox(dev, inmailbox); | ||
485 | return PTR_ERR(outmailbox); | ||
486 | } | ||
487 | |||
488 | inbuf = inmailbox->buf; | ||
489 | outbuf = outmailbox->buf; | ||
490 | memset(inbuf, 0, 256); | ||
491 | memset(outbuf, 0, 256); | ||
492 | inbuf[0] = 1; | ||
493 | inbuf[1] = 1; | ||
494 | inbuf[2] = 1; | ||
495 | inbuf[3] = 1; | ||
496 | |||
497 | *(__be16 *) (&inbuf[16]) = MLX4_ATTR_EXTENDED_PORT_INFO; | ||
498 | *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); | ||
499 | |||
500 | err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, | ||
501 | MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C); | ||
502 | |||
503 | packet_error = be16_to_cpu(*(__be16 *) (outbuf + 4)); | ||
504 | |||
505 | dev->caps.ext_port_cap[port] = (!err && !packet_error) ? | ||
506 | MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO | ||
507 | : 0; | ||
508 | |||
509 | mlx4_free_cmd_mailbox(dev, inmailbox); | ||
510 | mlx4_free_cmd_mailbox(dev, outmailbox); | ||
511 | return err; | ||
512 | } | ||
513 | |||
468 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port) | 514 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port) |
469 | { | 515 | { |
470 | struct mlx4_cmd_mailbox *mailbox; | 516 | struct mlx4_cmd_mailbox *mailbox; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/qp.c b/drivers/net/ethernet/mellanox/mlx4/qp.c index ec9350e5f21a..51c53898c35f 100644 --- a/drivers/net/ethernet/mellanox/mlx4/qp.c +++ b/drivers/net/ethernet/mellanox/mlx4/qp.c | |||
@@ -280,6 +280,9 @@ int mlx4_init_qp_table(struct mlx4_dev *dev) | |||
280 | * We reserve 2 extra QPs per port for the special QPs. The | 280 | * We reserve 2 extra QPs per port for the special QPs. The |
281 | * block of special QPs must be aligned to a multiple of 8, so | 281 | * block of special QPs must be aligned to a multiple of 8, so |
282 | * round up. | 282 | * round up. |
283 | * | ||
284 | * We also reserve the MSB of the 24-bit QP number to indicate | ||
285 | * that a QP is an XRC QP. | ||
283 | */ | 286 | */ |
284 | dev->caps.sqp_start = | 287 | dev->caps.sqp_start = |
285 | ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 8); | 288 | ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 8); |
diff --git a/drivers/net/ethernet/mellanox/mlx4/srq.c b/drivers/net/ethernet/mellanox/mlx4/srq.c index 3b07b80a0456..a20b141dbb5c 100644 --- a/drivers/net/ethernet/mellanox/mlx4/srq.c +++ b/drivers/net/ethernet/mellanox/mlx4/srq.c | |||
@@ -40,20 +40,20 @@ | |||
40 | struct mlx4_srq_context { | 40 | struct mlx4_srq_context { |
41 | __be32 state_logsize_srqn; | 41 | __be32 state_logsize_srqn; |
42 | u8 logstride; | 42 | u8 logstride; |
43 | u8 reserved1[3]; | 43 | u8 reserved1; |
44 | u8 pg_offset; | 44 | __be16 xrcd; |
45 | u8 reserved2[3]; | 45 | __be32 pg_offset_cqn; |
46 | u32 reserved3; | 46 | u32 reserved2; |
47 | u8 log_page_size; | 47 | u8 log_page_size; |
48 | u8 reserved4[2]; | 48 | u8 reserved3[2]; |
49 | u8 mtt_base_addr_h; | 49 | u8 mtt_base_addr_h; |
50 | __be32 mtt_base_addr_l; | 50 | __be32 mtt_base_addr_l; |
51 | __be32 pd; | 51 | __be32 pd; |
52 | __be16 limit_watermark; | 52 | __be16 limit_watermark; |
53 | __be16 wqe_cnt; | 53 | __be16 wqe_cnt; |
54 | u16 reserved5; | 54 | u16 reserved4; |
55 | __be16 wqe_counter; | 55 | __be16 wqe_counter; |
56 | u32 reserved6; | 56 | u32 reserved5; |
57 | __be64 db_rec_addr; | 57 | __be64 db_rec_addr; |
58 | }; | 58 | }; |
59 | 59 | ||
@@ -109,8 +109,8 @@ static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox | |||
109 | MLX4_CMD_TIME_CLASS_A); | 109 | MLX4_CMD_TIME_CLASS_A); |
110 | } | 110 | } |
111 | 111 | ||
112 | int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, | 112 | int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd, |
113 | u64 db_rec, struct mlx4_srq *srq) | 113 | struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq) |
114 | { | 114 | { |
115 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; | 115 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; |
116 | struct mlx4_cmd_mailbox *mailbox; | 116 | struct mlx4_cmd_mailbox *mailbox; |
@@ -148,6 +148,8 @@ int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, | |||
148 | srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | | 148 | srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | |
149 | srq->srqn); | 149 | srq->srqn); |
150 | srq_context->logstride = srq->wqe_shift - 4; | 150 | srq_context->logstride = srq->wqe_shift - 4; |
151 | srq_context->xrcd = cpu_to_be16(xrcd); | ||
152 | srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff); | ||
151 | srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; | 153 | srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; |
152 | 154 | ||
153 | mtt_addr = mlx4_mtt_addr(dev, mtt); | 155 | mtt_addr = mlx4_mtt_addr(dev, mtt); |