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authorYanir Lubetkin <yanirx.lubetkin@intel.com>2015-02-28 05:09:34 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-03-06 05:47:07 -0500
commit9d17ce493a3ef1b140a4c831ba72fb435576c75a (patch)
tree623ae9ff63166b21c49b06ca3c71c980fbe9bb17 /drivers/net/ethernet
parent23375a0fd549aa0a8c96b9f56a0b8120ae1389dd (diff)
e1000e: fix obscure comments
The interface to the device flash was modified in i219 and later HW. This patch better describes the change and the impact on the driver. CC: John W Linville <linville@tuxdriver.com> Reported-by: John W Linville <linville@tuxdriver.com> Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 7523f510c7e4..9d81c0317433 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -603,12 +603,15 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
603 u16 i; 603 u16 i;
604 u32 nvm_size; 604 u32 nvm_size;
605 605
606 /* Can't read flash registers if the register set isn't mapped. */
607 nvm->type = e1000_nvm_flash_sw; 606 nvm->type = e1000_nvm_flash_sw;
608 /* in SPT, gfpreg doesn't exist. NVM size is taken from the 607
609 * STRAP register
610 */
611 if (hw->mac.type == e1000_pch_spt) { 608 if (hw->mac.type == e1000_pch_spt) {
609 /* in SPT, gfpreg doesn't exist. NVM size is taken from the
610 * STRAP register. This is because in SPT the GbE Flash region
611 * is no longer accessed through the flash registers. Instead,
612 * the mechanism has changed, and the Flash region access
613 * registers are now implemented in GbE memory space.
614 */
612 nvm->flash_base_addr = 0; 615 nvm->flash_base_addr = 0;
613 nvm_size = (((er32(STRAP) >> 1) & 0x1F) + 1) 616 nvm_size = (((er32(STRAP) >> 1) & 0x1F) + 1)
614 * NVM_SIZE_MULTIPLIER; 617 * NVM_SIZE_MULTIPLIER;
@@ -618,6 +621,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
618 /* Set the base address for flash register access */ 621 /* Set the base address for flash register access */
619 hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR; 622 hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR;
620 } else { 623 } else {
624 /* Can't read flash registers if register set isn't mapped. */
621 if (!hw->flash_address) { 625 if (!hw->flash_address) {
622 e_dbg("ERROR: Flash registers not mapped\n"); 626 e_dbg("ERROR: Flash registers not mapped\n");
623 return -E1000_ERR_CONFIG; 627 return -E1000_ERR_CONFIG;