aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/tile
diff options
context:
space:
mode:
authorChris Metcalf <cmetcalf@tilera.com>2013-05-02 15:29:04 -0400
committerChris Metcalf <cmetcalf@tilera.com>2013-05-02 16:20:31 -0400
commitc539914dcd9a68c63305e055b14115a6a19578a8 (patch)
treeb422139d5d4628c8472fdf740dced263bc238c30 /drivers/net/ethernet/tile
parentc1be5a5b1b355d40e6cf79cc979eb66dafa24ad1 (diff)
tile: support new Tilera hypervisor
The Tilera hypervisor shipped in releases up through MDE 4.1 launches the client operating system (i.e. Linux) at privilege level 1 (PL1). Starting with MDE 4.2, as part of the work to enable KVM, the Tilera hypervisor launches Linux at PL2 instead. This commit makes the KERNEL_PL option default to 2 for tilegx, while still saying at 1 for tilepro, which doesn't have an updated hypervisor. It also explains how and when you might want to choose another value. In addition, we change a small buglet in the on-chip Ethernet driver, where we were failing to use the KERNEL_PL constant in an API call. To make the transition cleaner, this change also provides the updated hv_init() API for the new hypervisor that supports announcing Linux's compiled-in PL, so the hypervisor can generate a suitable error in the case of a mismatched hypervisor and Linux binary. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Cc: stable@vger.linux.org
Diffstat (limited to 'drivers/net/ethernet/tile')
-rw-r--r--drivers/net/ethernet/tile/tilegx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c
index 66e025ad5df1..f3c2d034b32c 100644
--- a/drivers/net/ethernet/tile/tilegx.c
+++ b/drivers/net/ethernet/tile/tilegx.c
@@ -930,7 +930,7 @@ static int tile_net_setup_interrupts(struct net_device *dev)
930 if (info->has_iqueue) { 930 if (info->has_iqueue) {
931 gxio_mpipe_request_notif_ring_interrupt( 931 gxio_mpipe_request_notif_ring_interrupt(
932 &context, cpu_x(cpu), cpu_y(cpu), 932 &context, cpu_x(cpu), cpu_y(cpu),
933 1, ingress_irq, info->iqueue.ring); 933 KERNEL_PL, ingress_irq, info->iqueue.ring);
934 } 934 }
935 } 935 }
936 936