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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2013-07-02 08:12:36 -0400
committerDavid S. Miller <davem@davemloft.net>2013-07-02 19:04:53 -0400
commit83d7af64ac9eaf4f4db7228677bc25f23c383790 (patch)
tree611351e9880b35ea5cfa136264cb106b07873bf9 /drivers/net/ethernet/stmicro/stmmac/enh_desc.c
parent06a23fe31ca3992863721f21bdb0307af93da807 (diff)
stmmac: dity-up and rework the driver debug levels
Prior this patch, the internal debugging was based on ifdef and also some printk were useless because many info are exposed via ethtool. This patch remove all the ifdef defines and now we only use netif_msg_XXX levels. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/enh_desc.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/enh_desc.c95
1 files changed, 26 insertions, 69 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
index 0fbc8fafa706..7e6628a91514 100644
--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
@@ -33,54 +33,40 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
33 struct net_device_stats *stats = (struct net_device_stats *)data; 33 struct net_device_stats *stats = (struct net_device_stats *)data;
34 34
35 if (unlikely(p->des01.etx.error_summary)) { 35 if (unlikely(p->des01.etx.error_summary)) {
36 CHIP_DBG(KERN_ERR "GMAC TX error... 0x%08x\n", p->des01.etx); 36 if (unlikely(p->des01.etx.jabber_timeout))
37 if (unlikely(p->des01.etx.jabber_timeout)) {
38 CHIP_DBG(KERN_ERR "\tjabber_timeout error\n");
39 x->tx_jabber++; 37 x->tx_jabber++;
40 }
41 38
42 if (unlikely(p->des01.etx.frame_flushed)) { 39 if (unlikely(p->des01.etx.frame_flushed)) {
43 CHIP_DBG(KERN_ERR "\tframe_flushed error\n");
44 x->tx_frame_flushed++; 40 x->tx_frame_flushed++;
45 dwmac_dma_flush_tx_fifo(ioaddr); 41 dwmac_dma_flush_tx_fifo(ioaddr);
46 } 42 }
47 43
48 if (unlikely(p->des01.etx.loss_carrier)) { 44 if (unlikely(p->des01.etx.loss_carrier)) {
49 CHIP_DBG(KERN_ERR "\tloss_carrier error\n");
50 x->tx_losscarrier++; 45 x->tx_losscarrier++;
51 stats->tx_carrier_errors++; 46 stats->tx_carrier_errors++;
52 } 47 }
53 if (unlikely(p->des01.etx.no_carrier)) { 48 if (unlikely(p->des01.etx.no_carrier)) {
54 CHIP_DBG(KERN_ERR "\tno_carrier error\n");
55 x->tx_carrier++; 49 x->tx_carrier++;
56 stats->tx_carrier_errors++; 50 stats->tx_carrier_errors++;
57 } 51 }
58 if (unlikely(p->des01.etx.late_collision)) { 52 if (unlikely(p->des01.etx.late_collision))
59 CHIP_DBG(KERN_ERR "\tlate_collision error\n");
60 stats->collisions += p->des01.etx.collision_count; 53 stats->collisions += p->des01.etx.collision_count;
61 } 54
62 if (unlikely(p->des01.etx.excessive_collisions)) { 55 if (unlikely(p->des01.etx.excessive_collisions))
63 CHIP_DBG(KERN_ERR "\texcessive_collisions\n");
64 stats->collisions += p->des01.etx.collision_count; 56 stats->collisions += p->des01.etx.collision_count;
65 } 57
66 if (unlikely(p->des01.etx.excessive_deferral)) { 58 if (unlikely(p->des01.etx.excessive_deferral))
67 CHIP_DBG(KERN_INFO "\texcessive tx_deferral\n");
68 x->tx_deferred++; 59 x->tx_deferred++;
69 }
70 60
71 if (unlikely(p->des01.etx.underflow_error)) { 61 if (unlikely(p->des01.etx.underflow_error)) {
72 CHIP_DBG(KERN_ERR "\tunderflow error\n");
73 dwmac_dma_flush_tx_fifo(ioaddr); 62 dwmac_dma_flush_tx_fifo(ioaddr);
74 x->tx_underflow++; 63 x->tx_underflow++;
75 } 64 }
76 65
77 if (unlikely(p->des01.etx.ip_header_error)) { 66 if (unlikely(p->des01.etx.ip_header_error))
78 CHIP_DBG(KERN_ERR "\tTX IP header csum error\n");
79 x->tx_ip_header_error++; 67 x->tx_ip_header_error++;
80 }
81 68
82 if (unlikely(p->des01.etx.payload_error)) { 69 if (unlikely(p->des01.etx.payload_error)) {
83 CHIP_DBG(KERN_ERR "\tAddr/Payload csum error\n");
84 x->tx_payload_error++; 70 x->tx_payload_error++;
85 dwmac_dma_flush_tx_fifo(ioaddr); 71 dwmac_dma_flush_tx_fifo(ioaddr);
86 } 72 }
@@ -88,15 +74,12 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
88 ret = -1; 74 ret = -1;
89 } 75 }
90 76
91 if (unlikely(p->des01.etx.deferred)) { 77 if (unlikely(p->des01.etx.deferred))
92 CHIP_DBG(KERN_INFO "GMAC TX status: tx deferred\n");
93 x->tx_deferred++; 78 x->tx_deferred++;
94 } 79
95#ifdef STMMAC_VLAN_TAG_USED 80#ifdef STMMAC_VLAN_TAG_USED
96 if (p->des01.etx.vlan_frame) { 81 if (p->des01.etx.vlan_frame)
97 CHIP_DBG(KERN_INFO "GMAC TX status: VLAN frame\n");
98 x->tx_vlan++; 82 x->tx_vlan++;
99 }
100#endif 83#endif
101 84
102 return ret; 85 return ret;
@@ -123,30 +106,20 @@ static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err)
123 * 0 1 1 | COE bypassed.. no IPv4/6 frame 106 * 0 1 1 | COE bypassed.. no IPv4/6 frame
124 * 0 1 0 | Reserved. 107 * 0 1 0 | Reserved.
125 */ 108 */
126 if (status == 0x0) { 109 if (status == 0x0)
127 CHIP_DBG(KERN_INFO "RX Des0 status: IEEE 802.3 Type frame.\n");
128 ret = llc_snap; 110 ret = llc_snap;
129 } else if (status == 0x4) { 111 else if (status == 0x4)
130 CHIP_DBG(KERN_INFO "RX Des0 status: IPv4/6 No CSUM errorS.\n");
131 ret = good_frame; 112 ret = good_frame;
132 } else if (status == 0x5) { 113 else if (status == 0x5)
133 CHIP_DBG(KERN_ERR "RX Des0 status: IPv4/6 Payload Error.\n");
134 ret = csum_none; 114 ret = csum_none;
135 } else if (status == 0x6) { 115 else if (status == 0x6)
136 CHIP_DBG(KERN_ERR "RX Des0 status: IPv4/6 Header Error.\n");
137 ret = csum_none; 116 ret = csum_none;
138 } else if (status == 0x7) { 117 else if (status == 0x7)
139 CHIP_DBG(KERN_ERR
140 "RX Des0 status: IPv4/6 Header and Payload Error.\n");
141 ret = csum_none; 118 ret = csum_none;
142 } else if (status == 0x1) { 119 else if (status == 0x1)
143 CHIP_DBG(KERN_ERR
144 "RX Des0 status: IPv4/6 unsupported IP PAYLOAD.\n");
145 ret = discard_frame; 120 ret = discard_frame;
146 } else if (status == 0x3) { 121 else if (status == 0x3)
147 CHIP_DBG(KERN_ERR "RX Des0 status: No IPv4, IPv6 frame.\n");
148 ret = discard_frame; 122 ret = discard_frame;
149 }
150 return ret; 123 return ret;
151} 124}
152 125
@@ -208,36 +181,26 @@ static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x,
208 struct net_device_stats *stats = (struct net_device_stats *)data; 181 struct net_device_stats *stats = (struct net_device_stats *)data;
209 182
210 if (unlikely(p->des01.erx.error_summary)) { 183 if (unlikely(p->des01.erx.error_summary)) {
211 CHIP_DBG(KERN_ERR "GMAC RX Error Summary 0x%08x\n",
212 p->des01.erx);
213 if (unlikely(p->des01.erx.descriptor_error)) { 184 if (unlikely(p->des01.erx.descriptor_error)) {
214 CHIP_DBG(KERN_ERR "\tdescriptor error\n");
215 x->rx_desc++; 185 x->rx_desc++;
216 stats->rx_length_errors++; 186 stats->rx_length_errors++;
217 } 187 }
218 if (unlikely(p->des01.erx.overflow_error)) { 188 if (unlikely(p->des01.erx.overflow_error))
219 CHIP_DBG(KERN_ERR "\toverflow error\n");
220 x->rx_gmac_overflow++; 189 x->rx_gmac_overflow++;
221 }
222 190
223 if (unlikely(p->des01.erx.ipc_csum_error)) 191 if (unlikely(p->des01.erx.ipc_csum_error))
224 CHIP_DBG(KERN_ERR "\tIPC Csum Error/Giant frame\n"); 192 pr_err("\tIPC Csum Error/Giant frame\n");
225 193
226 if (unlikely(p->des01.erx.late_collision)) { 194 if (unlikely(p->des01.erx.late_collision)) {
227 CHIP_DBG(KERN_ERR "\tlate_collision error\n");
228 stats->collisions++;
229 stats->collisions++; 195 stats->collisions++;
230 } 196 }
231 if (unlikely(p->des01.erx.receive_watchdog)) { 197 if (unlikely(p->des01.erx.receive_watchdog))
232 CHIP_DBG(KERN_ERR "\treceive_watchdog error\n");
233 x->rx_watchdog++; 198 x->rx_watchdog++;
234 } 199
235 if (unlikely(p->des01.erx.error_gmii)) { 200 if (unlikely(p->des01.erx.error_gmii))
236 CHIP_DBG(KERN_ERR "\tReceive Error\n");
237 x->rx_mii++; 201 x->rx_mii++;
238 } 202
239 if (unlikely(p->des01.erx.crc_error)) { 203 if (unlikely(p->des01.erx.crc_error)) {
240 CHIP_DBG(KERN_ERR "\tCRC error\n");
241 x->rx_crc++; 204 x->rx_crc++;
242 stats->rx_crc_errors++; 205 stats->rx_crc_errors++;
243 } 206 }
@@ -251,30 +214,24 @@ static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x,
251 ret = enh_desc_coe_rdes0(p->des01.erx.ipc_csum_error, 214 ret = enh_desc_coe_rdes0(p->des01.erx.ipc_csum_error,
252 p->des01.erx.frame_type, p->des01.erx.rx_mac_addr); 215 p->des01.erx.frame_type, p->des01.erx.rx_mac_addr);
253 216
254 if (unlikely(p->des01.erx.dribbling)) { 217 if (unlikely(p->des01.erx.dribbling))
255 CHIP_DBG(KERN_ERR "GMAC RX: dribbling error\n");
256 x->dribbling_bit++; 218 x->dribbling_bit++;
257 } 219
258 if (unlikely(p->des01.erx.sa_filter_fail)) { 220 if (unlikely(p->des01.erx.sa_filter_fail)) {
259 CHIP_DBG(KERN_ERR "GMAC RX : Source Address filter fail\n");
260 x->sa_rx_filter_fail++; 221 x->sa_rx_filter_fail++;
261 ret = discard_frame; 222 ret = discard_frame;
262 } 223 }
263 if (unlikely(p->des01.erx.da_filter_fail)) { 224 if (unlikely(p->des01.erx.da_filter_fail)) {
264 CHIP_DBG(KERN_ERR "GMAC RX : Dest Address filter fail\n");
265 x->da_rx_filter_fail++; 225 x->da_rx_filter_fail++;
266 ret = discard_frame; 226 ret = discard_frame;
267 } 227 }
268 if (unlikely(p->des01.erx.length_error)) { 228 if (unlikely(p->des01.erx.length_error)) {
269 CHIP_DBG(KERN_ERR "GMAC RX: length_error error\n");
270 x->rx_length++; 229 x->rx_length++;
271 ret = discard_frame; 230 ret = discard_frame;
272 } 231 }
273#ifdef STMMAC_VLAN_TAG_USED 232#ifdef STMMAC_VLAN_TAG_USED
274 if (p->des01.erx.vlan_tag) { 233 if (p->des01.erx.vlan_tag)
275 CHIP_DBG(KERN_INFO "GMAC RX: VLAN frame tagged\n");
276 x->rx_vlan++; 234 x->rx_vlan++;
277 }
278#endif 235#endif
279 236
280 return ret; 237 return ret;