stmmac: initial support to manage pcs modes

This patch adds the minimal support to manage the PCS
modes (RGMII/SGMII) and restart the ANE.
Both TBI and RTBI are not yet supported.

Thanks to Byungho that wrote some part of this code
and tested SGMII too.

The only thing to be fixed is the get/set pause in
ethtool.

Signed-off-by: Byungho An <bh74.an@samsung.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 34 insertions, 0 deletions

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index 6dd689e19f0a..57f4e8f607e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -98,6 +98,38 @@ enum power_event {
 #define GMAC_TBI        0x000000d4      /* TBI extend status */
 #define GMAC_S_R_GMII   0x000000d8      /* SGMII RGMII status */
 
+/* AN Configuration defines */
+#define GMAC_AN_CTRL_RAN        0x00000200 /* Restart Auto-Negotiation */
+#define GMAC_AN_CTRL_ANE        0x00001000 /* Auto-Negotiation Enable */
+#define GMAC_AN_CTRL_ELE        0x00004000 /* External Loopback Enable */
+#define GMAC_AN_CTRL_ECD        0x00010000 /* Enable Comma Detect */
+#define GMAC_AN_CTRL_LR 0x00020000 /* Lock to Reference */
+#define GMAC_AN_CTRL_SGMRAL     0x00040000 /* SGMII RAL Control */
+
+/* AN Status defines */
+#define GMAC_AN_STATUS_LS       0x00000004 /* Link Status 0:down 1:up */
+#define GMAC_AN_STATUS_ANA      0x00000008 /* Auto-Negotiation Ability */
+#define GMAC_AN_STATUS_ANC      0x00000020 /* Auto-Negotiation Complete */
+#define GMAC_AN_STATUS_ES       0x00000100 /* Extended Status */
+
+/* Register 54 (SGMII/RGMII status register) */
+#define GMAC_S_R_GMII_LINK              0x8
+#define GMAC_S_R_GMII_SPEED             0x5
+#define GMAC_S_R_GMII_SPEED_SHIFT       0x1
+#define GMAC_S_R_GMII_MODE              0x1
+#define GMAC_S_R_GMII_SPEED_125         2
+#define GMAC_S_R_GMII_SPEED_25          1
+
+/* Common ADV and LPA defines */
+#define GMAC_ANE_FD             (1 << 5)
+#define GMAC_ANE_HD             (1 << 6)
+#define GMAC_ANE_PSE            (3 << 7)
+#define GMAC_ANE_PSE_SHIFT      7
+
+ /* GMAC Configuration defines */
+#define GMAC_CONTROL_TC 0x01000000 /* Transmit Conf. in RGMII/SGMII */
+#define GMAC_CONTROL_WD 0x00800000 /* Disable Watchdog on receive */
+
 /* GMAC Configuration defines */
 #define GMAC_CONTROL_TC 0x01000000      /* Transmit Conf. in RGMII/SGMII */
 #define GMAC_CONTROL_WD 0x00800000      /* Disable Watchdog on receive */
@@ -232,5 +264,7 @@ enum rtc_control {
 #define GMAC_MMC_TX_INTR   0x108
 #define GMAC_MMC_RX_CSUM_OFFLOAD   0x208
 
+
+
 extern const struct stmmac_dma_ops dwmac1000_dma_ops;
 #endif /* __DWMAC1000_H__ */