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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2014-01-03 07:52:22 -0500
committerDavid S. Miller <davem@davemloft.net>2014-01-03 20:49:20 -0500
commit128296fc3fa2f607050cc2c5d6dc90237f3cedb3 (patch)
tree4f30efaa8fa90561c44869a2c430289351b23586 /drivers/net/ethernet/renesas
parent45ea3932e261af147187ceefb43456c7f8e3b288 (diff)
sh_eth: coding style fixes
Running 'scripts/checkpatch.pl' on the driver files gives numerous warnings: - block comments using empty /* line; - unneeded \ at end of lines; - message string split across lines; - use of __attribute__((aligned(n))) instead of __aligned(n) macro; - use of __attribute__((packed)) instead of __packed macro. Additionally, running 'scripts/checkpatch.pl --strict' gives more complaints: - including the paragraph about writing to FSF into the heading comment; - alignment not matching open paren; - multiple assignments on one line; - use of CamelCase names; - missing {} on one of the *if* arms where another has them; - spinlock definition without a comment. While fixing these, also do some more style cleanups: - remove useless () around expressions; - add {} around multi-line *if* operator's arm; - remove space before comma; - add spaces after /* and before */; - properly align continuation lines of broken up expressions; - realign comments to the structure fields. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas')
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c110
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.h53
2 files changed, 75 insertions, 88 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 2d00bce7d004..888410737dbd 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -1,5 +1,4 @@
1/* 1/* SuperH Ethernet device driver
2 * SuperH Ethernet device driver
3 * 2 *
4 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu 3 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu
5 * Copyright (C) 2008-2013 Renesas Solutions Corp. 4 * Copyright (C) 2008-2013 Renesas Solutions Corp.
@@ -13,9 +12,6 @@
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details. 14 * more details.
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 * 15 *
20 * The full GNU General Public License is included in this distribution in 16 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING". 17 * the file called "COPYING".
@@ -646,8 +642,8 @@ static struct sh_eth_cpu_data sh7763_data = {
646 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 642 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
647 643
648 .tx_check = EESR_TC1 | EESR_FTC, 644 .tx_check = EESR_TC1 | EESR_FTC,
649 .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \ 645 .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
650 EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \ 646 EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
651 EESR_ECI, 647 EESR_ECI,
652 648
653 .apr = 1, 649 .apr = 1,
@@ -732,7 +728,7 @@ static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
732 cd->ecsipr_value = DEFAULT_ECSIPR_INIT; 728 cd->ecsipr_value = DEFAULT_ECSIPR_INIT;
733 729
734 if (!cd->fcftr_value) 730 if (!cd->fcftr_value)
735 cd->fcftr_value = DEFAULT_FIFO_F_D_RFF | \ 731 cd->fcftr_value = DEFAULT_FIFO_F_D_RFF |
736 DEFAULT_FIFO_F_D_RFD; 732 DEFAULT_FIFO_F_D_RFD;
737 733
738 if (!cd->fdr_value) 734 if (!cd->fdr_value)
@@ -849,20 +845,17 @@ static inline __u32 edmac_to_cpu(struct sh_eth_private *mdp, u32 x)
849 return x; 845 return x;
850} 846}
851 847
852/* 848/* Program the hardware MAC address from dev->dev_addr. */
853 * Program the hardware MAC address from dev->dev_addr.
854 */
855static void update_mac_address(struct net_device *ndev) 849static void update_mac_address(struct net_device *ndev)
856{ 850{
857 sh_eth_write(ndev, 851 sh_eth_write(ndev,
858 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | 852 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) |
859 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); 853 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR);
860 sh_eth_write(ndev, 854 sh_eth_write(ndev,
861 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); 855 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR);
862} 856}
863 857
864/* 858/* Get MAC address from SuperH MAC address register
865 * Get MAC address from SuperH MAC address register
866 * 859 *
867 * SuperH's Ethernet device doesn't have 'ROM' to MAC address. 860 * SuperH's Ethernet device doesn't have 'ROM' to MAC address.
868 * This driver get MAC address that use by bootloader(U-boot or sh-ipl+g). 861 * This driver get MAC address that use by bootloader(U-boot or sh-ipl+g).
@@ -1019,8 +1012,10 @@ static void sh_eth_ring_format(struct net_device *ndev)
1019 int rx_ringsize = sizeof(*rxdesc) * mdp->num_rx_ring; 1012 int rx_ringsize = sizeof(*rxdesc) * mdp->num_rx_ring;
1020 int tx_ringsize = sizeof(*txdesc) * mdp->num_tx_ring; 1013 int tx_ringsize = sizeof(*txdesc) * mdp->num_tx_ring;
1021 1014
1022 mdp->cur_rx = mdp->cur_tx = 0; 1015 mdp->cur_rx = 0;
1023 mdp->dirty_rx = mdp->dirty_tx = 0; 1016 mdp->cur_tx = 0;
1017 mdp->dirty_rx = 0;
1018 mdp->dirty_tx = 0;
1024 1019
1025 memset(mdp->rx_ring, 0, rx_ringsize); 1020 memset(mdp->rx_ring, 0, rx_ringsize);
1026 1021
@@ -1033,7 +1028,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
1033 if (skb == NULL) 1028 if (skb == NULL)
1034 break; 1029 break;
1035 dma_map_single(&ndev->dev, skb->data, mdp->rx_buf_sz, 1030 dma_map_single(&ndev->dev, skb->data, mdp->rx_buf_sz,
1036 DMA_FROM_DEVICE); 1031 DMA_FROM_DEVICE);
1037 sh_eth_set_receive_align(skb); 1032 sh_eth_set_receive_align(skb);
1038 1033
1039 /* RX descriptor */ 1034 /* RX descriptor */
@@ -1081,8 +1076,7 @@ static int sh_eth_ring_init(struct net_device *ndev)
1081 struct sh_eth_private *mdp = netdev_priv(ndev); 1076 struct sh_eth_private *mdp = netdev_priv(ndev);
1082 int rx_ringsize, tx_ringsize, ret = 0; 1077 int rx_ringsize, tx_ringsize, ret = 0;
1083 1078
1084 /* 1079 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1085 * +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1086 * card needs room to do 8 byte alignment, +2 so we can reserve 1080 * card needs room to do 8 byte alignment, +2 so we can reserve
1087 * the first 2 bytes, and +16 gets room for the status word from the 1081 * the first 2 bytes, and +16 gets room for the status word from the
1088 * card. 1082 * card.
@@ -1257,7 +1251,7 @@ static int sh_eth_txfree(struct net_device *ndev)
1257{ 1251{
1258 struct sh_eth_private *mdp = netdev_priv(ndev); 1252 struct sh_eth_private *mdp = netdev_priv(ndev);
1259 struct sh_eth_txdesc *txdesc; 1253 struct sh_eth_txdesc *txdesc;
1260 int freeNum = 0; 1254 int free_num = 0;
1261 int entry = 0; 1255 int entry = 0;
1262 1256
1263 for (; mdp->cur_tx - mdp->dirty_tx > 0; mdp->dirty_tx++) { 1257 for (; mdp->cur_tx - mdp->dirty_tx > 0; mdp->dirty_tx++) {
@@ -1271,7 +1265,7 @@ static int sh_eth_txfree(struct net_device *ndev)
1271 txdesc->buffer_length, DMA_TO_DEVICE); 1265 txdesc->buffer_length, DMA_TO_DEVICE);
1272 dev_kfree_skb_irq(mdp->tx_skbuff[entry]); 1266 dev_kfree_skb_irq(mdp->tx_skbuff[entry]);
1273 mdp->tx_skbuff[entry] = NULL; 1267 mdp->tx_skbuff[entry] = NULL;
1274 freeNum++; 1268 free_num++;
1275 } 1269 }
1276 txdesc->status = cpu_to_edmac(mdp, TD_TFP); 1270 txdesc->status = cpu_to_edmac(mdp, TD_TFP);
1277 if (entry >= mdp->num_tx_ring - 1) 1271 if (entry >= mdp->num_tx_ring - 1)
@@ -1280,7 +1274,7 @@ static int sh_eth_txfree(struct net_device *ndev)
1280 ndev->stats.tx_packets++; 1274 ndev->stats.tx_packets++;
1281 ndev->stats.tx_bytes += txdesc->buffer_length; 1275 ndev->stats.tx_bytes += txdesc->buffer_length;
1282 } 1276 }
1283 return freeNum; 1277 return free_num;
1284} 1278}
1285 1279
1286/* Packet receive function */ 1280/* Packet receive function */
@@ -1313,8 +1307,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1313 if (!(desc_status & RDFEND)) 1307 if (!(desc_status & RDFEND))
1314 ndev->stats.rx_length_errors++; 1308 ndev->stats.rx_length_errors++;
1315 1309
1316 /* 1310 /* In case of almost all GETHER/ETHERs, the Receive Frame State
1317 * In case of almost all GETHER/ETHERs, the Receive Frame State
1318 * (RFS) bits in the Receive Descriptor 0 are from bit 9 to 1311 * (RFS) bits in the Receive Descriptor 0 are from bit 9 to
1319 * bit 0. However, in case of the R8A7740's GETHER, the RFS 1312 * bit 0. However, in case of the R8A7740's GETHER, the RFS
1320 * bits are from bit 25 to bit 16. So, the driver needs right 1313 * bits are from bit 25 to bit 16. So, the driver needs right
@@ -1374,7 +1367,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1374 if (skb == NULL) 1367 if (skb == NULL)
1375 break; /* Better luck next round. */ 1368 break; /* Better luck next round. */
1376 dma_map_single(&ndev->dev, skb->data, mdp->rx_buf_sz, 1369 dma_map_single(&ndev->dev, skb->data, mdp->rx_buf_sz,
1377 DMA_FROM_DEVICE); 1370 DMA_FROM_DEVICE);
1378 sh_eth_set_receive_align(skb); 1371 sh_eth_set_receive_align(skb);
1379 1372
1380 skb_checksum_none_assert(skb); 1373 skb_checksum_none_assert(skb);
@@ -1392,10 +1385,13 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1392 /* If we don't need to check status, don't. -KDU */ 1385 /* If we don't need to check status, don't. -KDU */
1393 if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) { 1386 if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) {
1394 /* fix the values for the next receiving if RDE is set */ 1387 /* fix the values for the next receiving if RDE is set */
1395 if (intr_status & EESR_RDE) 1388 if (intr_status & EESR_RDE) {
1396 mdp->cur_rx = mdp->dirty_rx = 1389 u32 count = (sh_eth_read(ndev, RDFAR) -
1397 (sh_eth_read(ndev, RDFAR) - 1390 sh_eth_read(ndev, RDLAR)) >> 4;
1398 sh_eth_read(ndev, RDLAR)) >> 4; 1391
1392 mdp->cur_rx = count;
1393 mdp->dirty_rx = count;
1394 }
1399 sh_eth_write(ndev, EDRRR_R, EDRRR); 1395 sh_eth_write(ndev, EDRRR_R, EDRRR);
1400 } 1396 }
1401 1397
@@ -1438,17 +1434,17 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)
1438 if (mdp->ether_link_active_low) 1434 if (mdp->ether_link_active_low)
1439 link_stat = ~link_stat; 1435 link_stat = ~link_stat;
1440 } 1436 }
1441 if (!(link_stat & PHY_ST_LINK)) 1437 if (!(link_stat & PHY_ST_LINK)) {
1442 sh_eth_rcv_snd_disable(ndev); 1438 sh_eth_rcv_snd_disable(ndev);
1443 else { 1439 } else {
1444 /* Link Up */ 1440 /* Link Up */
1445 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) & 1441 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) &
1446 ~DMAC_M_ECI, EESIPR); 1442 ~DMAC_M_ECI, EESIPR);
1447 /*clear int */ 1443 /* clear int */
1448 sh_eth_write(ndev, sh_eth_read(ndev, ECSR), 1444 sh_eth_write(ndev, sh_eth_read(ndev, ECSR),
1449 ECSR); 1445 ECSR);
1450 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) | 1446 sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) |
1451 DMAC_M_ECI, EESIPR); 1447 DMAC_M_ECI, EESIPR);
1452 /* enable tx and rx */ 1448 /* enable tx and rx */
1453 sh_eth_rcv_snd_enable(ndev); 1449 sh_eth_rcv_snd_enable(ndev);
1454 } 1450 }
@@ -1519,9 +1515,9 @@ ignore_link:
1519 u32 edtrr = sh_eth_read(ndev, EDTRR); 1515 u32 edtrr = sh_eth_read(ndev, EDTRR);
1520 /* dmesg */ 1516 /* dmesg */
1521 dev_err(&ndev->dev, "TX error. status=%8.8x cur_tx=%8.8x ", 1517 dev_err(&ndev->dev, "TX error. status=%8.8x cur_tx=%8.8x ",
1522 intr_status, mdp->cur_tx); 1518 intr_status, mdp->cur_tx);
1523 dev_err(&ndev->dev, "dirty_tx=%8.8x state=%8.8x EDTRR=%8.8x.\n", 1519 dev_err(&ndev->dev, "dirty_tx=%8.8x state=%8.8x EDTRR=%8.8x.\n",
1524 mdp->dirty_tx, (u32) ndev->state, edtrr); 1520 mdp->dirty_tx, (u32) ndev->state, edtrr);
1525 /* dirty buffer free */ 1521 /* dirty buffer free */
1526 sh_eth_txfree(ndev); 1522 sh_eth_txfree(ndev);
1527 1523
@@ -1644,7 +1640,8 @@ static void sh_eth_adjust_link(struct net_device *ndev)
1644 } 1640 }
1645 if (!mdp->link) { 1641 if (!mdp->link) {
1646 sh_eth_write(ndev, 1642 sh_eth_write(ndev,
1647 (sh_eth_read(ndev, ECMR) & ~ECMR_TXF), ECMR); 1643 sh_eth_read(ndev, ECMR) & ~ECMR_TXF,
1644 ECMR);
1648 new_state = 1; 1645 new_state = 1;
1649 mdp->link = phydev->link; 1646 mdp->link = phydev->link;
1650 if (mdp->cd->no_psr || mdp->no_ether_link) 1647 if (mdp->cd->no_psr || mdp->no_ether_link)
@@ -1671,7 +1668,7 @@ static int sh_eth_phy_init(struct net_device *ndev)
1671 struct phy_device *phydev = NULL; 1668 struct phy_device *phydev = NULL;
1672 1669
1673 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, 1670 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
1674 mdp->mii_bus->id , mdp->phy_id); 1671 mdp->mii_bus->id, mdp->phy_id);
1675 1672
1676 mdp->link = 0; 1673 mdp->link = 0;
1677 mdp->speed = 0; 1674 mdp->speed = 0;
@@ -1709,7 +1706,7 @@ static int sh_eth_phy_start(struct net_device *ndev)
1709} 1706}
1710 1707
1711static int sh_eth_get_settings(struct net_device *ndev, 1708static int sh_eth_get_settings(struct net_device *ndev,
1712 struct ethtool_cmd *ecmd) 1709 struct ethtool_cmd *ecmd)
1713{ 1710{
1714 struct sh_eth_private *mdp = netdev_priv(ndev); 1711 struct sh_eth_private *mdp = netdev_priv(ndev);
1715 unsigned long flags; 1712 unsigned long flags;
@@ -1723,7 +1720,7 @@ static int sh_eth_get_settings(struct net_device *ndev,
1723} 1720}
1724 1721
1725static int sh_eth_set_settings(struct net_device *ndev, 1722static int sh_eth_set_settings(struct net_device *ndev,
1726 struct ethtool_cmd *ecmd) 1723 struct ethtool_cmd *ecmd)
1727{ 1724{
1728 struct sh_eth_private *mdp = netdev_priv(ndev); 1725 struct sh_eth_private *mdp = netdev_priv(ndev);
1729 unsigned long flags; 1726 unsigned long flags;
@@ -1799,7 +1796,7 @@ static int sh_eth_get_sset_count(struct net_device *netdev, int sset)
1799} 1796}
1800 1797
1801static void sh_eth_get_ethtool_stats(struct net_device *ndev, 1798static void sh_eth_get_ethtool_stats(struct net_device *ndev,
1802 struct ethtool_stats *stats, u64 *data) 1799 struct ethtool_stats *stats, u64 *data)
1803{ 1800{
1804 struct sh_eth_private *mdp = netdev_priv(ndev); 1801 struct sh_eth_private *mdp = netdev_priv(ndev);
1805 int i = 0; 1802 int i = 0;
@@ -1816,7 +1813,7 @@ static void sh_eth_get_strings(struct net_device *ndev, u32 stringset, u8 *data)
1816 switch (stringset) { 1813 switch (stringset) {
1817 case ETH_SS_STATS: 1814 case ETH_SS_STATS:
1818 memcpy(data, *sh_eth_gstrings_stats, 1815 memcpy(data, *sh_eth_gstrings_stats,
1819 sizeof(sh_eth_gstrings_stats)); 1816 sizeof(sh_eth_gstrings_stats));
1820 break; 1817 break;
1821 } 1818 }
1822} 1819}
@@ -1951,9 +1948,10 @@ static void sh_eth_tx_timeout(struct net_device *ndev)
1951 1948
1952 netif_stop_queue(ndev); 1949 netif_stop_queue(ndev);
1953 1950
1954 if (netif_msg_timer(mdp)) 1951 if (netif_msg_timer(mdp)) {
1955 dev_err(&ndev->dev, "%s: transmit timed out, status %8.8x," 1952 dev_err(&ndev->dev, "%s: transmit timed out, status %8.8x, resetting...\n",
1956 " resetting...\n", ndev->name, (int)sh_eth_read(ndev, EESR)); 1953 ndev->name, (int)sh_eth_read(ndev, EESR));
1954 }
1957 1955
1958 /* tx_errors count up */ 1956 /* tx_errors count up */
1959 ndev->stats.tx_errors++; 1957 ndev->stats.tx_errors++;
@@ -2086,8 +2084,7 @@ static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev)
2086} 2084}
2087 2085
2088/* ioctl to device function */ 2086/* ioctl to device function */
2089static int sh_eth_do_ioctl(struct net_device *ndev, struct ifreq *rq, 2087static int sh_eth_do_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2090 int cmd)
2091{ 2088{
2092 struct sh_eth_private *mdp = netdev_priv(ndev); 2089 struct sh_eth_private *mdp = netdev_priv(ndev);
2093 struct phy_device *phydev = mdp->phydev; 2090 struct phy_device *phydev = mdp->phydev;
@@ -2342,8 +2339,7 @@ static void sh_eth_set_multicast_list(struct net_device *ndev)
2342 unsigned long flags; 2339 unsigned long flags;
2343 2340
2344 spin_lock_irqsave(&mdp->lock, flags); 2341 spin_lock_irqsave(&mdp->lock, flags);
2345 /* 2342 /* Initial condition is MCT = 1, PRM = 0.
2346 * Initial condition is MCT = 1, PRM = 0.
2347 * Depending on ndev->flags, set PRM or clear MCT 2343 * Depending on ndev->flags, set PRM or clear MCT
2348 */ 2344 */
2349 ecmr_bits = (sh_eth_read(ndev, ECMR) & ~ECMR_PRM) | ECMR_MCT; 2345 ecmr_bits = (sh_eth_read(ndev, ECMR) & ~ECMR_PRM) | ECMR_MCT;
@@ -2409,8 +2405,7 @@ static int sh_eth_vlan_rx_add_vid(struct net_device *ndev,
2409 2405
2410 mdp->vlan_num_ids++; 2406 mdp->vlan_num_ids++;
2411 2407
2412 /* 2408 /* The controller has one VLAN tag HW filter. So, if the filter is
2413 * The controller has one VLAN tag HW filter. So, if the filter is
2414 * already enabled, the driver disables it and the filte 2409 * already enabled, the driver disables it and the filte
2415 */ 2410 */
2416 if (mdp->vlan_num_ids > 1) { 2411 if (mdp->vlan_num_ids > 1) {
@@ -2526,7 +2521,7 @@ static int sh_mdio_init(struct net_device *ndev, int id,
2526 mdp->mii_bus->name = "sh_mii"; 2521 mdp->mii_bus->name = "sh_mii";
2527 mdp->mii_bus->parent = &ndev->dev; 2522 mdp->mii_bus->parent = &ndev->dev;
2528 snprintf(mdp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 2523 snprintf(mdp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
2529 mdp->pdev->name, id); 2524 mdp->pdev->name, id);
2530 2525
2531 /* PHY IRQ */ 2526 /* PHY IRQ */
2532 mdp->mii_bus->irq = devm_kzalloc(&ndev->dev, 2527 mdp->mii_bus->irq = devm_kzalloc(&ndev->dev,
@@ -2739,7 +2734,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
2739 2734
2740 /* print device information */ 2735 /* print device information */
2741 pr_info("Base address at 0x%x, %pM, IRQ %d.\n", 2736 pr_info("Base address at 0x%x, %pM, IRQ %d.\n",
2742 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq); 2737 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq);
2743 2738
2744 platform_set_drvdata(pdev, ndev); 2739 platform_set_drvdata(pdev, ndev);
2745 2740
@@ -2777,8 +2772,7 @@ static int sh_eth_drv_remove(struct platform_device *pdev)
2777#ifdef CONFIG_PM 2772#ifdef CONFIG_PM
2778static int sh_eth_runtime_nop(struct device *dev) 2773static int sh_eth_runtime_nop(struct device *dev)
2779{ 2774{
2780 /* 2775 /* Runtime PM callback shared between ->runtime_suspend()
2781 * Runtime PM callback shared between ->runtime_suspend()
2782 * and ->runtime_resume(). Simply returns success. 2776 * and ->runtime_resume(). Simply returns success.
2783 * 2777 *
2784 * This driver re-initializes all registers after 2778 * This driver re-initializes all registers after
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index f32c1692d310..0fe35b72a1d0 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -1,5 +1,4 @@
1/* 1/* SuperH Ethernet device driver
2 * SuperH Ethernet device driver
3 * 2 *
4 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu 3 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu
5 * Copyright (C) 2008-2012 Renesas Solutions Corp. 4 * Copyright (C) 2008-2012 Renesas Solutions Corp.
@@ -12,9 +11,6 @@
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details. 13 * more details.
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * 14 *
19 * The full GNU General Public License is included in this distribution in 15 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING". 16 * the file called "COPYING".
@@ -171,8 +167,7 @@ enum {
171#define SH2_SH3_SKB_RX_ALIGN 2 167#define SH2_SH3_SKB_RX_ALIGN 2
172#endif 168#endif
173 169
174/* 170/* Register's bits
175 * Register's bits
176 */ 171 */
177/* EDSR : sh7734, sh7757, sh7763, and r8a7740 only */ 172/* EDSR : sh7734, sh7757, sh7763, and r8a7740 only */
178enum EDSR_BIT { 173enum EDSR_BIT {
@@ -199,7 +194,7 @@ enum DMAC_T_BIT {
199 EDTRR_TRNS_ETHER = 0x01, 194 EDTRR_TRNS_ETHER = 0x01,
200}; 195};
201 196
202/* EDRRR*/ 197/* EDRRR */
203enum EDRRR_R_BIT { 198enum EDRRR_R_BIT {
204 EDRRR_R = 0x01, 199 EDRRR_R = 0x01,
205}; 200};
@@ -422,8 +417,7 @@ enum TSU_FWSLC_BIT {
422#define TSU_VTAG_ENABLE 0x80000000 417#define TSU_VTAG_ENABLE 0x80000000
423#define TSU_VTAG_VID_MASK 0x00000fff 418#define TSU_VTAG_VID_MASK 0x00000fff
424 419
425/* 420/* The sh ether Tx buffer descriptors.
426 * The sh ether Tx buffer descriptors.
427 * This structure should be 20 bytes. 421 * This structure should be 20 bytes.
428 */ 422 */
429struct sh_eth_txdesc { 423struct sh_eth_txdesc {
@@ -437,10 +431,9 @@ struct sh_eth_txdesc {
437#endif 431#endif
438 u32 addr; /* TD2 */ 432 u32 addr; /* TD2 */
439 u32 pad1; /* padding data */ 433 u32 pad1; /* padding data */
440} __attribute__((aligned(2), packed)); 434} __aligned(2) __packed;
441 435
442/* 436/* The sh ether Rx buffer descriptors.
443 * The sh ether Rx buffer descriptors.
444 * This structure should be 20 bytes. 437 * This structure should be 20 bytes.
445 */ 438 */
446struct sh_eth_rxdesc { 439struct sh_eth_rxdesc {
@@ -454,7 +447,7 @@ struct sh_eth_rxdesc {
454#endif 447#endif
455 u32 addr; /* RD2 */ 448 u32 addr; /* RD2 */
456 u32 pad0; /* padding data */ 449 u32 pad0; /* padding data */
457} __attribute__((aligned(2), packed)); 450} __aligned(2) __packed;
458 451
459/* This structure is used by each CPU dependency handling. */ 452/* This structure is used by each CPU dependency handling. */
460struct sh_eth_cpu_data { 453struct sh_eth_cpu_data {
@@ -480,16 +473,16 @@ struct sh_eth_cpu_data {
480 unsigned long eesr_err_check; 473 unsigned long eesr_err_check;
481 474
482 /* hardware features */ 475 /* hardware features */
483 unsigned long irq_flags; /* IRQ configuration flags */ 476 unsigned long irq_flags; /* IRQ configuration flags */
484 unsigned no_psr:1; /* EtherC DO NOT have PSR */ 477 unsigned no_psr:1; /* EtherC DO NOT have PSR */
485 unsigned apr:1; /* EtherC have APR */ 478 unsigned apr:1; /* EtherC have APR */
486 unsigned mpr:1; /* EtherC have MPR */ 479 unsigned mpr:1; /* EtherC have MPR */
487 unsigned tpauser:1; /* EtherC have TPAUSER */ 480 unsigned tpauser:1; /* EtherC have TPAUSER */
488 unsigned bculr:1; /* EtherC have BCULR */ 481 unsigned bculr:1; /* EtherC have BCULR */
489 unsigned tsu:1; /* EtherC have TSU */ 482 unsigned tsu:1; /* EtherC have TSU */
490 unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */ 483 unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */
491 unsigned rpadir:1; /* E-DMAC have RPADIR */ 484 unsigned rpadir:1; /* E-DMAC have RPADIR */
492 unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */ 485 unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
493 unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */ 486 unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
494 unsigned hw_crc:1; /* E-DMAC have CSMR */ 487 unsigned hw_crc:1; /* E-DMAC have CSMR */
495 unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ 488 unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
@@ -511,14 +504,14 @@ struct sh_eth_private {
511 struct sh_eth_txdesc *tx_ring; 504 struct sh_eth_txdesc *tx_ring;
512 struct sk_buff **rx_skbuff; 505 struct sk_buff **rx_skbuff;
513 struct sk_buff **tx_skbuff; 506 struct sk_buff **tx_skbuff;
514 spinlock_t lock; 507 spinlock_t lock; /* Register access lock */
515 u32 cur_rx, dirty_rx; /* Producer/consumer ring indices */ 508 u32 cur_rx, dirty_rx; /* Producer/consumer ring indices */
516 u32 cur_tx, dirty_tx; 509 u32 cur_tx, dirty_tx;
517 u32 rx_buf_sz; /* Based on MTU+slack. */ 510 u32 rx_buf_sz; /* Based on MTU+slack. */
518 int edmac_endian; 511 int edmac_endian;
519 struct napi_struct napi; 512 struct napi_struct napi;
520 /* MII transceiver section. */ 513 /* MII transceiver section. */
521 u32 phy_id; /* PHY ID */ 514 u32 phy_id; /* PHY ID */
522 struct mii_bus *mii_bus; /* MDIO bus control */ 515 struct mii_bus *mii_bus; /* MDIO bus control */
523 struct phy_device *phydev; /* PHY device control */ 516 struct phy_device *phydev; /* PHY device control */
524 int link; 517 int link;
@@ -526,8 +519,8 @@ struct sh_eth_private {
526 int msg_enable; 519 int msg_enable;
527 int speed; 520 int speed;
528 int duplex; 521 int duplex;
529 int port; /* for TSU */ 522 int port; /* for TSU */
530 int vlan_num_ids; /* for VLAN tag filter */ 523 int vlan_num_ids; /* for VLAN tag filter */
531 524
532 unsigned no_ether_link:1; 525 unsigned no_ether_link:1;
533 unsigned ether_link_active_low:1; 526 unsigned ether_link_active_low:1;