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authorhayeswang <hayeswang@realtek.com>2013-04-01 18:23:38 -0400
committerDavid S. Miller <davem@davemloft.net>2013-04-07 16:44:13 -0400
commiteee3786f7d3134e3edc54c1134511d520dd74285 (patch)
tree90e95dfe3ceee580bcd14dda2594aa3f3571e81c /drivers/net/ethernet/realtek
parentfe7524c09793c87dfde55ac3f98f4b95d9d48638 (diff)
r8169: Modify the method for setting firmware
Remove useless action PHY_READ_EFUSE, PHY_READ_MAC_BYTE, PHY_WRITE_MAC_BYTE, PHY_WRITE_ERI_WORD. And define the new action PHY_MDIO_CHG. PHY_MDIO_CHG is used to modify the mdio operation. By the way, the firmware could support setting mac ocp. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/realtek')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c45
1 files changed, 32 insertions, 13 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index b8b59a97d233..e7e7d3735c19 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -1069,6 +1069,21 @@ static int r8168g_mdio_read(struct rtl8169_private *tp, int reg)
1069 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); 1069 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2);
1070} 1070}
1071 1071
1072static void mac_mcu_write(struct rtl8169_private *tp, int reg, int value)
1073{
1074 if (reg == 0x1f) {
1075 tp->ocp_base = value << 4;
1076 return;
1077 }
1078
1079 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value);
1080}
1081
1082static int mac_mcu_read(struct rtl8169_private *tp, int reg)
1083{
1084 return r8168_mac_ocp_read(tp, tp->ocp_base + reg);
1085}
1086
1072DECLARE_RTL_COND(rtl_phyar_cond) 1087DECLARE_RTL_COND(rtl_phyar_cond)
1073{ 1088{
1074 void __iomem *ioaddr = tp->mmio_addr; 1089 void __iomem *ioaddr = tp->mmio_addr;
@@ -2134,9 +2149,7 @@ static void rtl_writephy_batch(struct rtl8169_private *tp,
2134#define PHY_DATA_OR 0x10000000 2149#define PHY_DATA_OR 0x10000000
2135#define PHY_DATA_AND 0x20000000 2150#define PHY_DATA_AND 0x20000000
2136#define PHY_BJMPN 0x30000000 2151#define PHY_BJMPN 0x30000000
2137#define PHY_READ_EFUSE 0x40000000 2152#define PHY_MDIO_CHG 0x40000000
2138#define PHY_READ_MAC_BYTE 0x50000000
2139#define PHY_WRITE_MAC_BYTE 0x60000000
2140#define PHY_CLEAR_READCOUNT 0x70000000 2153#define PHY_CLEAR_READCOUNT 0x70000000
2141#define PHY_WRITE 0x80000000 2154#define PHY_WRITE 0x80000000
2142#define PHY_READCOUNT_EQ_SKIP 0x90000000 2155#define PHY_READCOUNT_EQ_SKIP 0x90000000
@@ -2145,7 +2158,6 @@ static void rtl_writephy_batch(struct rtl8169_private *tp,
2145#define PHY_WRITE_PREVIOUS 0xc0000000 2158#define PHY_WRITE_PREVIOUS 0xc0000000
2146#define PHY_SKIPN 0xd0000000 2159#define PHY_SKIPN 0xd0000000
2147#define PHY_DELAY_MS 0xe0000000 2160#define PHY_DELAY_MS 0xe0000000
2148#define PHY_WRITE_ERI_WORD 0xf0000000
2149 2161
2150struct fw_info { 2162struct fw_info {
2151 u32 magic; 2163 u32 magic;
@@ -2222,7 +2234,7 @@ static bool rtl_fw_data_ok(struct rtl8169_private *tp, struct net_device *dev,
2222 case PHY_READ: 2234 case PHY_READ:
2223 case PHY_DATA_OR: 2235 case PHY_DATA_OR:
2224 case PHY_DATA_AND: 2236 case PHY_DATA_AND:
2225 case PHY_READ_EFUSE: 2237 case PHY_MDIO_CHG:
2226 case PHY_CLEAR_READCOUNT: 2238 case PHY_CLEAR_READCOUNT:
2227 case PHY_WRITE: 2239 case PHY_WRITE:
2228 case PHY_WRITE_PREVIOUS: 2240 case PHY_WRITE_PREVIOUS:
@@ -2253,9 +2265,6 @@ static bool rtl_fw_data_ok(struct rtl8169_private *tp, struct net_device *dev,
2253 } 2265 }
2254 break; 2266 break;
2255 2267
2256 case PHY_READ_MAC_BYTE:
2257 case PHY_WRITE_MAC_BYTE:
2258 case PHY_WRITE_ERI_WORD:
2259 default: 2268 default:
2260 netif_err(tp, ifup, tp->dev, 2269 netif_err(tp, ifup, tp->dev,
2261 "Invalid action 0x%08x\n", action); 2270 "Invalid action 0x%08x\n", action);
@@ -2286,10 +2295,13 @@ out:
2286static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw) 2295static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2287{ 2296{
2288 struct rtl_fw_phy_action *pa = &rtl_fw->phy_action; 2297 struct rtl_fw_phy_action *pa = &rtl_fw->phy_action;
2298 struct mdio_ops org, *ops = &tp->mdio_ops;
2289 u32 predata, count; 2299 u32 predata, count;
2290 size_t index; 2300 size_t index;
2291 2301
2292 predata = count = 0; 2302 predata = count = 0;
2303 org.write = ops->write;
2304 org.read = ops->read;
2293 2305
2294 for (index = 0; index < pa->size; ) { 2306 for (index = 0; index < pa->size; ) {
2295 u32 action = le32_to_cpu(pa->code[index]); 2307 u32 action = le32_to_cpu(pa->code[index]);
@@ -2316,8 +2328,15 @@ static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2316 case PHY_BJMPN: 2328 case PHY_BJMPN:
2317 index -= regno; 2329 index -= regno;
2318 break; 2330 break;
2319 case PHY_READ_EFUSE: 2331 case PHY_MDIO_CHG:
2320 predata = rtl8168d_efuse_read(tp, regno); 2332 if (data == 0) {
2333 ops->write = org.write;
2334 ops->read = org.read;
2335 } else if (data == 1) {
2336 ops->write = mac_mcu_write;
2337 ops->read = mac_mcu_read;
2338 }
2339
2321 index++; 2340 index++;
2322 break; 2341 break;
2323 case PHY_CLEAR_READCOUNT: 2342 case PHY_CLEAR_READCOUNT:
@@ -2353,13 +2372,13 @@ static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2353 index++; 2372 index++;
2354 break; 2373 break;
2355 2374
2356 case PHY_READ_MAC_BYTE:
2357 case PHY_WRITE_MAC_BYTE:
2358 case PHY_WRITE_ERI_WORD:
2359 default: 2375 default:
2360 BUG(); 2376 BUG();
2361 } 2377 }
2362 } 2378 }
2379
2380 ops->write = org.write;
2381 ops->read = org.read;
2363} 2382}
2364 2383
2365static void rtl_release_firmware(struct rtl8169_private *tp) 2384static void rtl_release_firmware(struct rtl8169_private *tp)