diff options
author | Jiang Liu <jiang.liu@huawei.com> | 2012-07-24 05:20:16 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-08-23 12:11:12 -0400 |
commit | 7d7903b2a2e0c87151f8891e67c4c36a86f3fe83 (patch) | |
tree | 9a14d31443bd3204efcd86d05d6728c9d6475d49 /drivers/net/ethernet/realtek | |
parent | 424ffc943dbac747818b7e4698cdc50be91e4c25 (diff) |
r8169: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify r8169 driver.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/net/ethernet/realtek')
-rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 44 |
1 files changed, 9 insertions, 35 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index b47d5b35024e..410496817de8 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
@@ -833,15 +833,8 @@ static void rtl_unlock_work(struct rtl8169_private *tp) | |||
833 | 833 | ||
834 | static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) | 834 | static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) |
835 | { | 835 | { |
836 | int cap = pci_pcie_cap(pdev); | 836 | pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL, |
837 | 837 | PCI_EXP_DEVCTL_READRQ, force); | |
838 | if (cap) { | ||
839 | u16 ctl; | ||
840 | |||
841 | pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); | ||
842 | ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force; | ||
843 | pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); | ||
844 | } | ||
845 | } | 838 | } |
846 | 839 | ||
847 | struct rtl_cond { | 840 | struct rtl_cond { |
@@ -4739,28 +4732,14 @@ static void rtl_ephy_init(struct rtl8169_private *tp, const struct ephy_info *e, | |||
4739 | 4732 | ||
4740 | static void rtl_disable_clock_request(struct pci_dev *pdev) | 4733 | static void rtl_disable_clock_request(struct pci_dev *pdev) |
4741 | { | 4734 | { |
4742 | int cap = pci_pcie_cap(pdev); | 4735 | pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, |
4743 | 4736 | PCI_EXP_LNKCTL_CLKREQ_EN); | |
4744 | if (cap) { | ||
4745 | u16 ctl; | ||
4746 | |||
4747 | pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl); | ||
4748 | ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN; | ||
4749 | pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl); | ||
4750 | } | ||
4751 | } | 4737 | } |
4752 | 4738 | ||
4753 | static void rtl_enable_clock_request(struct pci_dev *pdev) | 4739 | static void rtl_enable_clock_request(struct pci_dev *pdev) |
4754 | { | 4740 | { |
4755 | int cap = pci_pcie_cap(pdev); | 4741 | pcie_capability_set_word(pdev, PCI_EXP_LNKCTL, |
4756 | 4742 | PCI_EXP_LNKCTL_CLKREQ_EN); | |
4757 | if (cap) { | ||
4758 | u16 ctl; | ||
4759 | |||
4760 | pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl); | ||
4761 | ctl |= PCI_EXP_LNKCTL_CLKREQ_EN; | ||
4762 | pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl); | ||
4763 | } | ||
4764 | } | 4743 | } |
4765 | 4744 | ||
4766 | #define R8168_CPCMD_QUIRK_MASK (\ | 4745 | #define R8168_CPCMD_QUIRK_MASK (\ |
@@ -5405,14 +5384,9 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
5405 | tp->event_slow &= ~RxFIFOOver; | 5384 | tp->event_slow &= ~RxFIFOOver; |
5406 | 5385 | ||
5407 | if (tp->mac_version == RTL_GIGA_MAC_VER_13 || | 5386 | if (tp->mac_version == RTL_GIGA_MAC_VER_13 || |
5408 | tp->mac_version == RTL_GIGA_MAC_VER_16) { | 5387 | tp->mac_version == RTL_GIGA_MAC_VER_16) |
5409 | int cap = pci_pcie_cap(pdev); | 5388 | pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, |
5410 | 5389 | PCI_EXP_DEVCTL_NOSNOOP_EN); | |
5411 | if (cap) { | ||
5412 | pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, | ||
5413 | PCI_EXP_DEVCTL_NOSNOOP_EN); | ||
5414 | } | ||
5415 | } | ||
5416 | 5390 | ||
5417 | RTL_W8(Cfg9346, Cfg9346_Unlock); | 5391 | RTL_W8(Cfg9346, Cfg9346_Unlock); |
5418 | 5392 | ||