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authorSony Chacko <sony.chacko@qlogic.com>2012-12-31 23:11:55 -0500
committerDavid S. Miller <davem@davemloft.net>2013-01-02 05:43:27 -0500
commit629263acaea3613a7da4d602ac1d143533d251cc (patch)
tree4511acf48ff44a0966a7fe945ae06f32233fa97f /drivers/net/ethernet/qlogic/qlcnic
parentd865ebb479ce6fdba96301845e8f16acb089b424 (diff)
qlcnic: 83xx CNA inter driver communication mechanism
Inter Driver Communication (IDC) module. CNA function drivers(ISCSI, FCOE and NIC) which shares the adapter relies on IDC mechanism for gracefull shut down, restart and firmware error recovery. Signed-off-by: Rajesh Borundia <rajesh.borundia@qlogic.com> Signed-off-by: Sucheta Chakraborty <sucheta.chakraborty@qlogic.com> Signed-off-by: Sony Chacko <sony.chacko@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qlcnic')
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/Makefile3
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic.h14
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c215
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h80
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c1513
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c24
6 files changed, 1830 insertions, 19 deletions
diff --git a/drivers/net/ethernet/qlogic/qlcnic/Makefile b/drivers/net/ethernet/qlogic/qlcnic/Makefile
index f8d85aec26b7..799325db5c79 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/Makefile
+++ b/drivers/net/ethernet/qlogic/qlcnic/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_QLCNIC) := qlcnic.o
6 6
7qlcnic-y := qlcnic_hw.o qlcnic_main.o qlcnic_init.o \ 7qlcnic-y := qlcnic_hw.o qlcnic_main.o qlcnic_init.o \
8 qlcnic_ethtool.o qlcnic_ctx.o qlcnic_io.o \ 8 qlcnic_ethtool.o qlcnic_ctx.o qlcnic_io.o \
9 qlcnic_sysfs.o qlcnic_minidump.o qlcnic_83xx_hw.o 9 qlcnic_sysfs.o qlcnic_minidump.o qlcnic_83xx_hw.o \
10 qlcnic_83xx_init.o
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
index f0bec7e8000c..9a6d093441fa 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
@@ -299,6 +299,12 @@ struct qlcnic_fdt {
299 299
300extern char qlcnic_driver_name[]; 300extern char qlcnic_driver_name[];
301 301
302extern int qlcnic_use_msi;
303extern int qlcnic_use_msi_x;
304extern int qlcnic_auto_fw_reset;
305extern int qlcnic_load_fw_file;
306extern int qlcnic_config_npars;
307
302/* Number of status descriptors to handle per interrupt */ 308/* Number of status descriptors to handle per interrupt */
303#define MAX_STATUS_HANDLE (64) 309#define MAX_STATUS_HANDLE (64)
304 310
@@ -436,6 +442,8 @@ struct qlcnic_hardware_context {
436 struct qlcnic_nic_intr_coalesce coal; 442 struct qlcnic_nic_intr_coalesce coal;
437 struct qlcnic_fw_dump fw_dump; 443 struct qlcnic_fw_dump fw_dump;
438 struct qlcnic_fdt fdt; 444 struct qlcnic_fdt fdt;
445 struct qlc_83xx_idc idc;
446 struct qlc_83xx_fw_info fw_info;
439 struct qlcnic_intrpt_config *intr_tbl; 447 struct qlcnic_intrpt_config *intr_tbl;
440 u32 *reg_tbl; 448 u32 *reg_tbl;
441 u32 *ext_reg_tbl; 449 u32 *ext_reg_tbl;
@@ -947,6 +955,7 @@ struct qlcnic_ipaddr {
947#define QLCNIC_TEST_IN_PROGRESS 52 955#define QLCNIC_TEST_IN_PROGRESS 52
948#define QLCNIC_UNDEFINED_ERROR 53 956#define QLCNIC_UNDEFINED_ERROR 53
949#define QLCNIC_LB_CABLE_NOT_CONN 54 957#define QLCNIC_LB_CABLE_NOT_CONN 54
958#define QLCNIC_ILB_MAX_RCV_LOOP 10
950 959
951struct qlcnic_filter { 960struct qlcnic_filter {
952 struct hlist_node fnode; 961 struct hlist_node fnode;
@@ -1470,6 +1479,7 @@ int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1470/* eSwitch management functions */ 1479/* eSwitch management functions */
1471int qlcnic_config_switch_port(struct qlcnic_adapter *, 1480int qlcnic_config_switch_port(struct qlcnic_adapter *,
1472 struct qlcnic_esw_func_cfg *); 1481 struct qlcnic_esw_func_cfg *);
1482
1473int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *, 1483int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1474 struct qlcnic_esw_func_cfg *); 1484 struct qlcnic_esw_func_cfg *);
1475int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8); 1485int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
@@ -1501,6 +1511,9 @@ void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1501 struct qlcnic_esw_func_cfg *); 1511 struct qlcnic_esw_func_cfg *);
1502void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *, 1512void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1503 struct qlcnic_esw_func_cfg *); 1513 struct qlcnic_esw_func_cfg *);
1514
1515void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1516int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1504void __qlcnic_down(struct qlcnic_adapter *, struct net_device *); 1517void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1505void qlcnic_detach(struct qlcnic_adapter *); 1518void qlcnic_detach(struct qlcnic_adapter *);
1506void qlcnic_teardown_intr(struct qlcnic_adapter *); 1519void qlcnic_teardown_intr(struct qlcnic_adapter *);
@@ -1508,6 +1521,7 @@ int qlcnic_attach(struct qlcnic_adapter *);
1508int __qlcnic_up(struct qlcnic_adapter *, struct net_device *); 1521int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1509void qlcnic_restore_indev_addr(struct net_device *, unsigned long); 1522void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1510 1523
1524int qlcnic_check_temp(struct qlcnic_adapter *);
1511 1525
1512/* 1526/*
1513 * QLOGIC Board information 1527 * QLOGIC Board information
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
index a4a521e19eae..8fdc4e681028 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
@@ -267,6 +267,8 @@ static struct qlcnic_hardware_ops qlcnic_83xx_hw_ops = {
267static struct qlcnic_nic_template qlcnic_83xx_ops = { 267static struct qlcnic_nic_template qlcnic_83xx_ops = {
268 .config_bridged_mode = qlcnic_config_bridged_mode, 268 .config_bridged_mode = qlcnic_config_bridged_mode,
269 .config_led = qlcnic_config_led, 269 .config_led = qlcnic_config_led,
270 .request_reset = qlcnic_83xx_idc_request_reset,
271 .cancel_idc_work = qlcnic_83xx_idc_exit,
270 .napi_add = qlcnic_83xx_napi_add, 272 .napi_add = qlcnic_83xx_napi_add,
271 .napi_del = qlcnic_83xx_napi_del, 273 .napi_del = qlcnic_83xx_napi_del,
272 .config_ipaddr = qlcnic_83xx_config_ipaddr, 274 .config_ipaddr = qlcnic_83xx_config_ipaddr,
@@ -589,6 +591,7 @@ int qlcnic_83xx_get_port_info(struct qlcnic_adapter *adapter)
589 adapter->ahw->port_type = QLCNIC_XGBE; 591 adapter->ahw->port_type = QLCNIC_XGBE;
590 else 592 else
591 adapter->ahw->port_type = QLCNIC_GBE; 593 adapter->ahw->port_type = QLCNIC_GBE;
594
592 if (QLC_83XX_AUTONEG(adapter->ahw->port_config)) 595 if (QLC_83XX_AUTONEG(adapter->ahw->port_config))
593 adapter->ahw->link_autoneg = AUTONEG_ENABLE; 596 adapter->ahw->link_autoneg = AUTONEG_ENABLE;
594 } 597 }
@@ -603,6 +606,7 @@ void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *adapter)
603 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8); 606 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8);
604 else 607 else
605 val = BIT_2; 608 val = BIT_2;
609
606 QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, val); 610 QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, val);
607} 611}
608 612
@@ -612,9 +616,7 @@ void qlcnic_83xx_check_vf(struct qlcnic_adapter *adapter,
612 u32 op_mode, priv_level; 616 u32 op_mode, priv_level;
613 struct qlcnic_hardware_context *ahw = adapter->ahw; 617 struct qlcnic_hardware_context *ahw = adapter->ahw;
614 618
615 /* Determine FW API version */
616 ahw->fw_hal_version = 2; 619 ahw->fw_hal_version = 2;
617 /* Find PCI function number */
618 qlcnic_get_func_no(adapter); 620 qlcnic_get_func_no(adapter);
619 621
620 /* Determine function privilege level */ 622 /* Determine function privilege level */
@@ -691,6 +693,13 @@ int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
691 struct qlcnic_hardware_context *ahw = adapter->ahw; 693 struct qlcnic_hardware_context *ahw = adapter->ahw;
692 694
693 opcode = LSW(cmd->req.arg[0]); 695 opcode = LSW(cmd->req.arg[0]);
696 if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
697 dev_info(&adapter->pdev->dev,
698 "Mailbox cmd attempted, 0x%x\n", opcode);
699 dev_info(&adapter->pdev->dev, "Mailbox detached\n");
700 return 0;
701 }
702
694 spin_lock(&ahw->mbx_lock); 703 spin_lock(&ahw->mbx_lock);
695 mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL); 704 mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
696 705
@@ -853,6 +862,7 @@ static void qlcnic_83xx_handle_idc_comp_aen(struct qlcnic_adapter *adapter,
853{ 862{
854 dev_dbg(&adapter->pdev->dev, "Completion AEN:0x%x.\n", 863 dev_dbg(&adapter->pdev->dev, "Completion AEN:0x%x.\n",
855 QLCNIC_MBX_RSP(data[0])); 864 QLCNIC_MBX_RSP(data[0]));
865 clear_bit(QLC_83XX_IDC_COMP_AEN, &adapter->ahw->idc.status);
856 return; 866 return;
857} 867}
858 868
@@ -1306,7 +1316,7 @@ int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *adapter, u32 mode)
1306int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode) 1316int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1307{ 1317{
1308 struct qlcnic_hardware_context *ahw = adapter->ahw; 1318 struct qlcnic_hardware_context *ahw = adapter->ahw;
1309 int status = 0; 1319 int status = 0, loop = 0;
1310 u32 config; 1320 u32 config;
1311 1321
1312 status = qlcnic_83xx_get_port_config(adapter); 1322 status = qlcnic_83xx_get_port_config(adapter);
@@ -1314,6 +1324,7 @@ int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1314 return status; 1324 return status;
1315 1325
1316 config = ahw->port_config; 1326 config = ahw->port_config;
1327 set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1317 1328
1318 if (mode == QLCNIC_ILB_MODE) 1329 if (mode == QLCNIC_ILB_MODE)
1319 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_HSS; 1330 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_HSS;
@@ -1326,9 +1337,21 @@ int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1326 "Failed to Set Loopback Mode = 0x%x.\n", 1337 "Failed to Set Loopback Mode = 0x%x.\n",
1327 ahw->port_config); 1338 ahw->port_config);
1328 ahw->port_config = config; 1339 ahw->port_config = config;
1340 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1329 return status; 1341 return status;
1330 } 1342 }
1331 1343
1344 /* Wait until firmware send IDC Completion AEN */
1345 do {
1346 msleep(300);
1347 if (loop++ > QLCNIC_ILB_MAX_RCV_LOOP) {
1348 dev_err(&adapter->pdev->dev,
1349 "FW did not generate IDC completion AEN\n");
1350 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1351 return -EIO;
1352 }
1353 } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
1354
1332 qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0, 1355 qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0,
1333 QLCNIC_MAC_ADD); 1356 QLCNIC_MAC_ADD);
1334 return status; 1357 return status;
@@ -1337,9 +1360,10 @@ int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1337int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode) 1360int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1338{ 1361{
1339 struct qlcnic_hardware_context *ahw = adapter->ahw; 1362 struct qlcnic_hardware_context *ahw = adapter->ahw;
1340 int status = 0; 1363 int status = 0, loop = 0;
1341 u32 config = ahw->port_config; 1364 u32 config = ahw->port_config;
1342 1365
1366 set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1343 if (mode == QLCNIC_ILB_MODE) 1367 if (mode == QLCNIC_ILB_MODE)
1344 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_HSS; 1368 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_HSS;
1345 if (mode == QLCNIC_ELB_MODE) 1369 if (mode == QLCNIC_ELB_MODE)
@@ -1351,9 +1375,21 @@ int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1351 "Failed to Clear Loopback Mode = 0x%x.\n", 1375 "Failed to Clear Loopback Mode = 0x%x.\n",
1352 ahw->port_config); 1376 ahw->port_config);
1353 ahw->port_config = config; 1377 ahw->port_config = config;
1378 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1354 return status; 1379 return status;
1355 } 1380 }
1356 1381
1382 /* Wait until firmware send IDC Completion AEN */
1383 do {
1384 msleep(300);
1385 if (loop++ > QLCNIC_ILB_MAX_RCV_LOOP) {
1386 dev_err(&adapter->pdev->dev,
1387 "Firmware didn't sent IDC completion AEN\n");
1388 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1389 return -EIO;
1390 }
1391 } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
1392
1357 qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0, 1393 qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0,
1358 QLCNIC_MAC_DEL); 1394 QLCNIC_MAC_DEL);
1359 return status; 1395 return status;
@@ -1813,9 +1849,9 @@ void qlcnic_83xx_unlock_flash(struct qlcnic_adapter *adapter)
1813 QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER, 0xFF); 1849 QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER, 0xFF);
1814} 1850}
1815 1851
1816static int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *adapter, 1852int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *adapter,
1817 u32 flash_addr, u8 *p_data, 1853 u32 flash_addr, u8 *p_data,
1818 int count) 1854 int count)
1819{ 1855{
1820 int i, ret; 1856 int i, ret;
1821 u32 word, range, flash_offset, addr = flash_addr; 1857 u32 word, range, flash_offset, addr = flash_addr;
@@ -2142,3 +2178,168 @@ int qlcnic_83xx_flash_bulk_write(struct qlcnic_adapter *adapter, u32 addr,
2142 2178
2143 return 0; 2179 return 0;
2144} 2180}
2181
2182static void qlcnic_83xx_recover_driver_lock(struct qlcnic_adapter *adapter)
2183{
2184 u32 val, id;
2185
2186 val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK);
2187
2188 /* Check if recovery need to be performed by the calling function */
2189 if ((val & QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK) == 0) {
2190 val = val & ~0x3F;
2191 val = val | ((adapter->portnum << 2) |
2192 QLC_83XX_NEED_DRV_LOCK_RECOVERY);
2193 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2194 dev_info(&adapter->pdev->dev,
2195 "%s: lock recovery initiated\n", __func__);
2196 msleep(QLC_83XX_DRV_LOCK_RECOVERY_DELAY);
2197 val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK);
2198 id = ((val >> 2) & 0xF);
2199 if (id == adapter->portnum) {
2200 val = val & ~QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK;
2201 val = val | QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS;
2202 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2203 /* Force release the lock */
2204 QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK);
2205 /* Clear recovery bits */
2206 val = val & ~0x3F;
2207 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2208 dev_info(&adapter->pdev->dev,
2209 "%s: lock recovery completed\n", __func__);
2210 } else {
2211 dev_info(&adapter->pdev->dev,
2212 "%s: func %d to resume lock recovery process\n",
2213 __func__, id);
2214 }
2215 } else {
2216 dev_info(&adapter->pdev->dev,
2217 "%s: lock recovery initiated by other functions\n",
2218 __func__);
2219 }
2220}
2221
2222int qlcnic_83xx_lock_driver(struct qlcnic_adapter *adapter)
2223{
2224 u32 lock_alive_counter, val, id, i = 0, status = 0, temp = 0;
2225 int max_attempt = 0;
2226
2227 while (status == 0) {
2228 status = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK);
2229 if (status)
2230 break;
2231
2232 msleep(QLC_83XX_DRV_LOCK_WAIT_DELAY);
2233 i++;
2234
2235 if (i == 1)
2236 temp = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2237
2238 if (i == QLC_83XX_DRV_LOCK_WAIT_COUNTER) {
2239 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2240 if (val == temp) {
2241 id = val & 0xFF;
2242 dev_info(&adapter->pdev->dev,
2243 "%s: lock to be recovered from %d\n",
2244 __func__, id);
2245 qlcnic_83xx_recover_driver_lock(adapter);
2246 i = 0;
2247 max_attempt++;
2248 } else {
2249 dev_err(&adapter->pdev->dev,
2250 "%s: failed to get lock\n", __func__);
2251 return -EIO;
2252 }
2253 }
2254
2255 /* Force exit from while loop after few attempts */
2256 if (max_attempt == QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT) {
2257 dev_err(&adapter->pdev->dev,
2258 "%s: failed to get lock\n", __func__);
2259 return -EIO;
2260 }
2261 }
2262
2263 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2264 lock_alive_counter = val >> 8;
2265 lock_alive_counter++;
2266 val = lock_alive_counter << 8 | adapter->portnum;
2267 QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val);
2268
2269 return 0;
2270}
2271
2272void qlcnic_83xx_unlock_driver(struct qlcnic_adapter *adapter)
2273{
2274 u32 val, lock_alive_counter, id;
2275
2276 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2277 id = val & 0xFF;
2278 lock_alive_counter = val >> 8;
2279
2280 if (id != adapter->portnum)
2281 dev_err(&adapter->pdev->dev,
2282 "%s:Warning func %d is unlocking lock owned by %d\n",
2283 __func__, adapter->portnum, id);
2284
2285 val = (lock_alive_counter << 8) | 0xFF;
2286 QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val);
2287 QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK);
2288}
2289
2290int qlcnic_83xx_ms_mem_write128(struct qlcnic_adapter *adapter, u64 addr,
2291 u32 *data, u32 count)
2292{
2293 int i, j, ret = 0;
2294 u32 temp;
2295
2296 /* Check alignment */
2297 if (addr & 0xF)
2298 return -EIO;
2299
2300 mutex_lock(&adapter->ahw->mem_lock);
2301 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_ADDR_HI, 0);
2302
2303 for (i = 0; i < count; i++, addr += 16) {
2304 if (!((ADDR_IN_RANGE(addr, QLCNIC_ADDR_QDR_NET,
2305 QLCNIC_ADDR_QDR_NET_MAX)) ||
2306 (ADDR_IN_RANGE(addr, QLCNIC_ADDR_DDR_NET,
2307 QLCNIC_ADDR_DDR_NET_MAX)))) {
2308 mutex_unlock(&adapter->ahw->mem_lock);
2309 return -EIO;
2310 }
2311
2312 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_ADDR_LO, addr);
2313 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_LO,
2314 *data++);
2315 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_HI,
2316 *data++);
2317 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_ULO,
2318 *data++);
2319 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_UHI,
2320 *data++);
2321 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_CTRL,
2322 QLCNIC_TA_WRITE_ENABLE);
2323 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_CTRL,
2324 QLCNIC_TA_WRITE_START);
2325
2326 for (j = 0; j < MAX_CTL_CHECK; j++) {
2327 temp = qlcnic_83xx_rd_reg_indirect(adapter,
2328 QLCNIC_MS_CTRL);
2329 if ((temp & TA_CTL_BUSY) == 0)
2330 break;
2331 }
2332
2333 /* Status check failure */
2334 if (j >= MAX_CTL_CHECK) {
2335 printk_ratelimited(KERN_WARNING
2336 "MS memory write failed\n");
2337 mutex_unlock(&adapter->ahw->mem_lock);
2338 return -EIO;
2339 }
2340 }
2341
2342 mutex_unlock(&adapter->ahw->mem_lock);
2343
2344 return ret;
2345}
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
index 45199958bca0..99b84277b86f 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
@@ -53,6 +53,30 @@
53#define QLCNIC_HOST_RDS_MBX_IDX 88 53#define QLCNIC_HOST_RDS_MBX_IDX 88
54#define QLCNIC_MAX_RING_SETS 8 54#define QLCNIC_MAX_RING_SETS 8
55 55
56/* Pause control registers */
57#define QLC_83XX_SRE_SHIM_REG 0x0D200284
58#define QLC_83XX_PORT0_THRESHOLD 0x0B2003A4
59#define QLC_83XX_PORT1_THRESHOLD 0x0B2013A4
60#define QLC_83XX_PORT0_TC_MC_REG 0x0B200388
61#define QLC_83XX_PORT1_TC_MC_REG 0x0B201388
62#define QLC_83XX_PORT0_TC_STATS 0x0B20039C
63#define QLC_83XX_PORT1_TC_STATS 0x0B20139C
64#define QLC_83XX_PORT2_IFB_THRESHOLD 0x0B200704
65#define QLC_83XX_PORT3_IFB_THRESHOLD 0x0B201704
66
67/* Peg PC status registers */
68#define QLC_83XX_CRB_PEG_NET_0 0x3400003c
69#define QLC_83XX_CRB_PEG_NET_1 0x3410003c
70#define QLC_83XX_CRB_PEG_NET_2 0x3420003c
71#define QLC_83XX_CRB_PEG_NET_3 0x3430003c
72#define QLC_83XX_CRB_PEG_NET_4 0x34b0003c
73
74/* Firmware image definitions */
75#define QLC_83XX_BOOTLOADER_FLASH_ADDR 0x10000
76#define QLC_83XX_FW_FILE_NAME "83xx_fw.bin"
77#define QLC_83XX_BOOT_FROM_FLASH 0
78#define QLC_83XX_BOOT_FROM_FILE 0x12345678
79
56struct qlcnic_intrpt_config { 80struct qlcnic_intrpt_config {
57 u8 type; 81 u8 type;
58 u8 enabled; 82 u8 enabled;
@@ -65,6 +89,49 @@ struct qlcnic_macvlan_mbx {
65 u16 vlan; 89 u16 vlan;
66}; 90};
67 91
92struct qlc_83xx_fw_info {
93 const struct firmware *fw;
94 u16 major_fw_version;
95 u8 minor_fw_version;
96 u8 sub_fw_version;
97 u8 fw_build_num;
98 u8 load_from_file;
99};
100
101#define QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY 0x1
102#define QLC_83XX_IDC_GRACEFULL_RESET 0x2
103#define QLC_83XX_IDC_TIMESTAMP 0
104#define QLC_83XX_IDC_DURATION 1
105#define QLC_83XX_IDC_INIT_TIMEOUT_SECS 30
106#define QLC_83XX_IDC_RESET_ACK_TIMEOUT_SECS 10
107#define QLC_83XX_IDC_RESET_TIMEOUT_SECS 10
108#define QLC_83XX_IDC_QUIESCE_ACK_TIMEOUT_SECS 20
109#define QLC_83XX_IDC_FW_POLL_DELAY (1 * HZ)
110#define QLC_83XX_IDC_FW_FAIL_THRESH 2
111#define QLC_83XX_IDC_MAX_FUNC_PER_PARTITION_INFO 8
112#define QLC_83XX_IDC_MAX_CNA_FUNCTIONS 16
113#define QLC_83XX_IDC_MAJOR_VERSION 1
114#define QLC_83XX_IDC_MINOR_VERSION 0
115#define QLC_83XX_IDC_FLASH_PARAM_ADDR 0x3e8020
116
117/* Mailbox process AEN count */
118#define QLC_83XX_MBX_AEN_CNT 5
119
120struct qlcnic_adapter;
121struct qlc_83xx_idc {
122 int (*state_entry) (struct qlcnic_adapter *);
123 u64 sec_counter;
124 u64 delay;
125 unsigned long status;
126 int err_code;
127 int collect_dump;
128 u8 curr_state;
129 u8 prev_state;
130 u8 vnic_state;
131 u8 vnic_wait_limit;
132 u8 quiesce_req;
133 char **name;
134};
68 135
69/* Mailbox process AEN count */ 136/* Mailbox process AEN count */
70#define QLC_83XX_IDC_COMP_AEN 3 137#define QLC_83XX_IDC_COMP_AEN 3
@@ -303,4 +370,17 @@ int qlcnic_83xx_save_flash_status(struct qlcnic_adapter *);
303int qlcnic_83xx_restore_flash_status(struct qlcnic_adapter *, int); 370int qlcnic_83xx_restore_flash_status(struct qlcnic_adapter *, int);
304int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *); 371int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *);
305int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *); 372int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *);
373int qlcnic_83xx_flash_read32(struct qlcnic_adapter *, u32, u8 *, int);
374int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *,
375 u32, u8 *, int);
376int qlcnic_83xx_init(struct qlcnic_adapter *);
377int qlcnic_83xx_idc_ready_state_entry(struct qlcnic_adapter *);
378int qlcnic_83xx_check_hw_status(struct qlcnic_adapter *p_dev);
379void qlcnic_83xx_idc_poll_dev_state(struct work_struct *);
380void qlcnic_83xx_idc_exit(struct qlcnic_adapter *);
381void qlcnic_83xx_idc_request_reset(struct qlcnic_adapter *, u32);
382int qlcnic_83xx_lock_driver(struct qlcnic_adapter *);
383void qlcnic_83xx_unlock_driver(struct qlcnic_adapter *);
384int qlcnic_83xx_set_default_offload_settings(struct qlcnic_adapter *);
385int qlcnic_83xx_ms_mem_write128(struct qlcnic_adapter *, u64, u32 *, u32);
306#endif 386#endif
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
new file mode 100644
index 000000000000..c26d1901900a
--- /dev/null
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
@@ -0,0 +1,1513 @@
1#include "qlcnic.h"
2#include "qlcnic_hw.h"
3
4static int qlcnic_83xx_init_default_driver(struct qlcnic_adapter *adapter);
5static int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
6static int qlcnic_83xx_check_heartbeat(struct qlcnic_adapter *p_dev);
7static int qlcnic_83xx_restart_hw(struct qlcnic_adapter *adapter);
8
9static const char *const qlc_83xx_idc_states[] = {
10 "Unknown",
11 "Cold",
12 "Init",
13 "Ready",
14 "Need Reset",
15 "Need Quiesce",
16 "Failed",
17 "Quiesce"
18};
19
20/* Device States */
21enum qlcnic_83xx_states {
22 QLC_83XX_IDC_DEV_UNKNOWN,
23 QLC_83XX_IDC_DEV_COLD,
24 QLC_83XX_IDC_DEV_INIT,
25 QLC_83XX_IDC_DEV_READY,
26 QLC_83XX_IDC_DEV_NEED_RESET,
27 QLC_83XX_IDC_DEV_NEED_QUISCENT,
28 QLC_83XX_IDC_DEV_FAILED,
29 QLC_83XX_IDC_DEV_QUISCENT
30};
31
32static int
33qlcnic_83xx_idc_check_driver_presence_reg(struct qlcnic_adapter *adapter)
34{
35 u32 val;
36
37 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
38 if ((val & 0xFFFF))
39 return 1;
40 else
41 return 0;
42}
43
44static void qlcnic_83xx_idc_log_state_history(struct qlcnic_adapter *adapter)
45{
46 u32 cur, prev;
47 cur = adapter->ahw->idc.curr_state;
48 prev = adapter->ahw->idc.prev_state;
49
50 dev_info(&adapter->pdev->dev,
51 "current state = %s, prev state = %s\n",
52 adapter->ahw->idc.name[cur],
53 adapter->ahw->idc.name[prev]);
54}
55
56static int qlcnic_83xx_idc_update_audit_reg(struct qlcnic_adapter *adapter,
57 u8 mode, int lock)
58{
59 u32 val;
60 int seconds;
61
62 if (lock) {
63 if (qlcnic_83xx_lock_driver(adapter))
64 return -EBUSY;
65 }
66
67 val = adapter->portnum & 0xf;
68 val |= mode << 7;
69 if (mode)
70 seconds = jiffies / HZ - adapter->ahw->idc.sec_counter;
71 else
72 seconds = jiffies / HZ;
73
74 val |= seconds << 8;
75 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_AUDIT, val);
76 adapter->ahw->idc.sec_counter = jiffies / HZ;
77
78 if (lock)
79 qlcnic_83xx_unlock_driver(adapter);
80
81 return 0;
82}
83
84static void qlcnic_83xx_idc_update_minor_version(struct qlcnic_adapter *adapter)
85{
86 u32 val;
87
88 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_MIN_VERSION);
89 val = val & ~(0x3 << (adapter->portnum * 2));
90 val = val | (QLC_83XX_IDC_MINOR_VERSION << (adapter->portnum * 2));
91 QLCWRX(adapter->ahw, QLC_83XX_IDC_MIN_VERSION, val);
92}
93
94static int qlcnic_83xx_idc_update_major_version(struct qlcnic_adapter *adapter,
95 int lock)
96{
97 u32 val;
98
99 if (lock) {
100 if (qlcnic_83xx_lock_driver(adapter))
101 return -EBUSY;
102 }
103
104 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_MAJ_VERSION);
105 val = val & ~0xFF;
106 val = val | QLC_83XX_IDC_MAJOR_VERSION;
107 QLCWRX(adapter->ahw, QLC_83XX_IDC_MAJ_VERSION, val);
108
109 if (lock)
110 qlcnic_83xx_unlock_driver(adapter);
111
112 return 0;
113}
114
115static int
116qlcnic_83xx_idc_update_drv_presence_reg(struct qlcnic_adapter *adapter,
117 int status, int lock)
118{
119 u32 val;
120
121 if (lock) {
122 if (qlcnic_83xx_lock_driver(adapter))
123 return -EBUSY;
124 }
125
126 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
127
128 if (status)
129 val = val | (1 << adapter->portnum);
130 else
131 val = val & ~(1 << adapter->portnum);
132
133 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE, val);
134 qlcnic_83xx_idc_update_minor_version(adapter);
135
136 if (lock)
137 qlcnic_83xx_unlock_driver(adapter);
138
139 return 0;
140}
141
142static int qlcnic_83xx_idc_check_major_version(struct qlcnic_adapter *adapter)
143{
144 u32 val;
145 u8 version;
146
147 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_MAJ_VERSION);
148 version = val & 0xFF;
149
150 if (version != QLC_83XX_IDC_MAJOR_VERSION) {
151 dev_info(&adapter->pdev->dev,
152 "%s:mismatch. version 0x%x, expected version 0x%x\n",
153 __func__, version, QLC_83XX_IDC_MAJOR_VERSION);
154 return -EIO;
155 }
156
157 return 0;
158}
159
160static int qlcnic_83xx_idc_clear_registers(struct qlcnic_adapter *adapter,
161 int lock)
162{
163 u32 val;
164
165 if (lock) {
166 if (qlcnic_83xx_lock_driver(adapter))
167 return -EBUSY;
168 }
169
170 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_ACK, 0);
171 /* Clear gracefull reset bit */
172 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
173 val &= ~QLC_83XX_IDC_GRACEFULL_RESET;
174 QLCWRX(adapter->ahw, QLC_83XX_IDC_CTRL, val);
175
176 if (lock)
177 qlcnic_83xx_unlock_driver(adapter);
178
179 return 0;
180}
181
182static int qlcnic_83xx_idc_update_drv_ack_reg(struct qlcnic_adapter *adapter,
183 int flag, int lock)
184{
185 u32 val;
186
187 if (lock) {
188 if (qlcnic_83xx_lock_driver(adapter))
189 return -EBUSY;
190 }
191
192 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_ACK);
193 if (flag)
194 val = val | (1 << adapter->portnum);
195 else
196 val = val & ~(1 << adapter->portnum);
197 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_ACK, val);
198
199 if (lock)
200 qlcnic_83xx_unlock_driver(adapter);
201
202 return 0;
203}
204
205static int qlcnic_83xx_idc_check_timeout(struct qlcnic_adapter *adapter,
206 int time_limit)
207{
208 u64 seconds;
209
210 seconds = jiffies / HZ - adapter->ahw->idc.sec_counter;
211 if (seconds <= time_limit)
212 return 0;
213 else
214 return -EBUSY;
215}
216
217/**
218 * qlcnic_83xx_idc_check_reset_ack_reg
219 *
220 * @adapter: adapter structure
221 *
222 * Check ACK wait limit and clear the functions which failed to ACK
223 *
224 * Return 0 if all functions have acknowledged the reset request.
225 **/
226static int qlcnic_83xx_idc_check_reset_ack_reg(struct qlcnic_adapter *adapter)
227{
228 int timeout;
229 u32 ack, presence, val;
230
231 timeout = QLC_83XX_IDC_RESET_TIMEOUT_SECS;
232 ack = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_ACK);
233 presence = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
234 dev_info(&adapter->pdev->dev,
235 "%s: ack = 0x%x, presence = 0x%x\n", __func__, ack, presence);
236 if (!((ack & presence) == presence)) {
237 if (qlcnic_83xx_idc_check_timeout(adapter, timeout)) {
238 /* Clear functions which failed to ACK */
239 dev_info(&adapter->pdev->dev,
240 "%s: ACK wait exceeds time limit\n", __func__);
241 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
242 val = val & ~(ack ^ presence);
243 if (qlcnic_83xx_lock_driver(adapter))
244 return -EBUSY;
245 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE, val);
246 dev_info(&adapter->pdev->dev,
247 "%s: updated drv presence reg = 0x%x\n",
248 __func__, val);
249 qlcnic_83xx_unlock_driver(adapter);
250 return 0;
251
252 } else {
253 return 1;
254 }
255 } else {
256 dev_info(&adapter->pdev->dev,
257 "%s: Reset ACK received from all functions\n",
258 __func__);
259 return 0;
260 }
261}
262
263/**
264 * qlcnic_83xx_idc_tx_soft_reset
265 *
266 * @adapter: adapter structure
267 *
268 * Handle context deletion and recreation request from transmit routine
269 *
270 * Returns -EBUSY or Success (0)
271 *
272 **/
273static int qlcnic_83xx_idc_tx_soft_reset(struct qlcnic_adapter *adapter)
274{
275 struct net_device *netdev = adapter->netdev;
276
277 if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
278 return -EBUSY;
279
280 netif_device_detach(netdev);
281 qlcnic_down(adapter, netdev);
282 qlcnic_up(adapter, netdev);
283 netif_device_attach(netdev);
284 clear_bit(__QLCNIC_RESETTING, &adapter->state);
285 dev_err(&adapter->pdev->dev, "%s:\n", __func__);
286
287 adapter->netdev->trans_start = jiffies;
288
289 return 0;
290}
291
292/**
293 * qlcnic_83xx_idc_detach_driver
294 *
295 * @adapter: adapter structure
296 * Detach net interface, stop TX and cleanup resources before the HW reset.
297 * Returns: None
298 *
299 **/
300static void qlcnic_83xx_idc_detach_driver(struct qlcnic_adapter *adapter)
301{
302 int i;
303 struct net_device *netdev = adapter->netdev;
304
305 netif_device_detach(netdev);
306 /* Disable mailbox interrupt */
307 QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, 0);
308 qlcnic_down(adapter, netdev);
309 for (i = 0; i < adapter->ahw->num_msix; i++) {
310 adapter->ahw->intr_tbl[i].id = i;
311 adapter->ahw->intr_tbl[i].enabled = 0;
312 adapter->ahw->intr_tbl[i].src = 0;
313 }
314}
315
316/**
317 * qlcnic_83xx_idc_attach_driver
318 *
319 * @adapter: adapter structure
320 *
321 * Re-attach and re-enable net interface
322 * Returns: None
323 *
324 **/
325static void qlcnic_83xx_idc_attach_driver(struct qlcnic_adapter *adapter)
326{
327 struct net_device *netdev = adapter->netdev;
328
329 if (netif_running(netdev)) {
330 if (qlcnic_up(adapter, netdev))
331 goto done;
332 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
333 }
334done:
335 netif_device_attach(netdev);
336 if (netif_running(netdev)) {
337 netif_carrier_on(netdev);
338 netif_wake_queue(netdev);
339 }
340}
341
342static int qlcnic_83xx_idc_enter_failed_state(struct qlcnic_adapter *adapter,
343 int lock)
344{
345 if (lock) {
346 if (qlcnic_83xx_lock_driver(adapter))
347 return -EBUSY;
348 }
349
350 qlcnic_83xx_idc_clear_registers(adapter, 0);
351 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE, QLC_83XX_IDC_DEV_FAILED);
352 if (lock)
353 qlcnic_83xx_unlock_driver(adapter);
354
355 qlcnic_83xx_idc_log_state_history(adapter);
356 dev_info(&adapter->pdev->dev, "Device will enter failed state\n");
357
358 return 0;
359}
360
361static int qlcnic_83xx_idc_enter_init_state(struct qlcnic_adapter *adapter,
362 int lock)
363{
364 if (lock) {
365 if (qlcnic_83xx_lock_driver(adapter))
366 return -EBUSY;
367 }
368
369 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE, QLC_83XX_IDC_DEV_INIT);
370
371 if (lock)
372 qlcnic_83xx_unlock_driver(adapter);
373
374 return 0;
375}
376
377static int qlcnic_83xx_idc_enter_need_quiesce(struct qlcnic_adapter *adapter,
378 int lock)
379{
380 if (lock) {
381 if (qlcnic_83xx_lock_driver(adapter))
382 return -EBUSY;
383 }
384
385 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE,
386 QLC_83XX_IDC_DEV_NEED_QUISCENT);
387
388 if (lock)
389 qlcnic_83xx_unlock_driver(adapter);
390
391 return 0;
392}
393
394static int
395qlcnic_83xx_idc_enter_need_reset_state(struct qlcnic_adapter *adapter, int lock)
396{
397 if (lock) {
398 if (qlcnic_83xx_lock_driver(adapter))
399 return -EBUSY;
400 }
401
402 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE,
403 QLC_83XX_IDC_DEV_NEED_RESET);
404
405 if (lock)
406 qlcnic_83xx_unlock_driver(adapter);
407
408 return 0;
409}
410
411static int qlcnic_83xx_idc_enter_ready_state(struct qlcnic_adapter *adapter,
412 int lock)
413{
414 if (lock) {
415 if (qlcnic_83xx_lock_driver(adapter))
416 return -EBUSY;
417 }
418
419 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE, QLC_83XX_IDC_DEV_READY);
420 if (lock)
421 qlcnic_83xx_unlock_driver(adapter);
422
423 return 0;
424}
425
426/**
427 * qlcnic_83xx_idc_find_reset_owner_id
428 *
429 * @adapter: adapter structure
430 *
431 * NIC gets precedence over ISCSI and ISCSI has precedence over FCOE.
432 * Within the same class, function with lowest PCI ID assumes ownership
433 *
434 * Returns: reset owner id or failure indication (-EIO)
435 *
436 **/
437static int qlcnic_83xx_idc_find_reset_owner_id(struct qlcnic_adapter *adapter)
438{
439 u32 reg, reg1, reg2, i, j, owner, class;
440
441 reg1 = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_PARTITION_INFO_1);
442 reg2 = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_PARTITION_INFO_2);
443 owner = QLCNIC_TYPE_NIC;
444 i = 0;
445 j = 0;
446 reg = reg1;
447
448 do {
449 class = (((reg & (0xF << j * 4)) >> j * 4) & 0x3);
450 if (class == owner)
451 break;
452 if (i == (QLC_83XX_IDC_MAX_FUNC_PER_PARTITION_INFO - 1)) {
453 reg = reg2;
454 j = 0;
455 } else {
456 j++;
457 }
458
459 if (i == (QLC_83XX_IDC_MAX_CNA_FUNCTIONS - 1)) {
460 if (owner == QLCNIC_TYPE_NIC)
461 owner = QLCNIC_TYPE_ISCSI;
462 else if (owner == QLCNIC_TYPE_ISCSI)
463 owner = QLCNIC_TYPE_FCOE;
464 else if (owner == QLCNIC_TYPE_FCOE)
465 return -EIO;
466 reg = reg1;
467 j = 0;
468 i = 0;
469 }
470 } while (i++ < QLC_83XX_IDC_MAX_CNA_FUNCTIONS);
471
472 return i;
473}
474
475static int qlcnic_83xx_idc_restart_hw(struct qlcnic_adapter *adapter, int lock)
476{
477 int ret = 0;
478
479 ret = qlcnic_83xx_restart_hw(adapter);
480
481 if (ret) {
482 qlcnic_83xx_idc_enter_failed_state(adapter, lock);
483 } else {
484 qlcnic_83xx_idc_clear_registers(adapter, lock);
485 ret = qlcnic_83xx_idc_enter_ready_state(adapter, lock);
486 }
487
488 return ret;
489}
490
491static int qlcnic_83xx_idc_check_fan_failure(struct qlcnic_adapter *adapter)
492{
493 u32 status;
494
495 status = QLC_SHARED_REG_RD32(adapter, QLCNIC_PEG_HALT_STATUS1);
496
497 if (status & QLCNIC_RCODE_FATAL_ERROR) {
498 dev_err(&adapter->pdev->dev,
499 "peg halt status1=0x%x\n", status);
500 if (QLCNIC_FWERROR_CODE(status) == QLCNIC_FWERROR_FAN_FAILURE) {
501 dev_err(&adapter->pdev->dev,
502 "On board active cooling fan failed. "
503 "Device has been halted.\n");
504 dev_err(&adapter->pdev->dev,
505 "Replace the adapter.\n");
506 return -EIO;
507 }
508 }
509
510 return 0;
511}
512
513static int qlcnic_83xx_idc_reattach_driver(struct qlcnic_adapter *adapter)
514{
515 qlcnic_83xx_enable_mbx_intrpt(adapter);
516 if ((adapter->flags & QLCNIC_MSIX_ENABLED)) {
517 if (qlcnic_83xx_config_intrpt(adapter, 1)) {
518 netdev_err(adapter->netdev,
519 "Failed to enable mbx intr\n");
520 return -EIO;
521 }
522 }
523
524 if (qlcnic_83xx_configure_opmode(adapter)) {
525 qlcnic_83xx_idc_enter_failed_state(adapter, 1);
526 return -EIO;
527 }
528
529 if (adapter->nic_ops->init_driver(adapter)) {
530 qlcnic_83xx_idc_enter_failed_state(adapter, 1);
531 return -EIO;
532 }
533
534 qlcnic_83xx_idc_attach_driver(adapter);
535
536 return 0;
537}
538
539static void qlcnic_83xx_idc_update_idc_params(struct qlcnic_adapter *adapter)
540{
541 qlcnic_83xx_idc_update_drv_presence_reg(adapter, 1, 1);
542 clear_bit(__QLCNIC_RESETTING, &adapter->state);
543 set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
544 qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
545 set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
546 adapter->ahw->idc.quiesce_req = 0;
547 adapter->ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
548 adapter->ahw->idc.err_code = 0;
549 adapter->ahw->idc.collect_dump = 0;
550}
551
552/**
553 * qlcnic_83xx_idc_ready_state_entry
554 *
555 * @adapter: adapter structure
556 *
557 * Perform ready state initialization, this routine will get invoked only
558 * once from READY state.
559 *
560 * Returns: Error code or Success(0)
561 *
562 **/
563int qlcnic_83xx_idc_ready_state_entry(struct qlcnic_adapter *adapter)
564{
565 struct qlcnic_hardware_context *ahw = adapter->ahw;
566
567 if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY) {
568 qlcnic_83xx_idc_update_idc_params(adapter);
569 /* Re-attach the device if required */
570 if ((ahw->idc.prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
571 (ahw->idc.prev_state == QLC_83XX_IDC_DEV_INIT)) {
572 if (qlcnic_83xx_idc_reattach_driver(adapter))
573 return -EIO;
574 }
575 }
576
577 return 0;
578}
579
580static int qlcnic_83xx_idc_unknown_state(struct qlcnic_adapter *adapter)
581{
582 adapter->ahw->idc.err_code = -EIO;
583 dev_err(&adapter->pdev->dev,
584 "%s: Device in unknown state\n", __func__);
585 return 0;
586}
587
588/**
589 * qlcnic_83xx_idc_cold_state
590 *
591 * @adapter: adapter structure
592 *
593 * If HW is up and running device will enter READY state.
594 * If firmware image from host needs to be loaded, device is
595 * forced to start with the file firmware image.
596 *
597 * Returns: Error code or Success(0)
598 *
599 **/
600static int qlcnic_83xx_idc_cold_state_handler(struct qlcnic_adapter *adapter)
601{
602 qlcnic_83xx_idc_update_drv_presence_reg(adapter, 1, 0);
603 qlcnic_83xx_idc_update_audit_reg(adapter, 1, 0);
604
605 if (qlcnic_load_fw_file) {
606 qlcnic_83xx_idc_restart_hw(adapter, 0);
607 } else {
608 if (qlcnic_83xx_check_hw_status(adapter)) {
609 qlcnic_83xx_idc_enter_failed_state(adapter, 0);
610 return -EIO;
611 } else {
612 qlcnic_83xx_idc_enter_ready_state(adapter, 0);
613 }
614 }
615 return 0;
616}
617
618/**
619 * qlcnic_83xx_idc_init_state
620 *
621 * @adapter: adapter structure
622 *
623 * Reset owner will restart the device from this state.
624 * Device will enter failed state if it remains
625 * in this state for more than DEV_INIT time limit.
626 *
627 * Returns: Error code or Success(0)
628 *
629 **/
630static int qlcnic_83xx_idc_init_state(struct qlcnic_adapter *adapter)
631{
632 int timeout, ret = 0;
633 u32 owner;
634
635 timeout = QLC_83XX_IDC_INIT_TIMEOUT_SECS;
636 if (adapter->ahw->idc.prev_state == QLC_83XX_IDC_DEV_NEED_RESET) {
637 owner = qlcnic_83xx_idc_find_reset_owner_id(adapter);
638 if (adapter->ahw->pci_func == owner)
639 ret = qlcnic_83xx_idc_restart_hw(adapter, 1);
640 } else {
641 ret = qlcnic_83xx_idc_check_timeout(adapter, timeout);
642 return ret;
643 }
644
645 return ret;
646}
647
648/**
649 * qlcnic_83xx_idc_ready_state
650 *
651 * @adapter: adapter structure
652 *
653 * Perform IDC protocol specicifed actions after monitoring device state and
654 * events.
655 *
656 * Returns: Error code or Success(0)
657 *
658 **/
659static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
660{
661 u32 val;
662 struct qlcnic_hardware_context *ahw = adapter->ahw;
663 int ret = 0;
664
665 /* Perform NIC configuration based ready state entry actions */
666 if (ahw->idc.state_entry(adapter))
667 return -EIO;
668
669 if (qlcnic_check_temp(adapter)) {
670 if (ahw->temp == QLCNIC_TEMP_PANIC) {
671 qlcnic_83xx_idc_check_fan_failure(adapter);
672 dev_err(&adapter->pdev->dev,
673 "Error: device temperature %d above limits\n",
674 adapter->ahw->temp);
675 clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
676 set_bit(__QLCNIC_RESETTING, &adapter->state);
677 qlcnic_83xx_idc_detach_driver(adapter);
678 qlcnic_83xx_idc_enter_failed_state(adapter, 1);
679 return -EIO;
680 }
681 }
682
683 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
684 ret = qlcnic_83xx_check_heartbeat(adapter);
685 if (ret) {
686 adapter->flags |= QLCNIC_FW_HANG;
687 if (!(val & QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY)) {
688 clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
689 set_bit(__QLCNIC_RESETTING, &adapter->state);
690 qlcnic_83xx_idc_enter_need_reset_state(adapter, 1);
691 }
692 return -EIO;
693 }
694
695 if ((val & QLC_83XX_IDC_GRACEFULL_RESET) || ahw->idc.collect_dump) {
696 /* Move to need reset state and prepare for reset */
697 qlcnic_83xx_idc_enter_need_reset_state(adapter, 1);
698 return ret;
699 }
700
701 /* Check for soft reset request */
702 if (ahw->reset_context &&
703 !(val & QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY)) {
704 qlcnic_83xx_idc_tx_soft_reset(adapter);
705 return ret;
706 }
707
708 /* Move to need quiesce state if requested */
709 if (adapter->ahw->idc.quiesce_req) {
710 qlcnic_83xx_idc_enter_need_quiesce(adapter, 1);
711 qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
712 return ret;
713 }
714
715 return ret;
716}
717
718/**
719 * qlcnic_83xx_idc_need_reset_state
720 *
721 * @adapter: adapter structure
722 *
723 * Device will remain in this state until:
724 * Reset request ACK's are recieved from all the functions
725 * Wait time exceeds max time limit
726 *
727 * Returns: Error code or Success(0)
728 *
729 **/
730static int qlcnic_83xx_idc_need_reset_state(struct qlcnic_adapter *adapter)
731{
732 int ret = 0;
733
734 if (adapter->ahw->idc.prev_state != QLC_83XX_IDC_DEV_NEED_RESET) {
735 qlcnic_83xx_idc_update_drv_ack_reg(adapter, 1, 1);
736 qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
737 set_bit(__QLCNIC_RESETTING, &adapter->state);
738 clear_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
739 qlcnic_83xx_idc_detach_driver(adapter);
740 }
741
742 /* Check ACK from other functions */
743 ret = qlcnic_83xx_idc_check_reset_ack_reg(adapter);
744 if (ret) {
745 dev_info(&adapter->pdev->dev,
746 "%s: Waiting for reset ACK\n", __func__);
747 return 0;
748 }
749
750 /* Transit to INIT state and restart the HW */
751 qlcnic_83xx_idc_enter_init_state(adapter, 1);
752
753 return ret;
754}
755
756static int qlcnic_83xx_idc_need_quiesce_state(struct qlcnic_adapter *adapter)
757{
758 dev_err(&adapter->pdev->dev, "%s: TBD\n", __func__);
759 return 0;
760}
761
762static int qlcnic_83xx_idc_failed_state(struct qlcnic_adapter *adapter)
763{
764 dev_err(&adapter->pdev->dev, "%s: please restart!!\n", __func__);
765 adapter->ahw->idc.err_code = -EIO;
766
767 return 0;
768}
769
770static int qlcnic_83xx_idc_quiesce_state(struct qlcnic_adapter *adapter)
771{
772 dev_info(&adapter->pdev->dev, "%s: TBD\n", __func__);
773 return 0;
774}
775
776static int qlcnic_83xx_idc_check_state_validity(struct qlcnic_adapter *adapter,
777 u32 state)
778{
779 u32 cur, prev, next;
780
781 cur = adapter->ahw->idc.curr_state;
782 prev = adapter->ahw->idc.prev_state;
783 next = state;
784
785 if ((next < QLC_83XX_IDC_DEV_COLD) ||
786 (next > QLC_83XX_IDC_DEV_QUISCENT)) {
787 dev_err(&adapter->pdev->dev,
788 "%s: curr %d, prev %d, next state %d is invalid\n",
789 __func__, cur, prev, state);
790 return 1;
791 }
792
793 if ((cur == QLC_83XX_IDC_DEV_UNKNOWN) &&
794 (prev == QLC_83XX_IDC_DEV_UNKNOWN)) {
795 if ((next != QLC_83XX_IDC_DEV_COLD) &&
796 (next != QLC_83XX_IDC_DEV_READY)) {
797 dev_err(&adapter->pdev->dev,
798 "%s: failed, cur %d prev %d next %d\n",
799 __func__, cur, prev, next);
800 return 1;
801 }
802 }
803
804 if (next == QLC_83XX_IDC_DEV_INIT) {
805 if ((prev != QLC_83XX_IDC_DEV_INIT) &&
806 (prev != QLC_83XX_IDC_DEV_COLD) &&
807 (prev != QLC_83XX_IDC_DEV_NEED_RESET)) {
808 dev_err(&adapter->pdev->dev,
809 "%s: failed, cur %d prev %d next %d\n",
810 __func__, cur, prev, next);
811 return 1;
812 }
813 }
814
815 return 0;
816}
817
818static void qlcnic_83xx_periodic_tasks(struct qlcnic_adapter *adapter)
819{
820 if (adapter->fhash.fnum)
821 qlcnic_prune_lb_filters(adapter);
822}
823
824/**
825 * qlcnic_83xx_idc_poll_dev_state
826 *
827 * @work: kernel work queue structure used to schedule the function
828 *
829 * Poll device state periodically and perform state specific
830 * actions defined by Inter Driver Communication (IDC) protocol.
831 *
832 * Returns: None
833 *
834 **/
835void qlcnic_83xx_idc_poll_dev_state(struct work_struct *work)
836{
837 struct qlcnic_adapter *adapter;
838 u32 state;
839
840 adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
841 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
842
843 if (qlcnic_83xx_idc_check_state_validity(adapter, state)) {
844 qlcnic_83xx_idc_log_state_history(adapter);
845 adapter->ahw->idc.curr_state = QLC_83XX_IDC_DEV_UNKNOWN;
846 } else {
847 adapter->ahw->idc.curr_state = state;
848 }
849
850 switch (adapter->ahw->idc.curr_state) {
851 case QLC_83XX_IDC_DEV_READY:
852 qlcnic_83xx_idc_ready_state(adapter);
853 break;
854 case QLC_83XX_IDC_DEV_NEED_RESET:
855 qlcnic_83xx_idc_need_reset_state(adapter);
856 break;
857 case QLC_83XX_IDC_DEV_NEED_QUISCENT:
858 qlcnic_83xx_idc_need_quiesce_state(adapter);
859 break;
860 case QLC_83XX_IDC_DEV_FAILED:
861 qlcnic_83xx_idc_failed_state(adapter);
862 return;
863 case QLC_83XX_IDC_DEV_INIT:
864 qlcnic_83xx_idc_init_state(adapter);
865 break;
866 case QLC_83XX_IDC_DEV_QUISCENT:
867 qlcnic_83xx_idc_quiesce_state(adapter);
868 break;
869 default:
870 qlcnic_83xx_idc_unknown_state(adapter);
871 return;
872 }
873 adapter->ahw->idc.prev_state = adapter->ahw->idc.curr_state;
874 qlcnic_83xx_periodic_tasks(adapter);
875
876 /* Re-schedule the function */
877 if (test_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status))
878 qlcnic_schedule_work(adapter, qlcnic_83xx_idc_poll_dev_state,
879 adapter->ahw->idc.delay);
880}
881
882static void qlcnic_83xx_setup_idc_parameters(struct qlcnic_adapter *adapter)
883{
884 u32 idc_params, val;
885
886 if (qlcnic_83xx_lockless_flash_read32(adapter,
887 QLC_83XX_IDC_FLASH_PARAM_ADDR,
888 (u8 *)&idc_params, 1)) {
889 dev_info(&adapter->pdev->dev,
890 "%s:failed to get IDC params from flash\n", __func__);
891 adapter->dev_init_timeo = QLC_83XX_IDC_INIT_TIMEOUT_SECS;
892 adapter->reset_ack_timeo = QLC_83XX_IDC_RESET_TIMEOUT_SECS;
893 } else {
894 adapter->dev_init_timeo = idc_params & 0xFFFF;
895 adapter->reset_ack_timeo = ((idc_params >> 16) & 0xFFFF);
896 }
897
898 adapter->ahw->idc.curr_state = QLC_83XX_IDC_DEV_UNKNOWN;
899 adapter->ahw->idc.prev_state = QLC_83XX_IDC_DEV_UNKNOWN;
900 adapter->ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
901 adapter->ahw->idc.err_code = 0;
902 adapter->ahw->idc.collect_dump = 0;
903 adapter->ahw->idc.name = (char **)qlc_83xx_idc_states;
904
905 clear_bit(__QLCNIC_RESETTING, &adapter->state);
906 set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
907 set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
908
909 /* Check if reset recovery is disabled */
910 if (!qlcnic_auto_fw_reset) {
911 /* Propagate do not reset request to other functions */
912 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
913 val = val | QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY;
914 QLCWRX(adapter->ahw, QLC_83XX_IDC_CTRL, val);
915 }
916}
917
918static int
919qlcnic_83xx_idc_first_to_load_function_handler(struct qlcnic_adapter *adapter)
920{
921 u32 state, val;
922
923 if (qlcnic_83xx_lock_driver(adapter))
924 return -EIO;
925
926 /* Clear driver lock register */
927 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, 0);
928 if (qlcnic_83xx_idc_update_major_version(adapter, 0)) {
929 qlcnic_83xx_unlock_driver(adapter);
930 return -EIO;
931 }
932
933 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
934 if (qlcnic_83xx_idc_check_state_validity(adapter, state)) {
935 qlcnic_83xx_unlock_driver(adapter);
936 return -EIO;
937 }
938
939 if (state != QLC_83XX_IDC_DEV_COLD && qlcnic_load_fw_file) {
940 QLCWRX(adapter->ahw, QLC_83XX_IDC_DEV_STATE,
941 QLC_83XX_IDC_DEV_COLD);
942 state = QLC_83XX_IDC_DEV_COLD;
943 }
944
945 adapter->ahw->idc.curr_state = state;
946 /* First to load function should cold boot the device */
947 if (state == QLC_83XX_IDC_DEV_COLD)
948 qlcnic_83xx_idc_cold_state_handler(adapter);
949
950 /* Check if reset recovery is enabled */
951 if (qlcnic_auto_fw_reset) {
952 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
953 val = val & ~QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY;
954 QLCWRX(adapter->ahw, QLC_83XX_IDC_CTRL, val);
955 }
956
957 qlcnic_83xx_unlock_driver(adapter);
958
959 return 0;
960}
961
962static int qlcnic_83xx_idc_init(struct qlcnic_adapter *adapter)
963{
964 qlcnic_83xx_setup_idc_parameters(adapter);
965
966 if (!qlcnic_83xx_idc_check_driver_presence_reg(adapter)) {
967 if (qlcnic_83xx_idc_first_to_load_function_handler(adapter))
968 return -EIO;
969 } else {
970 if (qlcnic_83xx_idc_check_major_version(adapter))
971 return -EIO;
972 }
973
974 qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
975
976 return 0;
977}
978
979void qlcnic_83xx_idc_exit(struct qlcnic_adapter *adapter)
980{
981 int id;
982 u32 val;
983
984 while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
985 usleep_range(10000, 11000);
986
987 id = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
988 id = id & 0xFF;
989
990 if (id == adapter->portnum) {
991 dev_err(&adapter->pdev->dev,
992 "%s: wait for lock recovery.. %d\n", __func__, id);
993 msleep(20);
994 id = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
995 id = id & 0xFF;
996 }
997
998 /* Clear driver presence bit */
999 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
1000 val = val & ~(1 << adapter->portnum);
1001 QLCWRX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE, val);
1002 clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1003 clear_bit(__QLCNIC_RESETTING, &adapter->state);
1004
1005 cancel_delayed_work_sync(&adapter->fw_work);
1006}
1007
1008void qlcnic_83xx_idc_request_reset(struct qlcnic_adapter *adapter, u32 key)
1009{
1010 u32 val;
1011
1012 if (qlcnic_83xx_lock_driver(adapter)) {
1013 dev_err(&adapter->pdev->dev,
1014 "%s:failed, please retry\n", __func__);
1015 return;
1016 }
1017
1018 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
1019 if ((val & QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY) ||
1020 !qlcnic_auto_fw_reset) {
1021 dev_err(&adapter->pdev->dev,
1022 "%s:failed, device in non reset mode\n", __func__);
1023 qlcnic_83xx_unlock_driver(adapter);
1024 return;
1025 }
1026
1027 if (key == QLCNIC_FORCE_FW_RESET) {
1028 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
1029 val = val | QLC_83XX_IDC_GRACEFULL_RESET;
1030 QLCWRX(adapter->ahw, QLC_83XX_IDC_CTRL, val);
1031 } else if (key == QLCNIC_FORCE_FW_DUMP_KEY) {
1032 adapter->ahw->idc.collect_dump = 1;
1033 }
1034
1035 qlcnic_83xx_unlock_driver(adapter);
1036 return;
1037}
1038
1039static int qlcnic_83xx_copy_bootloader(struct qlcnic_adapter *adapter)
1040{
1041 u8 *p_cache;
1042 u32 src, size;
1043 u64 dest;
1044 int ret = -EIO;
1045
1046 src = QLC_83XX_BOOTLOADER_FLASH_ADDR;
1047 dest = QLCRDX(adapter->ahw, QLCNIC_BOOTLOADER_ADDR);
1048 size = QLCRDX(adapter->ahw, QLCNIC_BOOTLOADER_SIZE);
1049
1050 /* alignment check */
1051 if (size & 0xF)
1052 size = (size + 16) & ~0xF;
1053
1054 p_cache = kzalloc(size, GFP_KERNEL);
1055
1056 if (p_cache == NULL) {
1057 dev_err(&adapter->pdev->dev,
1058 "Failed to allocate memory for boot loader cache\n");
1059 return -ENOMEM;
1060 }
1061 ret = qlcnic_83xx_lockless_flash_read32(adapter, src, p_cache,
1062 size / sizeof(u32));
1063 if (ret) {
1064 kfree(p_cache);
1065 return ret;
1066 }
1067 /* 16 byte write to MS memory */
1068 ret = qlcnic_83xx_ms_mem_write128(adapter, dest, (u32 *)p_cache,
1069 size / 16);
1070 if (ret) {
1071 kfree(p_cache);
1072 return ret;
1073 }
1074 kfree(p_cache);
1075
1076 return ret;
1077}
1078
1079static int qlcnic_83xx_copy_fw_file(struct qlcnic_adapter *adapter)
1080{
1081 u32 dest, *p_cache;
1082 u64 addr;
1083 u8 data[16];
1084 size_t size;
1085 int i, ret = -EIO;
1086
1087 dest = QLCRDX(adapter->ahw, QLCNIC_FW_IMAGE_ADDR);
1088 size = (adapter->ahw->fw_info.fw->size & ~0xF);
1089 p_cache = (u32 *)adapter->ahw->fw_info.fw->data;
1090 addr = (u64)dest;
1091
1092 ret = qlcnic_83xx_ms_mem_write128(adapter, addr,
1093 (u32 *)p_cache, size / 16);
1094 if (ret) {
1095 dev_err(&adapter->pdev->dev, "MS memory write failed\n");
1096 release_firmware(adapter->ahw->fw_info.fw);
1097 adapter->ahw->fw_info.fw = NULL;
1098 return -EIO;
1099 }
1100
1101 /* alignment check */
1102 if (adapter->ahw->fw_info.fw->size & 0xF) {
1103 addr = dest + size;
1104 for (i = 0; i < (adapter->ahw->fw_info.fw->size & 0xF); i++)
1105 data[i] = adapter->ahw->fw_info.fw->data[size + i];
1106 for (; i < 16; i++)
1107 data[i] = 0;
1108 ret = qlcnic_83xx_ms_mem_write128(adapter, addr,
1109 (u32 *)data, 1);
1110 if (ret) {
1111 dev_err(&adapter->pdev->dev,
1112 "MS memory write failed\n");
1113 release_firmware(adapter->ahw->fw_info.fw);
1114 adapter->ahw->fw_info.fw = NULL;
1115 return -EIO;
1116 }
1117 }
1118 release_firmware(adapter->ahw->fw_info.fw);
1119 adapter->ahw->fw_info.fw = NULL;
1120
1121 return 0;
1122}
1123
1124static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
1125{
1126 int i, j;
1127 u32 val = 0, val1 = 0, reg = 0;
1128
1129 val = QLCRD32(adapter, QLC_83XX_SRE_SHIM_REG);
1130 dev_info(&adapter->pdev->dev, "SRE-Shim Ctrl:0x%x\n", val);
1131
1132 for (j = 0; j < 2; j++) {
1133 if (j == 0) {
1134 dev_info(&adapter->pdev->dev,
1135 "Port 0 RxB Pause Threshold Regs[TC7..TC0]:");
1136 reg = QLC_83XX_PORT0_THRESHOLD;
1137 } else if (j == 1) {
1138 dev_info(&adapter->pdev->dev,
1139 "Port 1 RxB Pause Threshold Regs[TC7..TC0]:");
1140 reg = QLC_83XX_PORT1_THRESHOLD;
1141 }
1142 for (i = 0; i < 8; i++) {
1143 val = QLCRD32(adapter, reg + (i * 0x4));
1144 dev_info(&adapter->pdev->dev, "0x%x ", val);
1145 }
1146 dev_info(&adapter->pdev->dev, "\n");
1147 }
1148
1149 for (j = 0; j < 2; j++) {
1150 if (j == 0) {
1151 dev_info(&adapter->pdev->dev,
1152 "Port 0 RxB TC Max Cell Registers[4..1]:");
1153 reg = QLC_83XX_PORT0_TC_MC_REG;
1154 } else if (j == 1) {
1155 dev_info(&adapter->pdev->dev,
1156 "Port 1 RxB TC Max Cell Registers[4..1]:");
1157 reg = QLC_83XX_PORT1_TC_MC_REG;
1158 }
1159 for (i = 0; i < 4; i++) {
1160 val = QLCRD32(adapter, reg + (i * 0x4));
1161 dev_info(&adapter->pdev->dev, "0x%x ", val);
1162 }
1163 dev_info(&adapter->pdev->dev, "\n");
1164 }
1165
1166 for (j = 0; j < 2; j++) {
1167 if (j == 0) {
1168 dev_info(&adapter->pdev->dev,
1169 "Port 0 RxB Rx TC Stats[TC7..TC0]:");
1170 reg = QLC_83XX_PORT0_TC_STATS;
1171 } else if (j == 1) {
1172 dev_info(&adapter->pdev->dev,
1173 "Port 1 RxB Rx TC Stats[TC7..TC0]:");
1174 reg = QLC_83XX_PORT1_TC_STATS;
1175 }
1176 for (i = 7; i >= 0; i--) {
1177 val = QLCRD32(adapter, reg);
1178 val &= ~(0x7 << 29); /* Reset bits 29 to 31 */
1179 QLCWR32(adapter, reg, (val | (i << 29)));
1180 val = QLCRD32(adapter, reg);
1181 dev_info(&adapter->pdev->dev, "0x%x ", val);
1182 }
1183 dev_info(&adapter->pdev->dev, "\n");
1184 }
1185
1186 val = QLCRD32(adapter, QLC_83XX_PORT2_IFB_THRESHOLD);
1187 val1 = QLCRD32(adapter, QLC_83XX_PORT3_IFB_THRESHOLD);
1188 dev_info(&adapter->pdev->dev,
1189 "IFB-Pause Thresholds: Port 2:0x%x, Port 3:0x%x\n",
1190 val, val1);
1191}
1192
1193static void qlcnic_83xx_disable_pause_frames(struct qlcnic_adapter *adapter)
1194{
1195 u32 reg = 0, i, j;
1196
1197 if (qlcnic_83xx_lock_driver(adapter)) {
1198 dev_err(&adapter->pdev->dev,
1199 "%s:failed to acquire driver lock\n", __func__);
1200 return;
1201 }
1202
1203 qlcnic_83xx_dump_pause_control_regs(adapter);
1204 QLCWR32(adapter, QLC_83XX_SRE_SHIM_REG, 0x0);
1205
1206 for (j = 0; j < 2; j++) {
1207 if (j == 0)
1208 reg = QLC_83XX_PORT0_THRESHOLD;
1209 else if (j == 1)
1210 reg = QLC_83XX_PORT1_THRESHOLD;
1211
1212 for (i = 0; i < 8; i++)
1213 QLCWR32(adapter, reg + (i * 0x4), 0x0);
1214 }
1215
1216 for (j = 0; j < 2; j++) {
1217 if (j == 0)
1218 reg = QLC_83XX_PORT0_TC_MC_REG;
1219 else if (j == 1)
1220 reg = QLC_83XX_PORT1_TC_MC_REG;
1221
1222 for (i = 0; i < 4; i++)
1223 QLCWR32(adapter, reg + (i * 0x4), 0x03FF03FF);
1224 }
1225
1226 QLCWR32(adapter, QLC_83XX_PORT2_IFB_THRESHOLD, 0);
1227 QLCWR32(adapter, QLC_83XX_PORT3_IFB_THRESHOLD, 0);
1228 dev_info(&adapter->pdev->dev,
1229 "Disabled pause frames successfully on all ports\n");
1230 qlcnic_83xx_unlock_driver(adapter);
1231}
1232
1233static int qlcnic_83xx_check_heartbeat(struct qlcnic_adapter *p_dev)
1234{
1235 u32 heartbeat, peg_status;
1236 int retries, ret = -EIO;
1237
1238 retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1239 p_dev->heartbeat = QLC_SHARED_REG_RD32(p_dev,
1240 QLCNIC_PEG_ALIVE_COUNTER);
1241
1242 do {
1243 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1244 heartbeat = QLC_SHARED_REG_RD32(p_dev,
1245 QLCNIC_PEG_ALIVE_COUNTER);
1246 if (heartbeat != p_dev->heartbeat) {
1247 ret = QLCNIC_RCODE_SUCCESS;
1248 break;
1249 }
1250 } while (--retries);
1251
1252 if (ret) {
1253 dev_err(&p_dev->pdev->dev, "firmware hang detected\n");
1254 qlcnic_83xx_disable_pause_frames(p_dev);
1255 peg_status = QLC_SHARED_REG_RD32(p_dev,
1256 QLCNIC_PEG_HALT_STATUS1);
1257 dev_info(&p_dev->pdev->dev, "Dumping HW/FW registers\n"
1258 "PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,\n"
1259 "PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,\n"
1260 "PEG_NET_2_PC: 0x%x, PEG_NET_3_PC: 0x%x,\n"
1261 "PEG_NET_4_PC: 0x%x\n", peg_status,
1262 QLC_SHARED_REG_RD32(p_dev, QLCNIC_PEG_HALT_STATUS2),
1263 QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_0),
1264 QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_1),
1265 QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_2),
1266 QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_3),
1267 QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_4));
1268
1269 if (QLCNIC_FWERROR_CODE(peg_status) == 0x67)
1270 dev_err(&p_dev->pdev->dev,
1271 "Device is being reset err code 0x00006700.\n");
1272 }
1273
1274 return ret;
1275}
1276
1277static int qlcnic_83xx_check_cmd_peg_status(struct qlcnic_adapter *p_dev)
1278{
1279 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
1280 u32 val;
1281
1282 do {
1283 val = QLC_SHARED_REG_RD32(p_dev, QLCNIC_CMDPEG_STATE);
1284 if (val == QLC_83XX_CMDPEG_COMPLETE)
1285 return 0;
1286 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
1287 } while (--retries);
1288
1289 dev_err(&p_dev->pdev->dev, "%s: failed, state = 0x%x\n", __func__, val);
1290 return -EIO;
1291}
1292
1293int qlcnic_83xx_check_hw_status(struct qlcnic_adapter *p_dev)
1294{
1295 int err;
1296
1297 err = qlcnic_83xx_check_cmd_peg_status(p_dev);
1298 if (err)
1299 return err;
1300
1301 err = qlcnic_83xx_check_heartbeat(p_dev);
1302 if (err)
1303 return err;
1304
1305 return err;
1306}
1307
1308static int qlcnic_83xx_load_fw_image_from_host(struct qlcnic_adapter *adapter)
1309{
1310 int err = -EIO;
1311
1312 if (request_firmware(&adapter->ahw->fw_info.fw,
1313 QLC_83XX_FW_FILE_NAME, &(adapter->pdev->dev))) {
1314 dev_err(&adapter->pdev->dev,
1315 "No file FW image, loading flash FW image.\n");
1316 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID,
1317 QLC_83XX_BOOT_FROM_FLASH);
1318 } else {
1319 if (qlcnic_83xx_copy_fw_file(adapter))
1320 return err;
1321 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID,
1322 QLC_83XX_BOOT_FROM_FILE);
1323 }
1324
1325 return 0;
1326}
1327
1328static int qlcnic_83xx_restart_hw(struct qlcnic_adapter *adapter)
1329{
1330 int err = -EIO;
1331
1332 if (qlcnic_83xx_copy_bootloader(adapter))
1333 return err;
1334 /* Boot either flash image or firmware image from host file system */
1335 if (qlcnic_load_fw_file) {
1336 if (qlcnic_83xx_load_fw_image_from_host(adapter))
1337 return err;
1338 } else {
1339 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID,
1340 QLC_83XX_BOOT_FROM_FLASH);
1341 }
1342
1343 if (qlcnic_83xx_check_hw_status(adapter))
1344 return -EIO;
1345
1346 return 0;
1347}
1348
1349/**
1350* qlcnic_83xx_config_default_opmode
1351*
1352* @adapter: adapter structure
1353*
1354* Configure default driver operating mode
1355*
1356* Returns: Error code or Success(0)
1357* */
1358int qlcnic_83xx_config_default_opmode(struct qlcnic_adapter *adapter)
1359{
1360 u32 op_mode;
1361 struct qlcnic_hardware_context *ahw = adapter->ahw;
1362
1363 qlcnic_get_func_no(adapter);
1364 op_mode = QLCRDX(ahw, QLC_83XX_DRV_OP_MODE);
1365
1366 if (op_mode == QLC_83XX_DEFAULT_OPMODE) {
1367 adapter->nic_ops->init_driver = qlcnic_83xx_init_default_driver;
1368 ahw->idc.state_entry = qlcnic_83xx_idc_ready_state_entry;
1369 } else {
1370 return -EIO;
1371 }
1372
1373 return 0;
1374}
1375
1376int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *adapter)
1377{
1378 int err;
1379 struct qlcnic_info nic_info;
1380 struct qlcnic_hardware_context *ahw = adapter->ahw;
1381
1382 memset(&nic_info, 0, sizeof(struct qlcnic_info));
1383 err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
1384 if (err)
1385 return -EIO;
1386
1387 ahw->physical_port = (u8) nic_info.phys_port;
1388 ahw->switch_mode = nic_info.switch_mode;
1389 ahw->max_tx_ques = nic_info.max_tx_ques;
1390 ahw->max_rx_ques = nic_info.max_rx_ques;
1391 ahw->capabilities = nic_info.capabilities;
1392 ahw->max_mac_filters = nic_info.max_mac_filters;
1393 ahw->max_mtu = nic_info.max_mtu;
1394
1395 if (ahw->capabilities & BIT_23)
1396 ahw->nic_mode = QLC_83XX_VIRTUAL_NIC_MODE;
1397 else
1398 ahw->nic_mode = QLC_83XX_DEFAULT_MODE;
1399
1400 return ahw->nic_mode;
1401}
1402
1403static int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter)
1404{
1405 int ret;
1406
1407 ret = qlcnic_83xx_get_nic_configuration(adapter);
1408 if (ret == -EIO)
1409 return -EIO;
1410
1411 if (ret == QLC_83XX_DEFAULT_MODE) {
1412 if (qlcnic_83xx_config_default_opmode(adapter))
1413 return -EIO;
1414 }
1415
1416 return 0;
1417}
1418
1419static void qlcnic_83xx_config_buff_descriptors(struct qlcnic_adapter *adapter)
1420{
1421 struct qlcnic_hardware_context *ahw = adapter->ahw;
1422
1423 if (ahw->port_type == QLCNIC_XGBE) {
1424 adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_10G;
1425 adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
1426 adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
1427 adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
1428
1429 } else if (ahw->port_type == QLCNIC_GBE) {
1430 adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_1G;
1431 adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G;
1432 adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G;
1433 adapter->max_rxd = MAX_RCV_DESCRIPTORS_1G;
1434 }
1435 adapter->num_txd = MAX_CMD_DESCRIPTORS;
1436 adapter->max_rds_rings = MAX_RDS_RINGS;
1437}
1438
1439static int qlcnic_83xx_init_default_driver(struct qlcnic_adapter *adapter)
1440{
1441 int err = -EIO;
1442
1443 if (qlcnic_83xx_get_port_info(adapter))
1444 return err;
1445
1446 qlcnic_83xx_config_buff_descriptors(adapter);
1447 adapter->ahw->msix_supported = !!qlcnic_use_msi_x;
1448 adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
1449
1450 dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
1451 adapter->ahw->fw_hal_version);
1452
1453 return 0;
1454}
1455
1456#define IS_QLC_83XX_USED(a, b, c) (((1 << a->portnum) & b) || ((c >> 6) & 0x1))
1457static void qlcnic_83xx_clear_function_resources(struct qlcnic_adapter *adapter)
1458{
1459 struct qlcnic_cmd_args cmd;
1460 u32 presence_mask, audit_mask;
1461 int status;
1462
1463 presence_mask = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE);
1464 audit_mask = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_AUDIT);
1465
1466 if (IS_QLC_83XX_USED(adapter, presence_mask, audit_mask)) {
1467 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_STOP_NIC_FUNC);
1468 cmd.req.arg[1] = BIT_31;
1469 status = qlcnic_issue_cmd(adapter, &cmd);
1470 if (status)
1471 dev_err(&adapter->pdev->dev,
1472 "Failed to clean up the function resources\n");
1473 qlcnic_free_mbx_args(&cmd);
1474 }
1475}
1476
1477int qlcnic_83xx_init(struct qlcnic_adapter *adapter)
1478{
1479 struct qlcnic_hardware_context *ahw = adapter->ahw;
1480
1481 if (qlcnic_83xx_check_hw_status(adapter))
1482 return -EIO;
1483
1484 /* Initilaize 83xx mailbox spinlock */
1485 spin_lock_init(&ahw->mbx_lock);
1486
1487 set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
1488 qlcnic_83xx_clear_function_resources(adapter);
1489
1490 if (!qlcnic_83xx_read_flash_descriptor_table(adapter))
1491 qlcnic_83xx_read_flash_mfg_id(adapter);
1492
1493 if (qlcnic_83xx_idc_init(adapter))
1494 return -EIO;
1495
1496 /* Configure default, SR-IOV or Virtual NIC mode of operation */
1497 if (qlcnic_83xx_configure_opmode(adapter))
1498 return -EIO;
1499
1500 /* Perform operating mode specific initialization */
1501 if (adapter->nic_ops->init_driver(adapter))
1502 return -EIO;
1503
1504 INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
1505
1506 /* register for NIC IDC AEN Events */
1507 qlcnic_83xx_register_nic_idc_func(adapter, 1);
1508
1509 /* Periodically monitor device status */
1510 qlcnic_83xx_idc_poll_dev_state(&adapter->fw_work.work);
1511
1512 return adapter->ahw->idc.err_code;
1513}
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
index 4a05dc0f74e9..c10670f6d1c8 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
@@ -39,23 +39,23 @@ static int qlcnic_mac_learn;
39module_param(qlcnic_mac_learn, int, 0444); 39module_param(qlcnic_mac_learn, int, 0444);
40MODULE_PARM_DESC(qlcnic_mac_learn, "Mac Filter (0=disabled, 1=enabled)"); 40MODULE_PARM_DESC(qlcnic_mac_learn, "Mac Filter (0=disabled, 1=enabled)");
41 41
42static int qlcnic_use_msi = 1; 42int qlcnic_use_msi = 1;
43MODULE_PARM_DESC(use_msi, "MSI interrupt (0=disabled, 1=enabled"); 43MODULE_PARM_DESC(use_msi, "MSI interrupt (0=disabled, 1=enabled");
44module_param_named(use_msi, qlcnic_use_msi, int, 0444); 44module_param_named(use_msi, qlcnic_use_msi, int, 0444);
45 45
46static int qlcnic_use_msi_x = 1; 46int qlcnic_use_msi_x = 1;
47MODULE_PARM_DESC(use_msi_x, "MSI-X interrupt (0=disabled, 1=enabled"); 47MODULE_PARM_DESC(use_msi_x, "MSI-X interrupt (0=disabled, 1=enabled");
48module_param_named(use_msi_x, qlcnic_use_msi_x, int, 0444); 48module_param_named(use_msi_x, qlcnic_use_msi_x, int, 0444);
49 49
50static int qlcnic_auto_fw_reset = 1; 50int qlcnic_auto_fw_reset = 1;
51MODULE_PARM_DESC(auto_fw_reset, "Auto firmware reset (0=disabled, 1=enabled"); 51MODULE_PARM_DESC(auto_fw_reset, "Auto firmware reset (0=disabled, 1=enabled");
52module_param_named(auto_fw_reset, qlcnic_auto_fw_reset, int, 0644); 52module_param_named(auto_fw_reset, qlcnic_auto_fw_reset, int, 0644);
53 53
54static int qlcnic_load_fw_file; 54int qlcnic_load_fw_file;
55MODULE_PARM_DESC(load_fw_file, "Load firmware from (0=flash, 1=file"); 55MODULE_PARM_DESC(load_fw_file, "Load firmware from (0=flash, 1=file");
56module_param_named(load_fw_file, qlcnic_load_fw_file, int, 0444); 56module_param_named(load_fw_file, qlcnic_load_fw_file, int, 0444);
57 57
58static int qlcnic_config_npars; 58int qlcnic_config_npars;
59module_param(qlcnic_config_npars, int, 0444); 59module_param(qlcnic_config_npars, int, 0444);
60MODULE_PARM_DESC(qlcnic_config_npars, "Configure NPARs (0=disabled, 1=enabled"); 60MODULE_PARM_DESC(qlcnic_config_npars, "Configure NPARs (0=disabled, 1=enabled");
61 61
@@ -1294,9 +1294,7 @@ int __qlcnic_up(struct qlcnic_adapter *adapter, struct net_device *netdev)
1294 return 0; 1294 return 0;
1295} 1295}
1296 1296
1297/* Usage: During resume and firmware recovery module.*/ 1297int qlcnic_up(struct qlcnic_adapter *adapter, struct net_device *netdev)
1298
1299static int qlcnic_up(struct qlcnic_adapter *adapter, struct net_device *netdev)
1300{ 1298{
1301 int err = 0; 1299 int err = 0;
1302 1300
@@ -1340,8 +1338,7 @@ void __qlcnic_down(struct qlcnic_adapter *adapter, struct net_device *netdev)
1340 1338
1341/* Usage: During suspend and firmware recovery module */ 1339/* Usage: During suspend and firmware recovery module */
1342 1340
1343static void 1341void qlcnic_down(struct qlcnic_adapter *adapter, struct net_device *netdev)
1344qlcnic_down(struct qlcnic_adapter *adapter, struct net_device *netdev)
1345{ 1342{
1346 rtnl_lock(); 1343 rtnl_lock();
1347 if (netif_running(netdev)) 1344 if (netif_running(netdev))
@@ -1812,6 +1809,11 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1812 } else if (qlcnic_83xx_check(adapter)) { 1809 } else if (qlcnic_83xx_check(adapter)) {
1813 qlcnic_83xx_check_vf(adapter, ent); 1810 qlcnic_83xx_check_vf(adapter, ent);
1814 adapter->portnum = adapter->ahw->pci_func; 1811 adapter->portnum = adapter->ahw->pci_func;
1812 err = qlcnic_83xx_init(adapter);
1813 if (err) {
1814 dev_err(&pdev->dev, "%s: failed\n", __func__);
1815 goto err_out_free_hw;
1816 }
1815 } else { 1817 } else {
1816 dev_err(&pdev->dev, 1818 dev_err(&pdev->dev,
1817 "%s: failed. Please Reboot\n", __func__); 1819 "%s: failed. Please Reboot\n", __func__);
@@ -2135,7 +2137,7 @@ static void qlcnic_free_lb_filters_mem(struct qlcnic_adapter *adapter)
2135 adapter->fhash.fmax = 0; 2137 adapter->fhash.fmax = 0;
2136} 2138}
2137 2139
2138static int qlcnic_check_temp(struct qlcnic_adapter *adapter) 2140int qlcnic_check_temp(struct qlcnic_adapter *adapter)
2139{ 2141{
2140 struct net_device *netdev = adapter->netdev; 2142 struct net_device *netdev = adapter->netdev;
2141 u32 temp_state, temp_val, temp = 0; 2143 u32 temp_state, temp_val, temp = 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 23:21:20 -0400