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authorHimanshu Madhani <himanshu.madhani@qlogic.com>2012-12-31 22:20:18 -0500
committerDavid S. Miller <davem@davemloft.net>2013-01-02 05:43:26 -0500
commita15ebd371992dbadb8a30367fd80cb5cd73b8fb1 (patch)
tree26323d75ebb7488410d52c52e7a6f9514625e2c6 /drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c
parent7e2cf4feba058476324dc545e3d1b316998c91e6 (diff)
qlcnic: macros for common register access
Refactor 82xx driver to support new adapter - Qlogic 83XX CNA Use QLC_SHARED_REG_RD32 and QLC__SHARED_REG_WR32 macros for 82xx and 83xx common register access. Signed-off-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com> Signed-off-by: Sony Chacko <sony.chacko@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c')
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c35
1 files changed, 17 insertions, 18 deletions
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c
index de79cde233de..4b41f9b43124 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c
@@ -5,11 +5,8 @@
5 * See LICENSE.qlcnic for copyright and licensing details. 5 * See LICENSE.qlcnic for copyright and licensing details.
6 */ 6 */
7 7
8#include <linux/netdevice.h>
9#include <linux/delay.h>
10#include <linux/slab.h>
11#include <linux/if_vlan.h>
12#include "qlcnic.h" 8#include "qlcnic.h"
9#include "qlcnic_hw.h"
13 10
14struct crb_addr_pair { 11struct crb_addr_pair {
15 u32 addr; 12 u32 addr;
@@ -327,7 +324,6 @@ static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
327 long done = 0; 324 long done = 0;
328 325
329 cond_resched(); 326 cond_resched();
330
331 while (done == 0) { 327 while (done == 0) {
332 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS); 328 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
333 done &= 2; 329 done &= 2;
@@ -416,8 +412,8 @@ int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
416 u32 off; 412 u32 off;
417 struct pci_dev *pdev = adapter->pdev; 413 struct pci_dev *pdev = adapter->pdev;
418 414
419 QLCWR32(adapter, CRB_CMDPEG_STATE, 0); 415 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
420 QLCWR32(adapter, CRB_RCVPEG_STATE, 0); 416 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
421 417
422 /* Halt all the indiviual PEGs and other blocks */ 418 /* Halt all the indiviual PEGs and other blocks */
423 /* disable all I2Q */ 419 /* disable all I2Q */
@@ -564,8 +560,8 @@ int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
564 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0); 560 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
565 msleep(1); 561 msleep(1);
566 562
567 QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0); 563 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
568 QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0); 564 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
569 565
570 return 0; 566 return 0;
571} 567}
@@ -576,7 +572,7 @@ static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
576 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT; 572 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
577 573
578 do { 574 do {
579 val = QLCRD32(adapter, CRB_CMDPEG_STATE); 575 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
580 576
581 switch (val) { 577 switch (val) {
582 case PHAN_INITIALIZE_COMPLETE: 578 case PHAN_INITIALIZE_COMPLETE:
@@ -592,7 +588,8 @@ static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
592 588
593 } while (--retries); 589 } while (--retries);
594 590
595 QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 591 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
592 PHAN_INITIALIZE_FAILED);
596 593
597out_err: 594out_err:
598 dev_err(&adapter->pdev->dev, "Command Peg initialization not " 595 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
@@ -607,7 +604,7 @@ qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
607 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT; 604 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
608 605
609 do { 606 do {
610 val = QLCRD32(adapter, CRB_RCVPEG_STATE); 607 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
611 608
612 if (val == PHAN_PEG_RCV_INITIALIZED) 609 if (val == PHAN_PEG_RCV_INITIALIZED)
613 return 0; 610 return 0;
@@ -638,7 +635,7 @@ qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
638 if (err) 635 if (err)
639 return err; 636 return err;
640 637
641 QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 638 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
642 639
643 return err; 640 return err;
644} 641}
@@ -649,7 +646,7 @@ qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
649 int timeo; 646 int timeo;
650 u32 val; 647 u32 val;
651 648
652 val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); 649 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
653 val = QLC_DEV_GET_DRV(val, adapter->portnum); 650 val = QLC_DEV_GET_DRV(val, adapter->portnum);
654 if ((val & 0x3) != QLCNIC_TYPE_NIC) { 651 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
655 dev_err(&adapter->pdev->dev, 652 dev_err(&adapter->pdev->dev,
@@ -689,7 +686,7 @@ static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
689 } 686 }
690 687
691 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header); 688 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
692 flt_entry = (struct qlcnic_flt_entry *)vzalloc(entry_size); 689 flt_entry = vzalloc(entry_size);
693 if (flt_entry == NULL) { 690 if (flt_entry == NULL) {
694 dev_warn(&adapter->pdev->dev, "error allocating memory\n"); 691 dev_warn(&adapter->pdev->dev, "error allocating memory\n");
695 return -EIO; 692 return -EIO;
@@ -1096,11 +1093,13 @@ qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1096 u32 heartbeat, ret = -EIO; 1093 u32 heartbeat, ret = -EIO;
1097 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT; 1094 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1098 1095
1099 adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); 1096 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1097 QLCNIC_PEG_ALIVE_COUNTER);
1100 1098
1101 do { 1099 do {
1102 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS); 1100 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1103 heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); 1101 heartbeat = QLC_SHARED_REG_RD32(adapter,
1102 QLCNIC_PEG_ALIVE_COUNTER);
1104 if (heartbeat != adapter->heartbeat) { 1103 if (heartbeat != adapter->heartbeat) {
1105 ret = QLCNIC_RCODE_SUCCESS; 1104 ret = QLCNIC_RCODE_SUCCESS;
1106 break; 1105 break;
@@ -1270,7 +1269,7 @@ qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1270 return -EINVAL; 1269 return -EINVAL;
1271 } 1270 }
1272 1271
1273 QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC); 1272 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1274 return 0; 1273 return 0;
1275} 1274}
1276 1275