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authorRongQing.Li <roy.qing.li@gmail.com>2012-04-27 15:53:41 -0400
committerDavid S. Miller <davem@davemloft.net>2012-04-30 21:37:27 -0400
commitd344c4f3103c6faa1635b155d8f516e8a7e0aa4e (patch)
treea3384fbfcbc8aebe8065279c5744488ca8b59672 /drivers/net/ethernet/oki-semi
parent1d0c0b328a63826b7c80c27d1c4f2b04e8225273 (diff)
pch_gbe: reprogram multicast address register on reset
The reset logic after a Rx FIFO overrun will clear the programmed multicast addresses. This patch fixes the issue by reprogramming the registers after the reset. The commit eefc48b ("pch_gbe: reprogram multicast address register on reset") tried to fix this problem, but it introduces unnecessary codes. In fact, all multicast addresses have been saved in netdev->mc, So we can call pch_gbe_set_multi() directly after reset_hw and reset_rx. This commit kills 50+ line codes Cc: Richard Cochran <richardcochran@gmail.com> Cc: Takahiro Shimizu <tshimizu818@gmail.com> Signed-off-by: RongQing.Li <roy.qing.li@gmail.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/oki-semi')
-rw-r--r--drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c60
1 files changed, 5 insertions, 55 deletions
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index 107f41a46a41..9dc7e5023671 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -120,6 +120,7 @@ static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;
120static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg); 120static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);
121static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg, 121static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg,
122 int data); 122 int data);
123static void pch_gbe_set_multi(struct net_device *netdev);
123 124
124#ifdef CONFIG_PCH_PTP 125#ifdef CONFIG_PCH_PTP
125static struct sock_filter ptp_filter[] = { 126static struct sock_filter ptp_filter[] = {
@@ -391,58 +392,13 @@ static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
391} 392}
392 393
393/** 394/**
394 * pch_gbe_mac_save_mac_addr_regs - Save MAC addresse registers
395 * @hw: Pointer to the HW structure
396 * @addr: Pointer to the MAC address
397 * @index: MAC address array register
398 */
399static void
400pch_gbe_mac_save_mac_addr_regs(struct pch_gbe_hw *hw,
401 struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
402{
403 mac_adr->high = ioread32(&hw->reg->mac_adr[index].high);
404 mac_adr->low = ioread32(&hw->reg->mac_adr[index].low);
405}
406
407/**
408 * pch_gbe_mac_store_mac_addr_regs - Store MAC addresse registers
409 * @hw: Pointer to the HW structure
410 * @addr: Pointer to the MAC address
411 * @index: MAC address array register
412 */
413static void
414pch_gbe_mac_store_mac_addr_regs(struct pch_gbe_hw *hw,
415 struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
416{
417 u32 adrmask;
418
419 adrmask = ioread32(&hw->reg->ADDR_MASK);
420 iowrite32((adrmask | (0x0001 << index)), &hw->reg->ADDR_MASK);
421 /* wait busy */
422 pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
423 /* Set the MAC address to the MAC address xA/xB register */
424 iowrite32(mac_adr->high, &hw->reg->mac_adr[index].high);
425 iowrite32(mac_adr->low, &hw->reg->mac_adr[index].low);
426 iowrite32((adrmask & ~(0x0001 << index)), &hw->reg->ADDR_MASK);
427 /* wait busy */
428 pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
429}
430
431#define MAC_ADDR_LIST_NUM 16
432/**
433 * pch_gbe_mac_reset_hw - Reset hardware 395 * pch_gbe_mac_reset_hw - Reset hardware
434 * @hw: Pointer to the HW structure 396 * @hw: Pointer to the HW structure
435 */ 397 */
436static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) 398static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
437{ 399{
438 struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
439 int i;
440
441 /* Read the MAC address. and store to the private data */ 400 /* Read the MAC address. and store to the private data */
442 pch_gbe_mac_read_mac_addr(hw); 401 pch_gbe_mac_read_mac_addr(hw);
443 /* Read other MAC addresses */
444 for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
445 pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
446 iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET); 402 iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
447#ifdef PCH_GBE_MAC_IFOP_RGMII 403#ifdef PCH_GBE_MAC_IFOP_RGMII
448 iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE); 404 iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
@@ -450,26 +406,17 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
450 pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST); 406 pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST);
451 /* Setup the receive addresses */ 407 /* Setup the receive addresses */
452 pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); 408 pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
453 for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
454 pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
455 return; 409 return;
456} 410}
457 411
458static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw) 412static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw)
459{ 413{
460 struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
461 int i;
462
463 /* Read the MAC addresses. and store to the private data */ 414 /* Read the MAC addresses. and store to the private data */
464 pch_gbe_mac_read_mac_addr(hw); 415 pch_gbe_mac_read_mac_addr(hw);
465 for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
466 pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
467 iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET); 416 iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET);
468 pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST); 417 pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST);
469 /* Setup the MAC addresses */ 418 /* Setup the MAC addresses */
470 pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); 419 pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
471 for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
472 pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
473 return; 420 return;
474} 421}
475 422
@@ -836,6 +783,8 @@ void pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter)
836void pch_gbe_reset(struct pch_gbe_adapter *adapter) 783void pch_gbe_reset(struct pch_gbe_adapter *adapter)
837{ 784{
838 pch_gbe_mac_reset_hw(&adapter->hw); 785 pch_gbe_mac_reset_hw(&adapter->hw);
786 /* reprogram multicast address register after reset */
787 pch_gbe_set_multi(adapter->netdev);
839 /* Setup the receive address. */ 788 /* Setup the receive address. */
840 pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES); 789 pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES);
841 if (pch_gbe_hal_init_hw(&adapter->hw)) 790 if (pch_gbe_hal_init_hw(&adapter->hw))
@@ -1398,6 +1347,8 @@ static void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter)
1398 /* Stop Receive */ 1347 /* Stop Receive */
1399 pch_gbe_mac_reset_rx(hw); 1348 pch_gbe_mac_reset_rx(hw);
1400 } 1349 }
1350 /* reprogram multicast address register after reset */
1351 pch_gbe_set_multi(adapter->netdev);
1401} 1352}
1402 1353
1403static void pch_gbe_start_receive(struct pch_gbe_hw *hw) 1354static void pch_gbe_start_receive(struct pch_gbe_hw *hw)
@@ -1980,7 +1931,6 @@ static int pch_gbe_request_irq(struct pch_gbe_adapter *adapter)
1980} 1931}
1981 1932
1982 1933
1983static void pch_gbe_set_multi(struct net_device *netdev);
1984/** 1934/**
1985 * pch_gbe_up - Up GbE network device 1935 * pch_gbe_up - Up GbE network device
1986 * @adapter: Board private structure 1936 * @adapter: Board private structure