Merge branch 'master' into for-next

Conflicts:
	drivers/devfreq/exynos4_bus.c

Sync with Linus' tree to be able to apply patches that are
against newer code (mvneta).

18 files changed, 395 insertions, 168 deletions

diff --git a/drivers/net/ethernet/mellanox/Kconfig b/drivers/net/ethernet/mellanox/Kconfig
index d8099a7903d3..bcdbc14aeff0 100644
--- a/drivers/net/ethernet/mellanox/Kconfig
+++ b/drivers/net/ethernet/mellanox/Kconfig
@@ -5,7 +5,7 @@
 config NET_VENDOR_MELLANOX
         bool "Mellanox devices"
         default y
-        depends on PCI && INET
+        depends on PCI
         ---help---
           If you have a network (Ethernet) card belonging to this class, say Y
           and read the Ethernet-HOWTO, available from
diff --git a/drivers/net/ethernet/mellanox/mlx4/Kconfig b/drivers/net/ethernet/mellanox/mlx4/Kconfig
index 5f027f95cc84..eb520ab64014 100644
--- a/drivers/net/ethernet/mellanox/mlx4/Kconfig
+++ b/drivers/net/ethernet/mellanox/mlx4/Kconfig
@@ -4,9 +4,8 @@
 
 config MLX4_EN
         tristate "Mellanox Technologies 10Gbit Ethernet support"
-        depends on PCI && INET
+        depends on PCI
         select MLX4_CORE
-        select INET_LRO
         ---help---
           This driver supports Mellanox Technologies ConnectX Ethernet
           devices.
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c
index 3d1899ff1076..fdc5f23d8e9f 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c
@@ -1498,6 +1498,7 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd,
         u32 reply;
         u8 is_going_down = 0;
         int i;
+        unsigned long flags;
 
         slave_state[slave].comm_toggle ^= 1;
         reply = (u32) slave_state[slave].comm_toggle << 31;
@@ -1576,12 +1577,12 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd,
                 mlx4_warn(dev, "Bad comm cmd:%d from slave:%d\n", cmd, slave);
                 goto reset_slave;
         }
-        spin_lock(&priv->mfunc.master.slave_state_lock);
+        spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags);
         if (!slave_state[slave].is_slave_going_down)
                 slave_state[slave].last_cmd = cmd;
         else
                 is_going_down = 1;
-        spin_unlock(&priv->mfunc.master.slave_state_lock);
+        spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags);
         if (is_going_down) {
                 mlx4_warn(dev, "Slave is going down aborting command(%d)"
                           " executing from slave:%d\n",
@@ -1597,10 +1598,10 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd,
 reset_slave:
         /* cleanup any slave resources */
         mlx4_delete_all_resources_for_slave(dev, slave);
-        spin_lock(&priv->mfunc.master.slave_state_lock);
+        spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags);
         if (!slave_state[slave].is_slave_going_down)
                 slave_state[slave].last_cmd = MLX4_COMM_CMD_RESET;
-        spin_unlock(&priv->mfunc.master.slave_state_lock);
+        spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags);
         /*with slave in the middle of flr, no need to clean resources again.*/
 inform_slave_state:
         memset(&slave_state[slave].event_eq, 0,
@@ -1755,7 +1756,7 @@ int mlx4_multi_func_init(struct mlx4_dev *dev)
                         spin_lock_init(&s_state->lock);
                 }
 
-                memset(&priv->mfunc.master.cmd_eqe, 0, sizeof(struct mlx4_eqe));
+                memset(&priv->mfunc.master.cmd_eqe, 0, dev->caps.eqe_size);
                 priv->mfunc.master.cmd_eqe.type = MLX4_EVENT_TYPE_CMD;
                 INIT_WORK(&priv->mfunc.master.comm_work,
                           mlx4_master_comm_channel);
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index aa9c2f6cf3c0..b8d0854a7ad1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -51,7 +51,7 @@ int mlx4_en_create_cq(struct mlx4_en_priv *priv,
         int err;
 
         cq->size = entries;
-        cq->buf_size = cq->size * sizeof(struct mlx4_cqe);
+        cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
 
         cq->ring = ring;
         cq->is_tx = mode;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
index 5d36795877cb..b799ab12a291 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
@@ -237,7 +237,7 @@ static int mlx4_en_dcbnl_ieee_setmaxrate(struct net_device *dev,
         if (err)
                 return err;
 
-        memcpy(priv->maxrate, tmp, sizeof(*priv->maxrate));
+        memcpy(priv->maxrate, tmp, sizeof(priv->maxrate));
 
         return 0;
 }
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
index 9d0b88eea02b..03447dad07e9 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
@@ -43,6 +43,34 @@
 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
 
+static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
+{
+        int i;
+        int err = 0;
+
+        for (i = 0; i < priv->tx_ring_num; i++) {
+                priv->tx_cq[i].moder_cnt = priv->tx_frames;
+                priv->tx_cq[i].moder_time = priv->tx_usecs;
+                err = mlx4_en_set_cq_moder(priv, &priv->tx_cq[i]);
+                if (err)
+                        return err;
+        }
+
+        if (priv->adaptive_rx_coal)
+                return 0;
+
+        for (i = 0; i < priv->rx_ring_num; i++) {
+                priv->rx_cq[i].moder_cnt = priv->rx_frames;
+                priv->rx_cq[i].moder_time = priv->rx_usecs;
+                priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
+                err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
+                if (err)
+                        return err;
+        }
+
+        return err;
+}
+
 static void
 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
 {
@@ -381,7 +409,6 @@ static int mlx4_en_set_coalesce(struct net_device *dev,
                               struct ethtool_coalesce *coal)
 {
         struct mlx4_en_priv *priv = netdev_priv(dev);
-        int err, i;
 
         priv->rx_frames = (coal->rx_max_coalesced_frames ==
                            MLX4_EN_AUTO_CONF) ?
@@ -397,14 +424,6 @@ static int mlx4_en_set_coalesce(struct net_device *dev,
             coal->tx_max_coalesced_frames != priv->tx_frames) {
                 priv->tx_usecs = coal->tx_coalesce_usecs;
                 priv->tx_frames = coal->tx_max_coalesced_frames;
-                for (i = 0; i < priv->tx_ring_num; i++) {
-                        priv->tx_cq[i].moder_cnt = priv->tx_frames;
-                        priv->tx_cq[i].moder_time = priv->tx_usecs;
-                        if (mlx4_en_set_cq_moder(priv, &priv->tx_cq[i])) {
-                                en_warn(priv, "Failed changing moderation "
-                                              "for TX cq %d\n", i);
-                        }
-                }
         }
 
         /* Set adaptive coalescing params */
@@ -414,18 +433,8 @@ static int mlx4_en_set_coalesce(struct net_device *dev,
         priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
         priv->sample_interval = coal->rate_sample_interval;
         priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
-        if (priv->adaptive_rx_coal)
-                return 0;
 
-        for (i = 0; i < priv->rx_ring_num; i++) {
-                priv->rx_cq[i].moder_cnt = priv->rx_frames;
-                priv->rx_cq[i].moder_time = priv->rx_usecs;
-                priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
-                err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
-                if (err)
-                        return err;
-        }
-        return 0;
+        return mlx4_en_moderation_update(priv);
 }
 
 static int mlx4_en_set_pauseparam(struct net_device *dev,
@@ -466,7 +475,6 @@ static int mlx4_en_set_ringparam(struct net_device *dev,
         u32 rx_size, tx_size;
         int port_up = 0;
         int err = 0;
-        int i;
 
         if (param->rx_jumbo_pending || param->rx_mini_pending)
                 return -EINVAL;
@@ -505,14 +513,7 @@ static int mlx4_en_set_ringparam(struct net_device *dev,
                         en_err(priv, "Failed starting port\n");
         }
 
-        for (i = 0; i < priv->rx_ring_num; i++) {
-                priv->rx_cq[i].moder_cnt = priv->rx_frames;
-                priv->rx_cq[i].moder_time = priv->rx_usecs;
-                priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
-                err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
-                if (err)
-                        goto out;
-        }
+        err = mlx4_en_moderation_update(priv);
 
 out:
         mutex_unlock(&mdev->state_lock);
@@ -612,13 +613,17 @@ static int mlx4_en_validate_flow(struct net_device *dev,
         struct ethtool_usrip4_spec *l3_mask;
         struct ethtool_tcpip4_spec *l4_mask;
         struct ethhdr *eth_mask;
-        u64 full_mac = ~0ull;
-        u64 zero_mac = 0;
 
         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
                 return -EINVAL;
 
-        switch (cmd->fs.flow_type & ~FLOW_EXT) {
+        if (cmd->fs.flow_type & FLOW_MAC_EXT) {
+                /* dest mac mask must be ff:ff:ff:ff:ff:ff */
+                if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
+                        return -EINVAL;
+        }
+
+        switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
         case TCP_V4_FLOW:
         case UDP_V4_FLOW:
                 if (cmd->fs.m_u.tcp_ip4_spec.tos)
@@ -643,11 +648,11 @@ static int mlx4_en_validate_flow(struct net_device *dev,
         case ETHER_FLOW:
                 eth_mask = &cmd->fs.m_u.ether_spec;
                 /* source mac mask must not be set */
-                if (memcmp(eth_mask->h_source, &zero_mac, ETH_ALEN))
+                if (!is_zero_ether_addr(eth_mask->h_source))
                         return -EINVAL;
 
                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
-                if (memcmp(eth_mask->h_dest, &full_mac, ETH_ALEN))
+                if (!is_broadcast_ether_addr(eth_mask->h_dest))
                         return -EINVAL;
 
                 if (!all_zeros_or_all_ones(eth_mask->h_proto))
@@ -746,7 +751,6 @@ static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
                                              struct list_head *rule_list_h)
 {
         int err;
-        u64 mac;
         __be64 be_mac;
         struct ethhdr *eth_spec;
         struct mlx4_en_priv *priv = netdev_priv(dev);
@@ -761,12 +765,16 @@ static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
         if (!spec_l2)
                 return -ENOMEM;
 
-        mac = priv->mac & MLX4_MAC_MASK;
-        be_mac = cpu_to_be64(mac << 16);
+        if (cmd->fs.flow_type & FLOW_MAC_EXT) {
+                memcpy(&be_mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
+        } else {
+                u64 mac = priv->mac & MLX4_MAC_MASK;
+                be_mac = cpu_to_be64(mac << 16);
+        }
 
         spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
         memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
-        if ((cmd->fs.flow_type & ~FLOW_EXT) != ETHER_FLOW)
+        if ((cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) != ETHER_FLOW)
                 memcpy(spec_l2->eth.dst_mac, &be_mac, ETH_ALEN);
 
         if ((cmd->fs.flow_type & FLOW_EXT) && cmd->fs.m_ext.vlan_tci) {
@@ -776,7 +784,7 @@ static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
 
         list_add_tail(&spec_l2->list, rule_list_h);
 
-        switch (cmd->fs.flow_type & ~FLOW_EXT) {
+        switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
         case ETHER_FLOW:
                 eth_spec = &cmd->fs.h_u.ether_spec;
                 memcpy(&spec_l2->eth.dst_mac, eth_spec->h_dest, ETH_ALEN);
@@ -998,6 +1006,73 @@ static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
         return err;
 }
 
+static void mlx4_en_get_channels(struct net_device *dev,
+                                 struct ethtool_channels *channel)
+{
+        struct mlx4_en_priv *priv = netdev_priv(dev);
+
+        memset(channel, 0, sizeof(*channel));
+
+        channel->max_rx = MAX_RX_RINGS;
+        channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
+
+        channel->rx_count = priv->rx_ring_num;
+        channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
+}
+
+static int mlx4_en_set_channels(struct net_device *dev,
+                                struct ethtool_channels *channel)
+{
+        struct mlx4_en_priv *priv = netdev_priv(dev);
+        struct mlx4_en_dev *mdev = priv->mdev;
+        int port_up;
+        int err = 0;
+
+        if (channel->other_count || channel->combined_count ||
+            channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
+            channel->rx_count > MAX_RX_RINGS ||
+            !channel->tx_count || !channel->rx_count)
+                return -EINVAL;
+
+        mutex_lock(&mdev->state_lock);
+        if (priv->port_up) {
+                port_up = 1;
+                mlx4_en_stop_port(dev);
+        }
+
+        mlx4_en_free_resources(priv);
+
+        priv->num_tx_rings_p_up = channel->tx_count;
+        priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
+        priv->rx_ring_num = channel->rx_count;
+
+        err = mlx4_en_alloc_resources(priv);
+        if (err) {
+                en_err(priv, "Failed reallocating port resources\n");
+                goto out;
+        }
+
+        netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
+        netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
+
+        mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
+
+        en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
+        en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
+
+        if (port_up) {
+                err = mlx4_en_start_port(dev);
+                if (err)
+                        en_err(priv, "Failed starting port\n");
+        }
+
+        err = mlx4_en_moderation_update(priv);
+
+out:
+        mutex_unlock(&mdev->state_lock);
+        return err;
+}
+
 const struct ethtool_ops mlx4_en_ethtool_ops = {
         .get_drvinfo = mlx4_en_get_drvinfo,
         .get_settings = mlx4_en_get_settings,
@@ -1022,6 +1097,8 @@ const struct ethtool_ops mlx4_en_ethtool_ops = {
         .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
         .get_rxfh_indir = mlx4_en_get_rxfh_indir,
         .set_rxfh_indir = mlx4_en_set_rxfh_indir,
+        .get_channels = mlx4_en_get_channels,
+        .set_channels = mlx4_en_set_channels,
 };
 
 
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_main.c b/drivers/net/ethernet/mellanox/mlx4/en_main.c
index d09b0d9ca68b..8611c89f034d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_main.c
@@ -250,7 +250,7 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
                                 rounddown_pow_of_two(max_t(int, MIN_RX_RINGS,
                                                            min_t(int,
                                                                  dev->caps.num_comp_vectors,
-                                                                 MAX_RX_RINGS)));
+                                                                 DEF_RX_RINGS)));
                 } else {
                         mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two(
                                 min_t(int, dev->caps.comp_pool/
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index edd9cb8d3e1d..75a3f467bb5b 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -47,11 +47,11 @@
 #include "mlx4_en.h"
 #include "en_port.h"
 
-static int mlx4_en_setup_tc(struct net_device *dev, u8 up)
+int mlx4_en_setup_tc(struct net_device *dev, u8 up)
 {
         struct mlx4_en_priv *priv = netdev_priv(dev);
         int i;
-        unsigned int q, offset = 0;
+        unsigned int offset = 0;
 
         if (up && up != MLX4_EN_NUM_UP)
                 return -EINVAL;
@@ -59,10 +59,9 @@ static int mlx4_en_setup_tc(struct net_device *dev, u8 up)
         netdev_set_num_tc(dev, up);
 
         /* Partition Tx queues evenly amongst UP's */
-        q = priv->tx_ring_num / up;
         for (i = 0; i < up; i++) {
-                netdev_set_tc_queue(dev, i, q, offset);
-                offset += q;
+                netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
+                offset += priv->num_tx_rings_p_up;
         }
 
         return 0;
@@ -870,7 +869,7 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
         /* If we haven't received a specific coalescing setting
          * (module param), we set the moderation parameters as follows:
          * - moder_cnt is set to the number of mtu sized packets to
-         *   satisfy our coelsing target.
+         *   satisfy our coalescing target.
          * - moder_time is set to a fixed value.
          */
         priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
@@ -1114,7 +1113,7 @@ int mlx4_en_start_port(struct net_device *dev)
                 /* Configure ring */
                 tx_ring = &priv->tx_ring[i];
                 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
-                        i / priv->mdev->profile.num_tx_rings_p_up);
+                        i / priv->num_tx_rings_p_up);
                 if (err) {
                         en_err(priv, "Failed allocating Tx ring\n");
                         mlx4_en_deactivate_cq(priv, cq);
@@ -1564,10 +1563,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
         int err;
 
         dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
-            prof->tx_ring_num, prof->rx_ring_num);
+                                 MAX_TX_RINGS, MAX_RX_RINGS);
         if (dev == NULL)
                 return -ENOMEM;
 
+        netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
+        netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
+
         SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
         dev->dev_id =  port - 1;
 
@@ -1586,20 +1588,23 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
         priv->flags = prof->flags;
         priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
                         MLX4_WQE_CTRL_SOLICITED);
+        priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
         priv->tx_ring_num = prof->tx_ring_num;
-        priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) *
-                        priv->tx_ring_num, GFP_KERNEL);
+
+        priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
+                                GFP_KERNEL);
         if (!priv->tx_ring) {
                 err = -ENOMEM;
                 goto out;
         }
-        priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * priv->tx_ring_num,
-                        GFP_KERNEL);
+        priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_RX_RINGS,
+                              GFP_KERNEL);
         if (!priv->tx_cq) {
                 err = -ENOMEM;
                 goto out;
         }
         priv->rx_ring_num = prof->rx_ring_num;
+        priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
         priv->mac_index = -1;
         priv->msg_enable = MLX4_EN_MSG_LEVEL;
         spin_lock_init(&priv->stats_lock);
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
index 5aba5ecdf1e2..fed26d867f4e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
@@ -566,6 +566,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
         struct ethhdr *ethh;
         dma_addr_t dma;
         u64 s_mac;
+        int factor = priv->cqe_factor;
 
         if (!priv->port_up)
                 return 0;
@@ -574,7 +575,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
          * descriptor offset can be deduced from the CQE index instead of
          * reading 'cqe->index' */
         index = cq->mcq.cons_index & ring->size_mask;
-        cqe = &cq->buf[index];
+        cqe = &cq->buf[(index << factor) + factor];
 
         /* Process all completed CQEs */
         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
@@ -630,7 +631,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
                         if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
                             (cqe->checksum == cpu_to_be16(0xffff))) {
                                 ring->csum_ok++;
-                                /* This packet is eligible for LRO if it is:
+                                /* This packet is eligible for GRO if it is:
                                  * - DIX Ethernet (type interpretation)
                                  * - TCP/IP (v4)
                                  * - without IP options
@@ -667,7 +668,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
                                         goto next;
                                 }
 
-                                /* LRO not possible, complete processing here */
+                                /* GRO not possible, complete processing here */
                                 ip_summed = CHECKSUM_UNNECESSARY;
                         } else {
                                 ip_summed = CHECKSUM_NONE;
@@ -709,12 +710,9 @@ next:
 
                 ++cq->mcq.cons_index;
                 index = (cq->mcq.cons_index) & ring->size_mask;
-                cqe = &cq->buf[index];
-                if (++polled == budget) {
-                        /* We are here because we reached the NAPI budget -
-                         * flush only pending LRO sessions */
+                cqe = &cq->buf[(index << factor) + factor];
+                if (++polled == budget)
                         goto out;
-                }
         }
 
 out:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
index b35094c590ba..6771b69f40d5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
@@ -315,12 +315,13 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
         struct mlx4_cqe *buf = cq->buf;
         u32 packets = 0;
         u32 bytes = 0;
+        int factor = priv->cqe_factor;
 
         if (!priv->port_up)
                 return;
 
         index = cons_index & size_mask;
-        cqe = &buf[index];
+        cqe = &buf[(index << factor) + factor];
         ring_index = ring->cons & size_mask;
 
         /* Process all completed CQEs */
@@ -349,7 +350,7 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
 
                 ++cons_index;
                 index = cons_index & size_mask;
-                cqe = &buf[index];
+                cqe = &buf[(index << factor) + factor];
         }
 
 
@@ -523,7 +524,7 @@ static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *sk
 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
 {
         struct mlx4_en_priv *priv = netdev_priv(dev);
-        u16 rings_p_up = priv->mdev->profile.num_tx_rings_p_up;
+        u16 rings_p_up = priv->num_tx_rings_p_up;
         u8 up = 0;
 
         if (dev->num_tc)
@@ -629,10 +630,15 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
                 ring->tx_csum++;
         }
 
-        /* Copy dst mac address to wqe */
-        ethh = (struct ethhdr *)skb->data;
-        tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
-        tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
+        if (mlx4_is_mfunc(mdev->dev) || priv->validate_loopback) {
+                /* Copy dst mac address to wqe. This allows loopback in eSwitch,
+                 * so that VFs and PF can communicate with each other
+                 */
+                ethh = (struct ethhdr *)skb->data;
+                tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
+                tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
+        }
+
         /* Handle LSO (TSO) packets */
         if (lso_header_size) {
                 /* Mark opcode as LSO */
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index c48cf6f6529c..251ae2f93116 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -101,15 +101,21 @@ static void eq_set_ci(struct mlx4_eq *eq, int req_not)
         mb();
 }
 
-static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry)
+static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor)
 {
-        unsigned long off = (entry & (eq->nent - 1)) * MLX4_EQ_ENTRY_SIZE;
-        return eq->page_list[off / PAGE_SIZE].buf + off % PAGE_SIZE;
+        /* (entry & (eq->nent - 1)) gives us a cyclic array */
+        unsigned long offset = (entry & (eq->nent - 1)) * (MLX4_EQ_ENTRY_SIZE << eqe_factor);
+        /* CX3 is capable of extending the EQE from 32 to 64 bytes.
+         * When this feature is enabled, the first (in the lower addresses)
+         * 32 bytes in the 64 byte EQE are reserved and the next 32 bytes
+         * contain the legacy EQE information.
+         */
+        return eq->page_list[offset / PAGE_SIZE].buf + (offset + (eqe_factor ? MLX4_EQ_ENTRY_SIZE : 0)) % PAGE_SIZE;
 }
 
-static struct mlx4_eqe *next_eqe_sw(struct mlx4_eq *eq)
+static struct mlx4_eqe *next_eqe_sw(struct mlx4_eq *eq, u8 eqe_factor)
 {
-        struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index);
+        struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index, eqe_factor);
         return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe;
 }
 
@@ -177,7 +183,7 @@ static void slave_event(struct mlx4_dev *dev, u8 slave, struct mlx4_eqe *eqe)
                 return;
         }
 
-        memcpy(s_eqe, eqe, sizeof(struct mlx4_eqe) - 1);
+        memcpy(s_eqe, eqe, dev->caps.eqe_size - 1);
         s_eqe->slave_id = slave;
         /* ensure all information is written before setting the ownersip bit */
         wmb();
@@ -401,6 +407,7 @@ void mlx4_master_handle_slave_flr(struct work_struct *work)
         struct mlx4_slave_state *slave_state = priv->mfunc.master.slave_state;
         int i;
         int err;
+        unsigned long flags;
 
         mlx4_dbg(dev, "mlx4_handle_slave_flr\n");
 
@@ -412,10 +419,10 @@ void mlx4_master_handle_slave_flr(struct work_struct *work)
 
                         mlx4_delete_all_resources_for_slave(dev, i);
                         /*return the slave to running mode*/
-                        spin_lock(&priv->mfunc.master.slave_state_lock);
+                        spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags);
                         slave_state[i].last_cmd = MLX4_COMM_CMD_RESET;
                         slave_state[i].is_slave_going_down = 0;
-                        spin_unlock(&priv->mfunc.master.slave_state_lock);
+                        spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags);
                         /*notify the FW:*/
                         err = mlx4_cmd(dev, 0, i, 0, MLX4_CMD_INFORM_FLR_DONE,
                                        MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
@@ -440,8 +447,9 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq)
         u8 update_slave_state;
         int i;
         enum slave_port_gen_event gen_event;
+        unsigned long flags;
 
-        while ((eqe = next_eqe_sw(eq))) {
+        while ((eqe = next_eqe_sw(eq, dev->caps.eqe_factor))) {
                 /*
                  * Make sure we read EQ entry contents after we've
                  * checked the ownership bit.
@@ -647,13 +655,13 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq)
                         } else
                                 update_slave_state = 1;
 
-                        spin_lock(&priv->mfunc.master.slave_state_lock);
+                        spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags);
                         if (update_slave_state) {
                                 priv->mfunc.master.slave_state[flr_slave].active = false;
                                 priv->mfunc.master.slave_state[flr_slave].last_cmd = MLX4_COMM_CMD_FLR;
                                 priv->mfunc.master.slave_state[flr_slave].is_slave_going_down = 1;
                         }
-                        spin_unlock(&priv->mfunc.master.slave_state_lock);
+                        spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags);
                         queue_work(priv->mfunc.master.comm_wq,
                                    &priv->mfunc.master.slave_flr_event_work);
                         break;
@@ -864,7 +872,8 @@ static int mlx4_create_eq(struct mlx4_dev *dev, int nent,
 
         eq->dev   = dev;
         eq->nent  = roundup_pow_of_two(max(nent, 2));
-        npages = PAGE_ALIGN(eq->nent * MLX4_EQ_ENTRY_SIZE) / PAGE_SIZE;
+        /* CX3 is capable of extending the CQE/EQE from 32 to 64 bytes */
+        npages = PAGE_ALIGN(eq->nent * (MLX4_EQ_ENTRY_SIZE << dev->caps.eqe_factor)) / PAGE_SIZE;
 
         eq->page_list = kmalloc(npages * sizeof *eq->page_list,
                                 GFP_KERNEL);
@@ -966,8 +975,9 @@ static void mlx4_free_eq(struct mlx4_dev *dev,
         struct mlx4_priv *priv = mlx4_priv(dev);
         struct mlx4_cmd_mailbox *mailbox;
         int err;
-        int npages = PAGE_ALIGN(MLX4_EQ_ENTRY_SIZE * eq->nent) / PAGE_SIZE;
         int i;
+        /* CX3 is capable of extending the CQE/EQE from 32 to 64 bytes */
+        int npages = PAGE_ALIGN((MLX4_EQ_ENTRY_SIZE << dev->caps.eqe_factor) * eq->nent) / PAGE_SIZE;
 
         mailbox = mlx4_alloc_cmd_mailbox(dev);
         if (IS_ERR(mailbox))
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index 4f30b99324cf..8b3d0512a46b 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -110,6 +110,8 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags)
                 [42] = "Multicast VEP steering support",
                 [48] = "Counters support",
                 [59] = "Port management change event support",
+                [61] = "64 byte EQE support",
+                [62] = "64 byte CQE support",
         };
         int i;
 
@@ -235,7 +237,7 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave,
                 field = dev->caps.num_ports;
                 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);
 
-                size = 0; /* no PF behaviour is set for now */
+                size = dev->caps.function_caps; /* set PF behaviours */
                 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET);
 
                 field = 0; /* protected FMR support not available as yet */
@@ -1237,6 +1239,24 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
         if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)
                 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 4);
 
+        /* CX3 is capable of extending CQEs/EQEs from 32 to 64 bytes */
+        if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_EQE) {
+                *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 29);
+                dev->caps.eqe_size   = 64;
+                dev->caps.eqe_factor = 1;
+        } else {
+                dev->caps.eqe_size   = 32;
+                dev->caps.eqe_factor = 0;
+        }
+
+        if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_CQE) {
+                *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 30);
+                dev->caps.cqe_size   = 64;
+                dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_64B_CQE;
+        } else {
+                dev->caps.cqe_size   = 32;
+        }
+
         /* QPC/EEC/CQC/EQC/RDMARC attributes */
 
         MLX4_PUT(inbox, param->qpc_base,      INIT_HCA_QPC_BASE_OFFSET);
@@ -1318,7 +1338,9 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
 {
         struct mlx4_cmd_mailbox *mailbox;
         __be32 *outbox;
+        u32 dword_field;
         int err;
+        u8 byte_field;
 
 #define QUERY_HCA_GLOBAL_CAPS_OFFSET    0x04
 
@@ -1351,10 +1373,18 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
         MLX4_GET(param->rdmarc_base,   outbox, INIT_HCA_RDMARC_BASE_OFFSET);
         MLX4_GET(param->log_rd_per_qp, outbox, INIT_HCA_LOG_RD_OFFSET);
 
+        MLX4_GET(dword_field, outbox, INIT_HCA_FLAGS_OFFSET);
+        if (dword_field & (1 << INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN)) {
+                param->steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
+        } else {
+                MLX4_GET(byte_field, outbox, INIT_HCA_UC_STEERING_OFFSET);
+                if (byte_field & 0x8)
+                        param->steering_mode = MLX4_STEERING_MODE_B0;
+                else
+                        param->steering_mode = MLX4_STEERING_MODE_A0;
+        }
         /* steering attributes */
-        if (dev->caps.steering_mode ==
-            MLX4_STEERING_MODE_DEVICE_MANAGED) {
-
+        if (param->steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
                 MLX4_GET(param->mc_base, outbox, INIT_HCA_FS_BASE_OFFSET);
                 MLX4_GET(param->log_mc_entry_sz, outbox,
                          INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET);
@@ -1370,6 +1400,13 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
                          INIT_HCA_LOG_MC_TABLE_SZ_OFFSET);
         }
 
+        /* CX3 is capable of extending CQEs/EQEs from 32 to 64 bytes */
+        MLX4_GET(byte_field, outbox, INIT_HCA_EQE_CQE_OFFSETS);
+        if (byte_field & 0x20) /* 64-bytes eqe enabled */
+                param->dev_cap_enabled |= MLX4_DEV_CAP_64B_EQE_ENABLED;
+        if (byte_field & 0x40) /* 64-bytes cqe enabled */
+                param->dev_cap_enabled |= MLX4_DEV_CAP_64B_CQE_ENABLED;
+
         /* TPT attributes */
 
         MLX4_GET(param->dmpt_base,  outbox, INIT_HCA_DMPT_BASE_OFFSET);
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h
index 85abe9c11a22..dbf2f69cc59f 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.h
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.h
@@ -172,6 +172,8 @@ struct mlx4_init_hca_param {
         u8  log_uar_sz;
         u8  uar_page_sz; /* log pg sz in 4k chunks */
         u8  fs_hash_enable_bits;
+        u8  steering_mode; /* for QUERY_HCA */
+        u64 dev_cap_enabled;
 };
 
 struct mlx4_init_ib_param {
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 2aa80afd98d2..a6542d75374c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -85,20 +85,26 @@ static int probe_vf;
 module_param(probe_vf, int, 0644);
 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
 
-int mlx4_log_num_mgm_entry_size = 10;
+int mlx4_log_num_mgm_entry_size = MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE;
 module_param_named(log_num_mgm_entry_size,
                         mlx4_log_num_mgm_entry_size, int, 0444);
 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
                                          " of qp per mcg, for example:"
-                                         " 10 gives 248.range: 9<="
+                                         " 10 gives 248.range: 7 <="
                                          " log_num_mgm_entry_size <= 12."
-                                         " Not in use with device managed"
-                                         " flow steering");
+                                         " To activate device managed"
+                                         " flow steering when available, set to -1");
+
+static bool enable_64b_cqe_eqe;
+module_param(enable_64b_cqe_eqe, bool, 0444);
+MODULE_PARM_DESC(enable_64b_cqe_eqe,
+                 "Enable 64 byte CQEs/EQEs when the the FW supports this");
 
 #define HCA_GLOBAL_CAP_MASK            0
-#define PF_CONTEXT_BEHAVIOUR_MASK      0
 
-static char mlx4_version[] __devinitdata =
+#define PF_CONTEXT_BEHAVIOUR_MASK       MLX4_FUNC_CAP_64B_EQE_CQE
+
+static char mlx4_version[] =
         DRV_NAME ": Mellanox ConnectX core driver v"
         DRV_VERSION " (" DRV_RELDATE ")\n";
 
@@ -275,28 +281,6 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
         dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
 
-        if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
-                dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
-                dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
-                dev->caps.fs_log_max_ucast_qp_range_size =
-                        dev_cap->fs_log_max_ucast_qp_range_size;
-        } else {
-                if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
-                    dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
-                        dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
-                } else {
-                        dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
-
-                        if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
-                            dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
-                                mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
-                                                "set to use B0 steering. Falling back to A0 steering mode.\n");
-                }
-                dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
-        }
-        mlx4_dbg(dev, "Steering mode is: %s\n",
-                 mlx4_steering_mode_str(dev->caps.steering_mode));
-
         /* Sense port always allowed on supported devices for ConnectX-1 and -2 */
         if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT)
                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
@@ -386,6 +370,21 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 
         dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0;
+
+        if (!enable_64b_cqe_eqe) {
+                if (dev_cap->flags &
+                    (MLX4_DEV_CAP_FLAG_64B_CQE | MLX4_DEV_CAP_FLAG_64B_EQE)) {
+                        mlx4_warn(dev, "64B EQEs/CQEs supported by the device but not enabled\n");
+                        dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE;
+                        dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE;
+                }
+        }
+
+        if ((dev_cap->flags &
+            (MLX4_DEV_CAP_FLAG_64B_CQE | MLX4_DEV_CAP_FLAG_64B_EQE)) &&
+            mlx4_is_master(dev))
+                dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE;
+
         return 0;
 }
 /*The function checks if there are live vf, return the num of them*/
@@ -472,6 +471,23 @@ int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 }
 EXPORT_SYMBOL(mlx4_is_slave_active);
 
+static void slave_adjust_steering_mode(struct mlx4_dev *dev,
+                                       struct mlx4_dev_cap *dev_cap,
+                                       struct mlx4_init_hca_param *hca_param)
+{
+        dev->caps.steering_mode = hca_param->steering_mode;
+        if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
+                dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
+                dev->caps.fs_log_max_ucast_qp_range_size =
+                        dev_cap->fs_log_max_ucast_qp_range_size;
+        } else
+                dev->caps.num_qp_per_mgm =
+                        4 * ((1 << hca_param->log_mc_entry_sz)/16 - 2);
+
+        mlx4_dbg(dev, "Steering mode is: %s\n",
+                 mlx4_steering_mode_str(dev->caps.steering_mode));
+}
+
 static int mlx4_slave_cap(struct mlx4_dev *dev)
 {
         int                        err;
@@ -599,6 +615,23 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
                 goto err_mem;
         }
 
+        if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_EQE_ENABLED) {
+                dev->caps.eqe_size   = 64;
+                dev->caps.eqe_factor = 1;
+        } else {
+                dev->caps.eqe_size   = 32;
+                dev->caps.eqe_factor = 0;
+        }
+
+        if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_CQE_ENABLED) {
+                dev->caps.cqe_size   = 64;
+                dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_64B_CQE;
+        } else {
+                dev->caps.cqe_size   = 32;
+        }
+
+        slave_adjust_steering_mode(dev, &dev_cap, &hca_param);
+
         return 0;
 
 err_mem:
@@ -1285,6 +1318,59 @@ static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
         }
 }
 
+static int choose_log_fs_mgm_entry_size(int qp_per_entry)
+{
+        int i = MLX4_MIN_MGM_LOG_ENTRY_SIZE;
+
+        for (i = MLX4_MIN_MGM_LOG_ENTRY_SIZE; i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE;
+              i++) {
+                if (qp_per_entry <= 4 * ((1 << i) / 16 - 2))
+                        break;
+        }
+
+        return (i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE) ? i : -1;
+}
+
+static void choose_steering_mode(struct mlx4_dev *dev,
+                                 struct mlx4_dev_cap *dev_cap)
+{
+        if (mlx4_log_num_mgm_entry_size == -1 &&
+            dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN &&
+            (!mlx4_is_mfunc(dev) ||
+             (dev_cap->fs_max_num_qp_per_entry >= (num_vfs + 1))) &&
+            choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry) >=
+                MLX4_MIN_MGM_LOG_ENTRY_SIZE) {
+                dev->oper_log_mgm_entry_size =
+                        choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry);
+                dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
+                dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
+                dev->caps.fs_log_max_ucast_qp_range_size =
+                        dev_cap->fs_log_max_ucast_qp_range_size;
+        } else {
+                if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
+                    dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
+                        dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
+                else {
+                        dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
+
+                        if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
+                            dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
+                                mlx4_warn(dev, "Must have both UC_STEER and MC_STEER flags "
+                                          "set to use B0 steering. Falling back to A0 steering mode.\n");
+                }
+                dev->oper_log_mgm_entry_size =
+                        mlx4_log_num_mgm_entry_size > 0 ?
+                        mlx4_log_num_mgm_entry_size :
+                        MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE;
+                dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
+        }
+        mlx4_dbg(dev, "Steering mode is: %s, oper_log_mgm_entry_size = %d, "
+                 "modparam log_num_mgm_entry_size = %d\n",
+                 mlx4_steering_mode_str(dev->caps.steering_mode),
+                 dev->oper_log_mgm_entry_size,
+                 mlx4_log_num_mgm_entry_size);
+}
+
 static int mlx4_init_hca(struct mlx4_dev *dev)
 {
         struct mlx4_priv          *priv = mlx4_priv(dev);
@@ -1324,6 +1410,8 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
                         goto err_stop_fw;
                 }
 
+                choose_steering_mode(dev, &dev_cap);
+
                 if (mlx4_is_master(dev))
                         mlx4_parav_master_pf_caps(dev);
 
@@ -1702,15 +1790,8 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev)
         int i;
 
         if (msi_x) {
-                /* In multifunction mode each function gets 2 msi-X vectors
-                 * one for data path completions anf the other for asynch events
-                 * or command completions */
-                if (mlx4_is_mfunc(dev)) {
-                        nreq = 2;
-                } else {
-                        nreq = min_t(int, dev->caps.num_eqs -
-                                     dev->caps.reserved_eqs, nreq);
-                }
+                nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs,
+                             nreq);
 
                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
                 if (!entries)
@@ -2224,8 +2305,7 @@ err_disable_pdev:
         return err;
 }
 
-static int __devinit mlx4_init_one(struct pci_dev *pdev,
-                                   const struct pci_device_id *id)
+static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
         printk_once(KERN_INFO "%s", mlx4_version);
 
@@ -2391,7 +2471,7 @@ static struct pci_driver mlx4_driver = {
         .name           = DRV_NAME,
         .id_table       = mlx4_pci_table,
         .probe          = mlx4_init_one,
-        .remove         = __devexit_p(mlx4_remove_one),
+        .remove         = mlx4_remove_one,
         .err_handler    = &mlx4_err_handler,
 };
 
@@ -2417,6 +2497,17 @@ static int __init mlx4_verify_params(void)
                 port_type_array[0] = true;
         }
 
+        if (mlx4_log_num_mgm_entry_size != -1 &&
+            (mlx4_log_num_mgm_entry_size < MLX4_MIN_MGM_LOG_ENTRY_SIZE ||
+             mlx4_log_num_mgm_entry_size > MLX4_MAX_MGM_LOG_ENTRY_SIZE)) {
+                pr_warning("mlx4_core: mlx4_log_num_mgm_entry_size (%d) not "
+                           "in legal range (-1 or %d..%d)\n",
+                           mlx4_log_num_mgm_entry_size,
+                           MLX4_MIN_MGM_LOG_ENTRY_SIZE,
+                           MLX4_MAX_MGM_LOG_ENTRY_SIZE);
+                return -1;
+        }
+
         return 0;
 }
 
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c
index e151c21baf2b..1ee4db3c6400 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mcg.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c
@@ -54,12 +54,7 @@ struct mlx4_mgm {
 
 int mlx4_get_mgm_entry_size(struct mlx4_dev *dev)
 {
-        if (dev->caps.steering_mode ==
-            MLX4_STEERING_MODE_DEVICE_MANAGED)
-                return 1 << MLX4_FS_MGM_LOG_ENTRY_SIZE;
-        else
-                return min((1 << mlx4_log_num_mgm_entry_size),
-                           MLX4_MAX_MGM_ENTRY_SIZE);
+        return 1 << dev->oper_log_mgm_entry_size;
 }
 
 int mlx4_get_qp_per_mgm(struct mlx4_dev *dev)
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 1cf42036d7bb..116c5c29d2d1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -94,8 +94,10 @@ enum {
 };
 
 enum {
-        MLX4_MAX_MGM_ENTRY_SIZE = 0x1000,
-        MLX4_MAX_QP_PER_MGM     = 4 * (MLX4_MAX_MGM_ENTRY_SIZE / 16 - 2),
+        MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE = 10,
+        MLX4_MIN_MGM_LOG_ENTRY_SIZE = 7,
+        MLX4_MAX_MGM_LOG_ENTRY_SIZE = 12,
+        MLX4_MAX_QP_PER_MGM = 4 * ((1 << MLX4_MAX_MGM_LOG_ENTRY_SIZE) / 16 - 2),
         MLX4_MTT_ENTRY_PER_SEG  = 8,
 };
 
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 9d27e42264e2..8d54412ada63 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -67,7 +67,8 @@
 
 #define MLX4_EN_PAGE_SHIFT      12
 #define MLX4_EN_PAGE_SIZE       (1 << MLX4_EN_PAGE_SHIFT)
-#define MAX_RX_RINGS            16
+#define DEF_RX_RINGS            16
+#define MAX_RX_RINGS            128
 #define MIN_RX_RINGS            4
 #define TXBB_SIZE               64
 #define HEADROOM                (2048 / TXBB_SIZE + 1)
@@ -95,8 +96,6 @@
 #define MLX4_EN_ALLOC_SIZE      PAGE_ALIGN(16384)
 #define MLX4_EN_ALLOC_ORDER     get_order(MLX4_EN_ALLOC_SIZE)
 
-#define MLX4_EN_MAX_LRO_DESCRIPTORS     32
-
 /* Receive fragment sizes; we use at most 4 fragments (for 9600 byte MTU
  * and 4K allocations) */
 enum {
@@ -120,13 +119,15 @@ enum {
 #define MLX4_EN_NUM_UP                  8
 #define MLX4_EN_DEF_TX_RING_SIZE        512
 #define MLX4_EN_DEF_RX_RING_SIZE        1024
+#define MAX_TX_RINGS                    (MLX4_EN_MAX_TX_RING_P_UP * \
+                                         MLX4_EN_NUM_UP)
 
 /* Target number of packets to coalesce with interrupt moderation */
 #define MLX4_EN_RX_COAL_TARGET  44
 #define MLX4_EN_RX_COAL_TIME    0x10
 
 #define MLX4_EN_TX_COAL_PKTS    16
-#define MLX4_EN_TX_COAL_TIME    0x80
+#define MLX4_EN_TX_COAL_TIME    0x10
 
 #define MLX4_EN_RX_RATE_LOW             400000
 #define MLX4_EN_RX_COAL_TIME_LOW        0
@@ -290,21 +291,6 @@ struct mlx4_en_rx_ring {
         unsigned long csum_none;
 };
 
-
-static inline int mlx4_en_can_lro(__be16 status)
-{
-        return (status & cpu_to_be16(MLX4_CQE_STATUS_IPV4       |
-                                     MLX4_CQE_STATUS_IPV4F      |
-                                     MLX4_CQE_STATUS_IPV6       |
-                                     MLX4_CQE_STATUS_IPV4OPT    |
-                                     MLX4_CQE_STATUS_TCP        |
-                                     MLX4_CQE_STATUS_UDP        |
-                                     MLX4_CQE_STATUS_IPOK)) ==
-                cpu_to_be16(MLX4_CQE_STATUS_IPV4 |
-                            MLX4_CQE_STATUS_IPOK |
-                            MLX4_CQE_STATUS_TCP);
-}
-
 struct mlx4_en_cq {
         struct mlx4_cq          mcq;
         struct mlx4_hwq_resources wqres;
@@ -487,12 +473,14 @@ struct mlx4_en_priv {
         int mac_index;
         unsigned max_mtu;
         int base_qpn;
+        int cqe_factor;
 
         struct mlx4_en_rss_map rss_map;
         __be32 ctrl_flags;
         u32 flags;
 #define MLX4_EN_FLAG_PROMISC    0x1
 #define MLX4_EN_FLAG_MC_PROMISC 0x2
+        u8 num_tx_rings_p_up;
         u32 tx_ring_num;
         u32 rx_ring_num;
         u32 rx_skb_size;
@@ -613,6 +601,8 @@ int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
 #endif
 
+int mlx4_en_setup_tc(struct net_device *dev, u8 up);
+
 #ifdef CONFIG_RFS_ACCEL
 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
                              struct mlx4_en_rx_ring *rx_ring);
diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
index b05705f50f0f..561ed2a22a17 100644
--- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
+++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
@@ -3071,6 +3071,7 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
         struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
         struct list_head *rlist = &tracker->slave_list[slave].res_list[RES_MAC];
         int err;
+        int qpn;
         struct mlx4_net_trans_rule_hw_ctrl *ctrl;
         struct _rule_hw  *rule_header;
         int header_id;
@@ -3080,13 +3081,21 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
                 return -EOPNOTSUPP;
 
         ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf;
+        qpn = be32_to_cpu(ctrl->qpn) & 0xffffff;
+        err = get_res(dev, slave, qpn, RES_QP, NULL);
+        if (err) {
+                pr_err("Steering rule with qpn 0x%x rejected.\n", qpn);
+                return err;
+        }
         rule_header = (struct _rule_hw *)(ctrl + 1);
         header_id = map_hw_to_sw_id(be16_to_cpu(rule_header->id));
 
         switch (header_id) {
         case MLX4_NET_TRANS_RULE_ID_ETH:
-                if (validate_eth_header_mac(slave, rule_header, rlist))
-                        return -EINVAL;
+                if (validate_eth_header_mac(slave, rule_header, rlist)) {
+                        err = -EINVAL;
+                        goto err_put;
+                }
                 break;
         case MLX4_NET_TRANS_RULE_ID_IB:
                 break;
@@ -3094,14 +3103,17 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
         case MLX4_NET_TRANS_RULE_ID_TCP:
         case MLX4_NET_TRANS_RULE_ID_UDP:
                 pr_warn("Can't attach FS rule without L2 headers, adding L2 header.\n");
-                if (add_eth_header(dev, slave, inbox, rlist, header_id))
-                        return -EINVAL;
+                if (add_eth_header(dev, slave, inbox, rlist, header_id)) {
+                        err = -EINVAL;
+                        goto err_put;
+                }
                 vhcr->in_modifier +=
                         sizeof(struct mlx4_net_trans_rule_hw_eth) >> 2;
                 break;
         default:
                 pr_err("Corrupted mailbox.\n");
-                return -EINVAL;
+                err = -EINVAL;
+                goto err_put;
         }
 
         err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param,
@@ -3109,16 +3121,18 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
                            MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
                            MLX4_CMD_NATIVE);
         if (err)
-                return err;
+                goto err_put;
 
         err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, 0);
         if (err) {
                 mlx4_err(dev, "Fail to add flow steering resources.\n ");
                 /* detach rule*/
                 mlx4_cmd(dev, vhcr->out_param, 0, 0,
-                         MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
+                         MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
                          MLX4_CMD_NATIVE);
         }
+err_put:
+        put_res(dev, slave, qpn, RES_QP);
         return err;
 }