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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 16:56:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 16:56:26 -0400
commit5dedb9f3bd5bcb186313ea0c0cff8f2c525d4122 (patch)
tree88514547a6e95176e7a9dc2fbdc7fa7c1bec3107 /drivers/net/ethernet/mellanox/mlx4
parentddb03448274b95bff6df2a2f1a74d7eb4be529d3 (diff)
parent089117e1ad265625b523a4168f77f2521b18fd32 (diff)
Merge tag 'rdma-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
Pull InfiniBand/RDMA changes from Roland Dreier: - Updates to the qib low-level driver - First chunk of changes for SR-IOV support for mlx4 IB - RDMA CM support for IPv6-only binding - Other misc cleanups and fixes Fix up some add-add conflicts in include/linux/mlx4/device.h and drivers/net/ethernet/mellanox/mlx4/main.c * tag 'rdma-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (30 commits) IB/qib: checkpatch fixes IB/qib: Add congestion control agent implementation IB/qib: Reduce sdma_lock contention IB/qib: Fix an incorrect log message IB/qib: Fix QP RCU sparse warnings mlx4: Put physical GID and P_Key table sizes in mlx4_phys_caps struct and paravirtualize them mlx4_core: Allow guests to have IB ports mlx4_core: Implement mechanism for reserved Q_Keys net/mlx4_core: Free ICM table in case of error IB/cm: Destroy idr as part of the module init error flow mlx4_core: Remove double function declarations IB/mlx4: Fill the masked_atomic_cap attribute in query device IB/mthca: Fill in sq_sig_type in query QP IB/mthca: Warning about event for non-existent QPs should show event type IB/qib: Fix sparse RCU warnings in qib_keys.c net/mlx4_core: Initialize IB port capabilities for all slaves mlx4: Use port management change event instead of smp_snoop IB/qib: RCU locking for MR validation IB/qib: Avoid returning EBUSY from MR deregister IB/qib: Fix UC MR refs for immediate operations ...
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_main.c5
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c22
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.c132
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/icm.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/icm.h6
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/intf.c5
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c86
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4.h67
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/port.c11
9 files changed, 206 insertions, 130 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_main.c b/drivers/net/ethernet/mellanox/mlx4/en_main.c
index 69ba57270481..a52922ed85c1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_main.c
@@ -131,7 +131,7 @@ static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port)
131} 131}
132 132
133static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, 133static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
134 enum mlx4_dev_event event, int port) 134 enum mlx4_dev_event event, unsigned long port)
135{ 135{
136 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; 136 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr;
137 struct mlx4_en_priv *priv; 137 struct mlx4_en_priv *priv;
@@ -156,7 +156,8 @@ static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
156 if (port < 1 || port > dev->caps.num_ports || 156 if (port < 1 || port > dev->caps.num_ports ||
157 !mdev->pndev[port]) 157 !mdev->pndev[port])
158 return; 158 return;
159 mlx4_warn(mdev, "Unhandled event %d for port %d\n", event, port); 159 mlx4_warn(mdev, "Unhandled event %d for port %d\n", event,
160 (int) port);
160 } 161 }
161} 162}
162 163
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index cd48337cbfc0..99a04648fab0 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -83,6 +83,15 @@ enum {
83 (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \ 83 (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \
84 (1ull << MLX4_EVENT_TYPE_FATAL_WARNING)) 84 (1ull << MLX4_EVENT_TYPE_FATAL_WARNING))
85 85
86static u64 get_async_ev_mask(struct mlx4_dev *dev)
87{
88 u64 async_ev_mask = MLX4_ASYNC_EVENT_MASK;
89 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
90 async_ev_mask |= (1ull << MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT);
91
92 return async_ev_mask;
93}
94
86static void eq_set_ci(struct mlx4_eq *eq, int req_not) 95static void eq_set_ci(struct mlx4_eq *eq, int req_not)
87{ 96{
88 __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | 97 __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) |
@@ -474,6 +483,11 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq)
474 483
475 break; 484 break;
476 485
486 case MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT:
487 mlx4_dispatch_event(dev, MLX4_DEV_EVENT_PORT_MGMT_CHANGE,
488 (unsigned long) eqe);
489 break;
490
477 case MLX4_EVENT_TYPE_EEC_CATAS_ERROR: 491 case MLX4_EVENT_TYPE_EEC_CATAS_ERROR:
478 case MLX4_EVENT_TYPE_ECC_DETECT: 492 case MLX4_EVENT_TYPE_ECC_DETECT:
479 default: 493 default:
@@ -957,7 +971,7 @@ int mlx4_init_eq_table(struct mlx4_dev *dev)
957 priv->eq_table.have_irq = 1; 971 priv->eq_table.have_irq = 1;
958 } 972 }
959 973
960 err = mlx4_MAP_EQ(dev, MLX4_ASYNC_EVENT_MASK, 0, 974 err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0,
961 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); 975 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn);
962 if (err) 976 if (err)
963 mlx4_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", 977 mlx4_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n",
@@ -997,7 +1011,7 @@ void mlx4_cleanup_eq_table(struct mlx4_dev *dev)
997 struct mlx4_priv *priv = mlx4_priv(dev); 1011 struct mlx4_priv *priv = mlx4_priv(dev);
998 int i; 1012 int i;
999 1013
1000 mlx4_MAP_EQ(dev, MLX4_ASYNC_EVENT_MASK, 1, 1014 mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 1,
1001 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); 1015 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn);
1002 1016
1003 mlx4_free_irqs(dev); 1017 mlx4_free_irqs(dev);
@@ -1041,7 +1055,7 @@ int mlx4_test_interrupts(struct mlx4_dev *dev)
1041 mlx4_cmd_use_polling(dev); 1055 mlx4_cmd_use_polling(dev);
1042 1056
1043 /* Map the new eq to handle all asyncronous events */ 1057 /* Map the new eq to handle all asyncronous events */
1044 err = mlx4_MAP_EQ(dev, MLX4_ASYNC_EVENT_MASK, 0, 1058 err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0,
1045 priv->eq_table.eq[i].eqn); 1059 priv->eq_table.eq[i].eqn);
1046 if (err) { 1060 if (err) {
1047 mlx4_warn(dev, "Failed mapping eq for interrupt test\n"); 1061 mlx4_warn(dev, "Failed mapping eq for interrupt test\n");
@@ -1055,7 +1069,7 @@ int mlx4_test_interrupts(struct mlx4_dev *dev)
1055 } 1069 }
1056 1070
1057 /* Return to default */ 1071 /* Return to default */
1058 mlx4_MAP_EQ(dev, MLX4_ASYNC_EVENT_MASK, 0, 1072 mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0,
1059 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); 1073 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn);
1060 return err; 1074 return err;
1061} 1075}
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index 1d70657058a5..c69648487321 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -109,6 +109,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags)
109 [41] = "Unicast VEP steering support", 109 [41] = "Unicast VEP steering support",
110 [42] = "Multicast VEP steering support", 110 [42] = "Multicast VEP steering support",
111 [48] = "Counters support", 111 [48] = "Counters support",
112 [59] = "Port management change event support",
112 }; 113 };
113 int i; 114 int i;
114 115
@@ -174,6 +175,7 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave,
174#define QUERY_FUNC_CAP_FLAGS_OFFSET 0x0 175#define QUERY_FUNC_CAP_FLAGS_OFFSET 0x0
175#define QUERY_FUNC_CAP_NUM_PORTS_OFFSET 0x1 176#define QUERY_FUNC_CAP_NUM_PORTS_OFFSET 0x1
176#define QUERY_FUNC_CAP_PF_BHVR_OFFSET 0x4 177#define QUERY_FUNC_CAP_PF_BHVR_OFFSET 0x4
178#define QUERY_FUNC_CAP_FMR_OFFSET 0x8
177#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET 0x10 179#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET 0x10
178#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET 0x14 180#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET 0x14
179#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET 0x18 181#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET 0x18
@@ -183,25 +185,44 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave,
183#define QUERY_FUNC_CAP_MAX_EQ_OFFSET 0x2c 185#define QUERY_FUNC_CAP_MAX_EQ_OFFSET 0x2c
184#define QUERY_FUNC_CAP_RESERVED_EQ_OFFSET 0X30 186#define QUERY_FUNC_CAP_RESERVED_EQ_OFFSET 0X30
185 187
188#define QUERY_FUNC_CAP_FMR_FLAG 0x80
189#define QUERY_FUNC_CAP_FLAG_RDMA 0x40
190#define QUERY_FUNC_CAP_FLAG_ETH 0x80
191
192/* when opcode modifier = 1 */
186#define QUERY_FUNC_CAP_PHYS_PORT_OFFSET 0x3 193#define QUERY_FUNC_CAP_PHYS_PORT_OFFSET 0x3
194#define QUERY_FUNC_CAP_RDMA_PROPS_OFFSET 0x8
187#define QUERY_FUNC_CAP_ETH_PROPS_OFFSET 0xc 195#define QUERY_FUNC_CAP_ETH_PROPS_OFFSET 0xc
188 196
197#define QUERY_FUNC_CAP_ETH_PROPS_FORCE_MAC 0x40
198#define QUERY_FUNC_CAP_ETH_PROPS_FORCE_VLAN 0x80
199
200#define QUERY_FUNC_CAP_RDMA_PROPS_FORCE_PHY_WQE_GID 0x80
201
189 if (vhcr->op_modifier == 1) { 202 if (vhcr->op_modifier == 1) {
190 field = vhcr->in_modifier; 203 field = vhcr->in_modifier;
191 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); 204 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHYS_PORT_OFFSET);
192 205
193 field = 0; /* ensure fvl bit is not set */ 206 field = 0;
207 /* ensure force vlan and force mac bits are not set */
194 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_ETH_PROPS_OFFSET); 208 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_ETH_PROPS_OFFSET);
209 /* ensure that phy_wqe_gid bit is not set */
210 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_RDMA_PROPS_OFFSET);
211
195 } else if (vhcr->op_modifier == 0) { 212 } else if (vhcr->op_modifier == 0) {
196 field = 1 << 7; /* enable only ethernet interface */ 213 /* enable rdma and ethernet interfaces */
214 field = (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA);
197 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET); 215 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET);
198 216
199 field = dev->caps.num_ports; 217 field = dev->caps.num_ports;
200 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); 218 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);
201 219
202 size = 0; /* no PF behavious is set for now */ 220 size = 0; /* no PF behaviour is set for now */
203 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET); 221 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET);
204 222
223 field = 0; /* protected FMR support not available as yet */
224 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FMR_OFFSET);
225
205 size = dev->caps.num_qps; 226 size = dev->caps.num_qps;
206 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET); 227 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET);
207 228
@@ -254,11 +275,12 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap)
254 outbox = mailbox->buf; 275 outbox = mailbox->buf;
255 276
256 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS_OFFSET); 277 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS_OFFSET);
257 if (!(field & (1 << 7))) { 278 if (!(field & (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA))) {
258 mlx4_err(dev, "The host doesn't support eth interface\n"); 279 mlx4_err(dev, "The host supports neither eth nor rdma interfaces\n");
259 err = -EPROTONOSUPPORT; 280 err = -EPROTONOSUPPORT;
260 goto out; 281 goto out;
261 } 282 }
283 func_cap->flags = field;
262 284
263 MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); 285 MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);
264 func_cap->num_ports = field; 286 func_cap->num_ports = field;
@@ -297,17 +319,27 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap)
297 if (err) 319 if (err)
298 goto out; 320 goto out;
299 321
300 MLX4_GET(field, outbox, QUERY_FUNC_CAP_ETH_PROPS_OFFSET); 322 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) {
301 if (field & (1 << 7)) { 323 MLX4_GET(field, outbox, QUERY_FUNC_CAP_ETH_PROPS_OFFSET);
302 mlx4_err(dev, "VLAN is enforced on this port\n"); 324 if (field & QUERY_FUNC_CAP_ETH_PROPS_FORCE_VLAN) {
303 err = -EPROTONOSUPPORT; 325 mlx4_err(dev, "VLAN is enforced on this port\n");
304 goto out; 326 err = -EPROTONOSUPPORT;
305 } 327 goto out;
328 }
306 329
307 if (field & (1 << 6)) { 330 if (field & QUERY_FUNC_CAP_ETH_PROPS_FORCE_MAC) {
308 mlx4_err(dev, "Force mac is enabled on this port\n"); 331 mlx4_err(dev, "Force mac is enabled on this port\n");
309 err = -EPROTONOSUPPORT; 332 err = -EPROTONOSUPPORT;
310 goto out; 333 goto out;
334 }
335 } else if (dev->caps.port_type[i] == MLX4_PORT_TYPE_IB) {
336 MLX4_GET(field, outbox, QUERY_FUNC_CAP_RDMA_PROPS_OFFSET);
337 if (field & QUERY_FUNC_CAP_RDMA_PROPS_FORCE_PHY_WQE_GID) {
338 mlx4_err(dev, "phy_wqe_gid is "
339 "enforced on this ib port\n");
340 err = -EPROTONOSUPPORT;
341 goto out;
342 }
311 } 343 }
312 344
313 MLX4_GET(field, outbox, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); 345 MLX4_GET(field, outbox, QUERY_FUNC_CAP_PHYS_PORT_OFFSET);
@@ -707,14 +739,12 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
707{ 739{
708 u64 def_mac; 740 u64 def_mac;
709 u8 port_type; 741 u8 port_type;
742 u16 short_field;
710 int err; 743 int err;
711 744
712#define MLX4_PORT_SUPPORT_IB (1 << 0) 745#define MLX4_VF_PORT_NO_LINK_SENSE_MASK 0xE0
713#define MLX4_PORT_SUGGEST_TYPE (1 << 3) 746#define QUERY_PORT_CUR_MAX_PKEY_OFFSET 0x0c
714#define MLX4_PORT_DEFAULT_SENSE (1 << 4) 747#define QUERY_PORT_CUR_MAX_GID_OFFSET 0x0e
715#define MLX4_VF_PORT_ETH_ONLY_MASK (0xff & ~MLX4_PORT_SUPPORT_IB & \
716 ~MLX4_PORT_SUGGEST_TYPE & \
717 ~MLX4_PORT_DEFAULT_SENSE)
718 748
719 err = mlx4_cmd_box(dev, 0, outbox->dma, vhcr->in_modifier, 0, 749 err = mlx4_cmd_box(dev, 0, outbox->dma, vhcr->in_modifier, 0,
720 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 750 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
@@ -730,20 +760,58 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
730 MLX4_GET(port_type, outbox->buf, 760 MLX4_GET(port_type, outbox->buf,
731 QUERY_PORT_SUPPORTED_TYPE_OFFSET); 761 QUERY_PORT_SUPPORTED_TYPE_OFFSET);
732 762
733 /* Allow only Eth port, no link sensing allowed */ 763 /* No link sensing allowed */
734 port_type &= MLX4_VF_PORT_ETH_ONLY_MASK; 764 port_type &= MLX4_VF_PORT_NO_LINK_SENSE_MASK;
735 765 /* set port type to currently operating port type */
736 /* check eth is enabled for this port */ 766 port_type |= (dev->caps.port_type[vhcr->in_modifier] & 0x3);
737 if (!(port_type & 2))
738 mlx4_dbg(dev, "QUERY PORT: eth not supported by host");
739 767
740 MLX4_PUT(outbox->buf, port_type, 768 MLX4_PUT(outbox->buf, port_type,
741 QUERY_PORT_SUPPORTED_TYPE_OFFSET); 769 QUERY_PORT_SUPPORTED_TYPE_OFFSET);
770
771 short_field = 1; /* slave max gids */
772 MLX4_PUT(outbox->buf, short_field,
773 QUERY_PORT_CUR_MAX_GID_OFFSET);
774
775 short_field = dev->caps.pkey_table_len[vhcr->in_modifier];
776 MLX4_PUT(outbox->buf, short_field,
777 QUERY_PORT_CUR_MAX_PKEY_OFFSET);
742 } 778 }
743 779
744 return err; 780 return err;
745} 781}
746 782
783int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port,
784 int *gid_tbl_len, int *pkey_tbl_len)
785{
786 struct mlx4_cmd_mailbox *mailbox;
787 u32 *outbox;
788 u16 field;
789 int err;
790
791 mailbox = mlx4_alloc_cmd_mailbox(dev);
792 if (IS_ERR(mailbox))
793 return PTR_ERR(mailbox);
794
795 err = mlx4_cmd_box(dev, 0, mailbox->dma, port, 0,
796 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
797 MLX4_CMD_WRAPPED);
798 if (err)
799 goto out;
800
801 outbox = mailbox->buf;
802
803 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_GID_OFFSET);
804 *gid_tbl_len = field;
805
806 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_PKEY_OFFSET);
807 *pkey_tbl_len = field;
808
809out:
810 mlx4_free_cmd_mailbox(dev, mailbox);
811 return err;
812}
813EXPORT_SYMBOL(mlx4_get_slave_pkey_gid_tbl_len);
814
747int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt) 815int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt)
748{ 816{
749 struct mlx4_cmd_mailbox *mailbox; 817 struct mlx4_cmd_mailbox *mailbox;
@@ -890,11 +958,12 @@ int mlx4_QUERY_FW(struct mlx4_dev *dev)
890 ((fw_ver & 0xffff0000ull) >> 16) | 958 ((fw_ver & 0xffff0000ull) >> 16) |
891 ((fw_ver & 0x0000ffffull) << 16); 959 ((fw_ver & 0x0000ffffull) << 16);
892 960
961 MLX4_GET(lg, outbox, QUERY_FW_PPF_ID);
962 dev->caps.function = lg;
963
893 if (mlx4_is_slave(dev)) 964 if (mlx4_is_slave(dev))
894 goto out; 965 goto out;
895 966
896 MLX4_GET(lg, outbox, QUERY_FW_PPF_ID);
897 dev->caps.function = lg;
898 967
899 MLX4_GET(cmd_if_rev, outbox, QUERY_FW_CMD_IF_REV_OFFSET); 968 MLX4_GET(cmd_if_rev, outbox, QUERY_FW_CMD_IF_REV_OFFSET);
900 if (cmd_if_rev < MLX4_COMMAND_INTERFACE_MIN_REV || 969 if (cmd_if_rev < MLX4_COMMAND_INTERFACE_MIN_REV ||
@@ -975,9 +1044,12 @@ int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave,
975 if (err) 1044 if (err)
976 return err; 1045 return err;
977 1046
978 /* for slaves, zero out everything except FW version */ 1047 /* for slaves, set pci PPF ID to invalid and zero out everything
1048 * else except FW version */
979 outbuf[0] = outbuf[1] = 0; 1049 outbuf[0] = outbuf[1] = 0;
980 memset(&outbuf[8], 0, QUERY_FW_OUT_SIZE - 8); 1050 memset(&outbuf[8], 0, QUERY_FW_OUT_SIZE - 8);
1051 outbuf[QUERY_FW_PPF_ID] = MLX4_INVALID_SLAVE_ID;
1052
981 return 0; 1053 return 0;
982} 1054}
983 1055
diff --git a/drivers/net/ethernet/mellanox/mlx4/icm.c b/drivers/net/ethernet/mellanox/mlx4/icm.c
index a9ade1c3cad5..88b7b3e75ab1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/icm.c
+++ b/drivers/net/ethernet/mellanox/mlx4/icm.c
@@ -413,6 +413,8 @@ err:
413 mlx4_free_icm(dev, table->icm[i], use_coherent); 413 mlx4_free_icm(dev, table->icm[i], use_coherent);
414 } 414 }
415 415
416 kfree(table->icm);
417
416 return -ENOMEM; 418 return -ENOMEM;
417} 419}
418 420
diff --git a/drivers/net/ethernet/mellanox/mlx4/icm.h b/drivers/net/ethernet/mellanox/mlx4/icm.h
index b10c07a1dc1a..19e4efc0b342 100644
--- a/drivers/net/ethernet/mellanox/mlx4/icm.h
+++ b/drivers/net/ethernet/mellanox/mlx4/icm.h
@@ -81,13 +81,7 @@ int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
81 u64 virt, int obj_size, int nobj, int reserved, 81 u64 virt, int obj_size, int nobj, int reserved,
82 int use_lowmem, int use_coherent); 82 int use_lowmem, int use_coherent);
83void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table); 83void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table);
84int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
85void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
86void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle); 84void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle);
87int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
88 int start, int end);
89void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
90 int start, int end);
91 85
92static inline void mlx4_icm_first(struct mlx4_icm *icm, 86static inline void mlx4_icm_first(struct mlx4_icm *icm,
93 struct mlx4_icm_iter *iter) 87 struct mlx4_icm_iter *iter)
diff --git a/drivers/net/ethernet/mellanox/mlx4/intf.c b/drivers/net/ethernet/mellanox/mlx4/intf.c
index b4e9f6f5cc04..116895ac8b35 100644
--- a/drivers/net/ethernet/mellanox/mlx4/intf.c
+++ b/drivers/net/ethernet/mellanox/mlx4/intf.c
@@ -115,7 +115,8 @@ void mlx4_unregister_interface(struct mlx4_interface *intf)
115} 115}
116EXPORT_SYMBOL_GPL(mlx4_unregister_interface); 116EXPORT_SYMBOL_GPL(mlx4_unregister_interface);
117 117
118void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port) 118void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type,
119 unsigned long param)
119{ 120{
120 struct mlx4_priv *priv = mlx4_priv(dev); 121 struct mlx4_priv *priv = mlx4_priv(dev);
121 struct mlx4_device_context *dev_ctx; 122 struct mlx4_device_context *dev_ctx;
@@ -125,7 +126,7 @@ void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int por
125 126
126 list_for_each_entry(dev_ctx, &priv->ctx_list, list) 127 list_for_each_entry(dev_ctx, &priv->ctx_list, list)
127 if (dev_ctx->intf->event) 128 if (dev_ctx->intf->event)
128 dev_ctx->intf->event(dev, dev_ctx->context, type, port); 129 dev_ctx->intf->event(dev, dev_ctx->context, type, param);
129 130
130 spin_unlock_irqrestore(&priv->ctx_lock, flags); 131 spin_unlock_irqrestore(&priv->ctx_lock, flags);
131} 132}
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 42645166bae2..e8f8ebb4ae65 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -218,6 +218,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
218 for (i = 1; i <= dev->caps.num_ports; ++i) { 218 for (i = 1; i <= dev->caps.num_ports; ++i) {
219 dev->caps.vl_cap[i] = dev_cap->max_vl[i]; 219 dev->caps.vl_cap[i] = dev_cap->max_vl[i];
220 dev->caps.ib_mtu_cap[i] = dev_cap->ib_mtu[i]; 220 dev->caps.ib_mtu_cap[i] = dev_cap->ib_mtu[i];
221 dev->phys_caps.gid_phys_table_len[i] = dev_cap->max_gids[i];
222 dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i];
223 /* set gid and pkey table operating lengths by default
224 * to non-sriov values */
221 dev->caps.gid_table_len[i] = dev_cap->max_gids[i]; 225 dev->caps.gid_table_len[i] = dev_cap->max_gids[i];
222 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i]; 226 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
223 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i]; 227 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
@@ -312,29 +316,19 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
312 /* if only ETH is supported - assign ETH */ 316 /* if only ETH is supported - assign ETH */
313 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) 317 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
314 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; 318 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
315 /* if only IB is supported, 319 /* if only IB is supported, assign IB */
316 * assign IB only if SRIOV is off*/
317 else if (dev->caps.supported_type[i] == 320 else if (dev->caps.supported_type[i] ==
318 MLX4_PORT_TYPE_IB) { 321 MLX4_PORT_TYPE_IB)
319 if (dev->flags & MLX4_FLAG_SRIOV) 322 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
320 dev->caps.port_type[i] =
321 MLX4_PORT_TYPE_NONE;
322 else
323 dev->caps.port_type[i] =
324 MLX4_PORT_TYPE_IB;
325 /* if IB and ETH are supported,
326 * first of all check if SRIOV is on */
327 } else if (dev->flags & MLX4_FLAG_SRIOV)
328 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
329 else { 323 else {
330 /* In non-SRIOV mode, we set the port type 324 /* if IB and ETH are supported, we set the port
331 * according to user selection of port type, 325 * type according to user selection of port type;
332 * if usere selected none, take the FW hint */ 326 * if user selected none, take the FW hint */
333 if (port_type_array[i-1] == MLX4_PORT_TYPE_NONE) 327 if (port_type_array[i - 1] == MLX4_PORT_TYPE_NONE)
334 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? 328 dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
335 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB; 329 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
336 else 330 else
337 dev->caps.port_type[i] = port_type_array[i-1]; 331 dev->caps.port_type[i] = port_type_array[i - 1];
338 } 332 }
339 } 333 }
340 /* 334 /*
@@ -415,6 +409,23 @@ static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
415 return ret; 409 return ret;
416} 410}
417 411
412int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
413{
414 u32 qk = MLX4_RESERVED_QKEY_BASE;
415 if (qpn >= dev->caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX ||
416 qpn < dev->caps.sqp_start)
417 return -EINVAL;
418
419 if (qpn >= dev->caps.base_tunnel_sqpn)
420 /* tunnel qp */
421 qk += qpn - dev->caps.base_tunnel_sqpn;
422 else
423 qk += qpn - dev->caps.sqp_start;
424 *qkey = qk;
425 return 0;
426}
427EXPORT_SYMBOL(mlx4_get_parav_qkey);
428
418int mlx4_is_slave_active(struct mlx4_dev *dev, int slave) 429int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
419{ 430{
420 struct mlx4_priv *priv = mlx4_priv(dev); 431 struct mlx4_priv *priv = mlx4_priv(dev);
@@ -515,8 +526,13 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
515 return -ENODEV; 526 return -ENODEV;
516 } 527 }
517 528
518 for (i = 1; i <= dev->caps.num_ports; ++i) 529 for (i = 1; i <= dev->caps.num_ports; ++i) {
519 dev->caps.port_mask[i] = dev->caps.port_type[i]; 530 dev->caps.port_mask[i] = dev->caps.port_type[i];
531 if (mlx4_get_slave_pkey_gid_tbl_len(dev, i,
532 &dev->caps.gid_table_len[i],
533 &dev->caps.pkey_table_len[i]))
534 return -ENODEV;
535 }
520 536
521 if (dev->caps.uar_page_size * (dev->caps.num_uars - 537 if (dev->caps.uar_page_size * (dev->caps.num_uars -
522 dev->caps.reserved_uars) > 538 dev->caps.reserved_uars) >
@@ -553,7 +569,7 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
553 for (port = 1; port <= dev->caps.num_ports; port++) { 569 for (port = 1; port <= dev->caps.num_ports; port++) {
554 mlx4_CLOSE_PORT(dev, port); 570 mlx4_CLOSE_PORT(dev, port);
555 dev->caps.port_type[port] = port_types[port - 1]; 571 dev->caps.port_type[port] = port_types[port - 1];
556 err = mlx4_SET_PORT(dev, port); 572 err = mlx4_SET_PORT(dev, port, -1);
557 if (err) { 573 if (err) {
558 mlx4_err(dev, "Failed to set port %d, " 574 mlx4_err(dev, "Failed to set port %d, "
559 "aborting\n", port); 575 "aborting\n", port);
@@ -739,7 +755,7 @@ static ssize_t set_port_ib_mtu(struct device *dev,
739 mlx4_unregister_device(mdev); 755 mlx4_unregister_device(mdev);
740 for (port = 1; port <= mdev->caps.num_ports; port++) { 756 for (port = 1; port <= mdev->caps.num_ports; port++) {
741 mlx4_CLOSE_PORT(mdev, port); 757 mlx4_CLOSE_PORT(mdev, port);
742 err = mlx4_SET_PORT(mdev, port); 758 err = mlx4_SET_PORT(mdev, port, -1);
743 if (err) { 759 if (err) {
744 mlx4_err(mdev, "Failed to set port %d, " 760 mlx4_err(mdev, "Failed to set port %d, "
745 "aborting\n", port); 761 "aborting\n", port);
@@ -1192,6 +1208,17 @@ err:
1192 return -EIO; 1208 return -EIO;
1193} 1209}
1194 1210
1211static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
1212{
1213 int i;
1214
1215 for (i = 1; i <= dev->caps.num_ports; i++) {
1216 dev->caps.gid_table_len[i] = 1;
1217 dev->caps.pkey_table_len[i] =
1218 dev->phys_caps.pkey_phys_table_len[i] - 1;
1219 }
1220}
1221
1195static int mlx4_init_hca(struct mlx4_dev *dev) 1222static int mlx4_init_hca(struct mlx4_dev *dev)
1196{ 1223{
1197 struct mlx4_priv *priv = mlx4_priv(dev); 1224 struct mlx4_priv *priv = mlx4_priv(dev);
@@ -1231,6 +1258,9 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
1231 goto err_stop_fw; 1258 goto err_stop_fw;
1232 } 1259 }
1233 1260
1261 if (mlx4_is_master(dev))
1262 mlx4_parav_master_pf_caps(dev);
1263
1234 priv->fs_hash_mode = MLX4_FS_L2_HASH; 1264 priv->fs_hash_mode = MLX4_FS_L2_HASH;
1235 1265
1236 switch (priv->fs_hash_mode) { 1266 switch (priv->fs_hash_mode) {
@@ -1522,12 +1552,24 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
1522 "with caps = 0\n", port, err); 1552 "with caps = 0\n", port, err);
1523 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; 1553 dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1524 1554
1555 /* initialize per-slave default ib port capabilities */
1556 if (mlx4_is_master(dev)) {
1557 int i;
1558 for (i = 0; i < dev->num_slaves; i++) {
1559 if (i == mlx4_master_func_num(dev))
1560 continue;
1561 priv->mfunc.master.slave_state[i].ib_cap_mask[port] =
1562 ib_port_default_caps;
1563 }
1564 }
1565
1525 if (mlx4_is_mfunc(dev)) 1566 if (mlx4_is_mfunc(dev))
1526 dev->caps.port_ib_mtu[port] = IB_MTU_2048; 1567 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1527 else 1568 else
1528 dev->caps.port_ib_mtu[port] = IB_MTU_4096; 1569 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1529 1570
1530 err = mlx4_SET_PORT(dev, port); 1571 err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
1572 dev->caps.pkey_table_len[port] : -1);
1531 if (err) { 1573 if (err) {
1532 mlx4_err(dev, "Failed to set port %d, aborting\n", 1574 mlx4_err(dev, "Failed to set port %d, aborting\n",
1533 port); 1575 port);
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index d2c436b10fbf..59ebc0339638 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -351,66 +351,6 @@ struct mlx4_srq_context {
351 __be64 db_rec_addr; 351 __be64 db_rec_addr;
352}; 352};
353 353
354struct mlx4_eqe {
355 u8 reserved1;
356 u8 type;
357 u8 reserved2;
358 u8 subtype;
359 union {
360 u32 raw[6];
361 struct {
362 __be32 cqn;
363 } __packed comp;
364 struct {
365 u16 reserved1;
366 __be16 token;
367 u32 reserved2;
368 u8 reserved3[3];
369 u8 status;
370 __be64 out_param;
371 } __packed cmd;
372 struct {
373 __be32 qpn;
374 } __packed qp;
375 struct {
376 __be32 srqn;
377 } __packed srq;
378 struct {
379 __be32 cqn;
380 u32 reserved1;
381 u8 reserved2[3];
382 u8 syndrome;
383 } __packed cq_err;
384 struct {
385 u32 reserved1[2];
386 __be32 port;
387 } __packed port_change;
388 struct {
389 #define COMM_CHANNEL_BIT_ARRAY_SIZE 4
390 u32 reserved;
391 u32 bit_vec[COMM_CHANNEL_BIT_ARRAY_SIZE];
392 } __packed comm_channel_arm;
393 struct {
394 u8 port;
395 u8 reserved[3];
396 __be64 mac;
397 } __packed mac_update;
398 struct {
399 u8 port;
400 } __packed sw_event;
401 struct {
402 __be32 slave_id;
403 } __packed flr_event;
404 struct {
405 __be16 current_temperature;
406 __be16 warning_threshold;
407 } __packed warming;
408 } event;
409 u8 slave_id;
410 u8 reserved3[2];
411 u8 owner;
412} __packed;
413
414struct mlx4_eq { 354struct mlx4_eq {
415 struct mlx4_dev *dev; 355 struct mlx4_dev *dev;
416 void __iomem *doorbell; 356 void __iomem *doorbell;
@@ -902,7 +842,8 @@ void mlx4_catas_init(void);
902int mlx4_restart_one(struct pci_dev *pdev); 842int mlx4_restart_one(struct pci_dev *pdev);
903int mlx4_register_device(struct mlx4_dev *dev); 843int mlx4_register_device(struct mlx4_dev *dev);
904void mlx4_unregister_device(struct mlx4_dev *dev); 844void mlx4_unregister_device(struct mlx4_dev *dev);
905void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port); 845void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type,
846 unsigned long param);
906 847
907struct mlx4_dev_cap; 848struct mlx4_dev_cap;
908struct mlx4_init_hca_param; 849struct mlx4_init_hca_param;
@@ -1043,7 +984,7 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
1043void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table); 984void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
1044void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); 985void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
1045 986
1046int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port); 987int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz);
1047/* resource tracker functions*/ 988/* resource tracker functions*/
1048int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, 989int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev,
1049 enum mlx4_resource resource_type, 990 enum mlx4_resource resource_type,
@@ -1086,6 +1027,8 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
1086 struct mlx4_cmd_info *cmd); 1027 struct mlx4_cmd_info *cmd);
1087int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); 1028int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
1088 1029
1030int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port,
1031 int *gid_tbl_len, int *pkey_tbl_len);
1089 1032
1090int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 1033int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
1091 struct mlx4_vhcr *vhcr, 1034 struct mlx4_vhcr *vhcr,
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c
index 028833ffc56f..e36dd0f2fa73 100644
--- a/drivers/net/ethernet/mellanox/mlx4/port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/port.c
@@ -775,14 +775,15 @@ int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
775enum { 775enum {
776 MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ 776 MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */
777 MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ 777 MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */
778 MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20,
778 MLX4_CHANGE_PORT_VL_CAP = 21, 779 MLX4_CHANGE_PORT_VL_CAP = 21,
779 MLX4_CHANGE_PORT_MTU_CAP = 22, 780 MLX4_CHANGE_PORT_MTU_CAP = 22,
780}; 781};
781 782
782int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port) 783int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
783{ 784{
784 struct mlx4_cmd_mailbox *mailbox; 785 struct mlx4_cmd_mailbox *mailbox;
785 int err, vl_cap; 786 int err, vl_cap, pkey_tbl_flag = 0;
786 787
787 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) 788 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
788 return 0; 789 return 0;
@@ -795,11 +796,17 @@ int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port)
795 796
796 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; 797 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
797 798
799 if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
800 pkey_tbl_flag = 1;
801 ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz);
802 }
803
798 /* IB VL CAP enum isn't used by the firmware, just numerical values */ 804 /* IB VL CAP enum isn't used by the firmware, just numerical values */
799 for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { 805 for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) {
800 ((__be32 *) mailbox->buf)[0] = cpu_to_be32( 806 ((__be32 *) mailbox->buf)[0] = cpu_to_be32(
801 (1 << MLX4_CHANGE_PORT_MTU_CAP) | 807 (1 << MLX4_CHANGE_PORT_MTU_CAP) |
802 (1 << MLX4_CHANGE_PORT_VL_CAP) | 808 (1 << MLX4_CHANGE_PORT_VL_CAP) |
809 (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) |
803 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | 810 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
804 (vl_cap << MLX4_SET_PORT_VL_CAP)); 811 (vl_cap << MLX4_SET_PORT_VL_CAP));
805 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT, 812 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,