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authorEugenia Emantayev <eugenia@mellanox.co.il>2011-12-12 23:16:21 -0500
committerDavid S. Miller <davem@davemloft.net>2011-12-13 13:56:07 -0500
commitffe455ad04681f3fc48eef595fe526a795f809a3 (patch)
treeba21abb4371d780357dd1a91810dd171ce3b05b2 /drivers/net/ethernet/mellanox/mlx4/en_port.c
parent0ec2c0f86d31ab36547307f133b0016006bdc6b5 (diff)
mlx4: Ethernet port management modifications
The physical port is now common to the PF and VFs. The port resources and configuration is managed by the PF, VFs can only influence the MTU of the port, it is set as max among all functions, Each function allocates RX buffers of required size to meet it's MTU enforcement. Port management code was moved to mlx4_core, as the mlx4_en module is virtualization unaware Move handling qp functionality to mlx4_get_eth_qp/mlx4_put_eth_qp including reserve/release range and add/release unicast steering. Let mlx4_register/unregister_mac deal only with MAC (un)registration. Signed-off-by: Eugenia Emantayev <eugenia@mellanox.co.il> Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/en_port.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_port.c77
1 files changed, 0 insertions, 77 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_port.c b/drivers/net/ethernet/mellanox/mlx4/en_port.c
index ae120effb8a5..331791467a22 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_port.c
@@ -41,14 +41,6 @@
41#include "mlx4_en.h" 41#include "mlx4_en.h"
42 42
43 43
44int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
45 u64 mac, u64 clear, u8 mode)
46{
47 return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
48 MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B,
49 MLX4_CMD_WRAPPED);
50}
51
52int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv) 44int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
53{ 45{
54 struct mlx4_cmd_mailbox *mailbox; 46 struct mlx4_cmd_mailbox *mailbox;
@@ -78,75 +70,6 @@ int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
78 return err; 70 return err;
79} 71}
80 72
81
82int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
83 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
84{
85 struct mlx4_cmd_mailbox *mailbox;
86 struct mlx4_set_port_general_context *context;
87 int err;
88 u32 in_mod;
89
90 mailbox = mlx4_alloc_cmd_mailbox(dev);
91 if (IS_ERR(mailbox))
92 return PTR_ERR(mailbox);
93 context = mailbox->buf;
94 memset(context, 0, sizeof *context);
95
96 context->flags = SET_PORT_GEN_ALL_VALID;
97 context->mtu = cpu_to_be16(mtu);
98 context->pptx = (pptx * (!pfctx)) << 7;
99 context->pfctx = pfctx;
100 context->pprx = (pprx * (!pfcrx)) << 7;
101 context->pfcrx = pfcrx;
102
103 in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
104 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
105 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
106
107 mlx4_free_cmd_mailbox(dev, mailbox);
108 return err;
109}
110
111int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
112 u8 promisc)
113{
114 struct mlx4_cmd_mailbox *mailbox;
115 struct mlx4_set_port_rqp_calc_context *context;
116 int err;
117 u32 in_mod;
118 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
119 MCAST_DIRECT : MCAST_DEFAULT;
120
121 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER &&
122 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)
123 return 0;
124
125 mailbox = mlx4_alloc_cmd_mailbox(dev);
126 if (IS_ERR(mailbox))
127 return PTR_ERR(mailbox);
128 context = mailbox->buf;
129 memset(context, 0, sizeof *context);
130
131 context->base_qpn = cpu_to_be32(base_qpn);
132 context->n_mac = dev->caps.log_num_macs;
133 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
134 base_qpn);
135 context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT |
136 base_qpn);
137 context->intra_no_vlan = 0;
138 context->no_vlan = MLX4_NO_VLAN_IDX;
139 context->intra_vlan_miss = 0;
140 context->vlan_miss = MLX4_VLAN_MISS_IDX;
141
142 in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
143 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
144 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
145
146 mlx4_free_cmd_mailbox(dev, mailbox);
147 return err;
148}
149
150int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port) 73int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
151{ 74{
152 struct mlx4_en_query_port_context *qport_context; 75 struct mlx4_en_query_port_context *qport_context;