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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-07-29 09:21:27 -0400
committerDavid S. Miller <davem@davemloft.net>2013-07-30 19:51:08 -0400
commit6083ed448b812e7b318820d7ec83c2a0e250dd57 (patch)
tree3c28e5f1546398b1da3a6b2a2fc9e99e3d261fb5 /drivers/net/ethernet/marvell
parentffd756b3174e496cf6f3c5458c434e31d2cd48b0 (diff)
net: mvneta: move the RX and TX desc macros outside of the structs
The macros used for the various fields of the RX and TX descriptions are currently declared next to those fields within the structure definitions of the RX and TX descriptors. However, in order to support big endian, we'll have to use the "swap descriptors" features of the hardware, which swaps every byte within each 64 bits word of the descriptors. This requires a separate definition of the RX and TX descriptor structures for little and big endian, as is done in the mv643xx_eth. Those macros can therefore no longer be defined inside those structures. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell')
-rw-r--r--drivers/net/ethernet/marvell/mvneta.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 712779fb12b7..649162e68987 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -262,8 +262,7 @@ struct mvneta_port {
262 * layout of the transmit and reception DMA descriptors, and their 262 * layout of the transmit and reception DMA descriptors, and their
263 * layout is therefore defined by the hardware design 263 * layout is therefore defined by the hardware design
264 */ 264 */
265struct mvneta_tx_desc { 265
266 u32 command; /* Options used by HW for packet transmitting.*/
267#define MVNETA_TX_L3_OFF_SHIFT 0 266#define MVNETA_TX_L3_OFF_SHIFT 0
268#define MVNETA_TX_IP_HLEN_SHIFT 8 267#define MVNETA_TX_IP_HLEN_SHIFT 8
269#define MVNETA_TX_L4_UDP BIT(16) 268#define MVNETA_TX_L4_UDP BIT(16)
@@ -278,15 +277,6 @@ struct mvneta_tx_desc {
278#define MVNETA_TX_L4_CSUM_FULL BIT(30) 277#define MVNETA_TX_L4_CSUM_FULL BIT(30)
279#define MVNETA_TX_L4_CSUM_NOT BIT(31) 278#define MVNETA_TX_L4_CSUM_NOT BIT(31)
280 279
281 u16 reserverd1; /* csum_l4 (for future use) */
282 u16 data_size; /* Data size of transmitted packet in bytes */
283 u32 buf_phys_addr; /* Physical addr of transmitted buffer */
284 u32 reserved2; /* hw_cmd - (for future use, PMT) */
285 u32 reserved3[4]; /* Reserved - (for future use) */
286};
287
288struct mvneta_rx_desc {
289 u32 status; /* Info about received packet */
290#define MVNETA_RXD_ERR_CRC 0x0 280#define MVNETA_RXD_ERR_CRC 0x0
291#define MVNETA_RXD_ERR_SUMMARY BIT(16) 281#define MVNETA_RXD_ERR_SUMMARY BIT(16)
292#define MVNETA_RXD_ERR_OVERRUN BIT(17) 282#define MVNETA_RXD_ERR_OVERRUN BIT(17)
@@ -297,13 +287,27 @@ struct mvneta_rx_desc {
297#define MVNETA_RXD_FIRST_LAST_DESC (BIT(26) | BIT(27)) 287#define MVNETA_RXD_FIRST_LAST_DESC (BIT(26) | BIT(27))
298#define MVNETA_RXD_L4_CSUM_OK BIT(30) 288#define MVNETA_RXD_L4_CSUM_OK BIT(30)
299 289
290struct mvneta_tx_desc {
291 u32 command; /* Options used by HW for packet transmitting.*/
292 u16 reserverd1; /* csum_l4 (for future use) */
293 u16 data_size; /* Data size of transmitted packet in bytes */
294 u32 buf_phys_addr; /* Physical addr of transmitted buffer */
295 u32 reserved2; /* hw_cmd - (for future use, PMT) */
296 u32 reserved3[4]; /* Reserved - (for future use) */
297};
298
299struct mvneta_rx_desc {
300 u32 status; /* Info about received packet */
300 u16 reserved1; /* pnc_info - (for future use, PnC) */ 301 u16 reserved1; /* pnc_info - (for future use, PnC) */
301 u16 data_size; /* Size of received packet in bytes */ 302 u16 data_size; /* Size of received packet in bytes */
303
302 u32 buf_phys_addr; /* Physical address of the buffer */ 304 u32 buf_phys_addr; /* Physical address of the buffer */
303 u32 reserved2; /* pnc_flow_id (for future use, PnC) */ 305 u32 reserved2; /* pnc_flow_id (for future use, PnC) */
306
304 u32 buf_cookie; /* cookie for access to RX buffer in rx path */ 307 u32 buf_cookie; /* cookie for access to RX buffer in rx path */
305 u16 reserved3; /* prefetch_cmd, for future use */ 308 u16 reserved3; /* prefetch_cmd, for future use */
306 u16 reserved4; /* csum_l4 - (for future use, PnC) */ 309 u16 reserved4; /* csum_l4 - (for future use, PnC) */
310
307 u32 reserved5; /* pnc_extra PnC (for future use, PnC) */ 311 u32 reserved5; /* pnc_extra PnC (for future use, PnC) */
308 u32 reserved6; /* hw_cmd (for future use, PnC and HWF) */ 312 u32 reserved6; /* hw_cmd (for future use, PnC and HWF) */
309}; 313};