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authorDavid S. Miller <davem@davemloft.net>2011-12-02 13:49:21 -0500
committerDavid S. Miller <davem@davemloft.net>2011-12-02 13:49:21 -0500
commitb3613118eb30a589d971e4eccbbb2a1314f5dfd4 (patch)
tree868c1ee59e1b5c19a4f2e43716400d0001a994e5 /drivers/net/ethernet/jme.c
parent7505afe28c16a8d386624930a018d0052c75d687 (diff)
parent5983fe2b29df5885880d7fa3b91aca306c7564ef (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'drivers/net/ethernet/jme.c')
-rw-r--r--drivers/net/ethernet/jme.c113
1 files changed, 110 insertions, 3 deletions
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c
index 5c0b531949e2..27d651a80f3f 100644
--- a/drivers/net/ethernet/jme.c
+++ b/drivers/net/ethernet/jme.c
@@ -1745,6 +1745,112 @@ jme_phy_off(struct jme_adapter *jme)
1745} 1745}
1746 1746
1747static int 1747static int
1748jme_phy_specreg_read(struct jme_adapter *jme, u32 specreg)
1749{
1750 u32 phy_addr;
1751
1752 phy_addr = JM_PHY_SPEC_REG_READ | specreg;
1753 jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1754 phy_addr);
1755 return jme_mdio_read(jme->dev, jme->mii_if.phy_id,
1756 JM_PHY_SPEC_DATA_REG);
1757}
1758
1759static void
1760jme_phy_specreg_write(struct jme_adapter *jme, u32 ext_reg, u32 phy_data)
1761{
1762 u32 phy_addr;
1763
1764 phy_addr = JM_PHY_SPEC_REG_WRITE | ext_reg;
1765 jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_DATA_REG,
1766 phy_data);
1767 jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1768 phy_addr);
1769}
1770
1771static int
1772jme_phy_calibration(struct jme_adapter *jme)
1773{
1774 u32 ctrl1000, phy_data;
1775
1776 jme_phy_off(jme);
1777 jme_phy_on(jme);
1778 /* Enabel PHY test mode 1 */
1779 ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1780 ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1781 ctrl1000 |= PHY_GAD_TEST_MODE_1;
1782 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1783
1784 phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1785 phy_data &= ~JM_PHY_EXT_COMM_2_CALI_MODE_0;
1786 phy_data |= JM_PHY_EXT_COMM_2_CALI_LATCH |
1787 JM_PHY_EXT_COMM_2_CALI_ENABLE;
1788 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1789 msleep(20);
1790 phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1791 phy_data &= ~(JM_PHY_EXT_COMM_2_CALI_ENABLE |
1792 JM_PHY_EXT_COMM_2_CALI_MODE_0 |
1793 JM_PHY_EXT_COMM_2_CALI_LATCH);
1794 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1795
1796 /* Disable PHY test mode */
1797 ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1798 ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1799 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1800 return 0;
1801}
1802
1803static int
1804jme_phy_setEA(struct jme_adapter *jme)
1805{
1806 u32 phy_comm0 = 0, phy_comm1 = 0;
1807 u8 nic_ctrl;
1808
1809 pci_read_config_byte(jme->pdev, PCI_PRIV_SHARE_NICCTRL, &nic_ctrl);
1810 if ((nic_ctrl & 0x3) == JME_FLAG_PHYEA_ENABLE)
1811 return 0;
1812
1813 switch (jme->pdev->device) {
1814 case PCI_DEVICE_ID_JMICRON_JMC250:
1815 if (((jme->chip_main_rev == 5) &&
1816 ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1817 (jme->chip_sub_rev == 3))) ||
1818 (jme->chip_main_rev >= 6)) {
1819 phy_comm0 = 0x008A;
1820 phy_comm1 = 0x4109;
1821 }
1822 if ((jme->chip_main_rev == 3) &&
1823 ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1824 phy_comm0 = 0xE088;
1825 break;
1826 case PCI_DEVICE_ID_JMICRON_JMC260:
1827 if (((jme->chip_main_rev == 5) &&
1828 ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1829 (jme->chip_sub_rev == 3))) ||
1830 (jme->chip_main_rev >= 6)) {
1831 phy_comm0 = 0x008A;
1832 phy_comm1 = 0x4109;
1833 }
1834 if ((jme->chip_main_rev == 3) &&
1835 ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1836 phy_comm0 = 0xE088;
1837 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 0))
1838 phy_comm0 = 0x608A;
1839 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 2))
1840 phy_comm0 = 0x408A;
1841 break;
1842 default:
1843 return -ENODEV;
1844 }
1845 if (phy_comm0)
1846 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_0_REG, phy_comm0);
1847 if (phy_comm1)
1848 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_1_REG, phy_comm1);
1849
1850 return 0;
1851}
1852
1853static int
1748jme_open(struct net_device *netdev) 1854jme_open(struct net_device *netdev)
1749{ 1855{
1750 struct jme_adapter *jme = netdev_priv(netdev); 1856 struct jme_adapter *jme = netdev_priv(netdev);
@@ -1769,7 +1875,8 @@ jme_open(struct net_device *netdev)
1769 jme_set_settings(netdev, &jme->old_ecmd); 1875 jme_set_settings(netdev, &jme->old_ecmd);
1770 else 1876 else
1771 jme_reset_phy_processor(jme); 1877 jme_reset_phy_processor(jme);
1772 1878 jme_phy_calibration(jme);
1879 jme_phy_setEA(jme);
1773 jme_reset_link(jme); 1880 jme_reset_link(jme);
1774 1881
1775 return 0; 1882 return 0;
@@ -3184,7 +3291,8 @@ jme_resume(struct device *dev)
3184 jme_set_settings(netdev, &jme->old_ecmd); 3291 jme_set_settings(netdev, &jme->old_ecmd);
3185 else 3292 else
3186 jme_reset_phy_processor(jme); 3293 jme_reset_phy_processor(jme);
3187 3294 jme_phy_calibration(jme);
3295 jme_phy_setEA(jme);
3188 jme_start_irq(jme); 3296 jme_start_irq(jme);
3189 netif_device_attach(netdev); 3297 netif_device_attach(netdev);
3190 3298
@@ -3239,4 +3347,3 @@ MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3239MODULE_LICENSE("GPL"); 3347MODULE_LICENSE("GPL");
3240MODULE_VERSION(DRV_VERSION); 3348MODULE_VERSION(DRV_VERSION);
3241MODULE_DEVICE_TABLE(pci, jme_pci_tbl); 3349MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3242