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authorAkeem G. Abodunrin <akeem.g.abodunrin@intel.com>2013-01-29 05:15:10 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-02-15 04:40:45 -0500
commita6053d76bd893a8bd7ecb8681d85b35cd4b45936 (patch)
tree4e2d3e1209282b2a272817c60c0ff225121436c7 /drivers/net/ethernet/intel
parenta1bf1f44c6ee3ddf803063692a2f1d5ed483efdc (diff)
igb: Refractoring function pointers in igb_get_invariants function
This patch simplifies igb_get_invariants function by moving all implemented function pointers in this function to individual separate functions, based on their functionalities, this would make debugging much easier. Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_82575.c262
1 files changed, 11 insertions, 251 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
index 8604013a21b5..84e7e0909def 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -395,13 +395,9 @@ static s32 igb_init_mac_params_82575(struct e1000_hw *hw)
395 395
396static s32 igb_get_invariants_82575(struct e1000_hw *hw) 396static s32 igb_get_invariants_82575(struct e1000_hw *hw)
397{ 397{
398 struct e1000_phy_info *phy = &hw->phy;
399 struct e1000_nvm_info *nvm = &hw->nvm;
400 struct e1000_mac_info *mac = &hw->mac; 398 struct e1000_mac_info *mac = &hw->mac;
401 struct e1000_dev_spec_82575 * dev_spec = &hw->dev_spec._82575; 399 struct e1000_dev_spec_82575 * dev_spec = &hw->dev_spec._82575;
402 u32 eecd;
403 s32 ret_val; 400 s32 ret_val;
404 u16 size;
405 u32 ctrl_ext = 0; 401 u32 ctrl_ext = 0;
406 402
407 switch (hw->device_id) { 403 switch (hw->device_id) {
@@ -462,7 +458,7 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
462 * SerDes mode on the 82575. There can be an external PHY attached 458 * SerDes mode on the 82575. There can be an external PHY attached
463 * on the SGMII interface. For this, we'll set sgmii_active to true. 459 * on the SGMII interface. For this, we'll set sgmii_active to true.
464 */ 460 */
465 phy->media_type = e1000_media_type_copper; 461 hw->phy.media_type = e1000_media_type_copper;
466 dev_spec->sgmii_active = false; 462 dev_spec->sgmii_active = false;
467 463
468 ctrl_ext = rd32(E1000_CTRL_EXT); 464 ctrl_ext = rd32(E1000_CTRL_EXT);
@@ -478,154 +474,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
478 break; 474 break;
479 } 475 }
480 476
481 /* Set mta register count */ 477 /* mac initialization and operations */
482 mac->mta_reg_count = 128; 478 ret_val = igb_init_mac_params_82575(hw);
483 /* Set rar entry count */ 479 if (ret_val)
484 switch (mac->type) { 480 goto out;
485 case e1000_82576:
486 mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
487 break;
488 case e1000_82580:
489 mac->rar_entry_count = E1000_RAR_ENTRIES_82580;
490 break;
491 case e1000_i350:
492 mac->rar_entry_count = E1000_RAR_ENTRIES_I350;
493 break;
494 default:
495 mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
496 break;
497 }
498 /* reset */
499 if (mac->type >= e1000_82580)
500 mac->ops.reset_hw = igb_reset_hw_82580;
501 else
502 mac->ops.reset_hw = igb_reset_hw_82575;
503
504 if (mac->type >= e1000_i210) {
505 mac->ops.acquire_swfw_sync = igb_acquire_swfw_sync_i210;
506 mac->ops.release_swfw_sync = igb_release_swfw_sync_i210;
507 } else {
508 mac->ops.acquire_swfw_sync = igb_acquire_swfw_sync_82575;
509 mac->ops.release_swfw_sync = igb_release_swfw_sync_82575;
510 }
511
512 /* Set if part includes ASF firmware */
513 mac->asf_firmware_present = true;
514 /* Set if manageability features are enabled. */
515 mac->arc_subsystem_valid =
516 (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK)
517 ? true : false;
518 /* enable EEE on i350 parts and later parts */
519 if (mac->type >= e1000_i350)
520 dev_spec->eee_disable = false;
521 else
522 dev_spec->eee_disable = true;
523 /* physical interface link setup */
524 mac->ops.setup_physical_interface =
525 (hw->phy.media_type == e1000_media_type_copper)
526 ? igb_setup_copper_link_82575
527 : igb_setup_serdes_link_82575;
528 481
529 /* NVM initialization */ 482 /* NVM initialization */
530 eecd = rd32(E1000_EECD); 483 ret_val = igb_init_nvm_params_82575(hw);
531 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> 484 if (ret_val)
532 E1000_EECD_SIZE_EX_SHIFT); 485 goto out;
533
534 /*
535 * Added to a constant, "size" becomes the left-shift value
536 * for setting word_size.
537 */
538 size += NVM_WORD_SIZE_BASE_SHIFT;
539
540 /*
541 * Check for invalid size
542 */
543 if ((hw->mac.type == e1000_82576) && (size > 15)) {
544 pr_notice("The NVM size is not valid, defaulting to 32K\n");
545 size = 15;
546 }
547
548 nvm->word_size = 1 << size;
549 if (hw->mac.type < e1000_i210) {
550 nvm->opcode_bits = 8;
551 nvm->delay_usec = 1;
552 switch (nvm->override) {
553 case e1000_nvm_override_spi_large:
554 nvm->page_size = 32;
555 nvm->address_bits = 16;
556 break;
557 case e1000_nvm_override_spi_small:
558 nvm->page_size = 8;
559 nvm->address_bits = 8;
560 break;
561 default:
562 nvm->page_size = eecd
563 & E1000_EECD_ADDR_BITS ? 32 : 8;
564 nvm->address_bits = eecd
565 & E1000_EECD_ADDR_BITS ? 16 : 8;
566 break;
567 }
568 if (nvm->word_size == (1 << 15))
569 nvm->page_size = 128;
570
571 nvm->type = e1000_nvm_eeprom_spi;
572 } else
573 nvm->type = e1000_nvm_flash_hw;
574
575 /* NVM Function Pointers */
576 switch (hw->mac.type) {
577 case e1000_82580:
578 nvm->ops.validate = igb_validate_nvm_checksum_82580;
579 nvm->ops.update = igb_update_nvm_checksum_82580;
580 nvm->ops.acquire = igb_acquire_nvm_82575;
581 nvm->ops.release = igb_release_nvm_82575;
582 if (nvm->word_size < (1 << 15))
583 nvm->ops.read = igb_read_nvm_eerd;
584 else
585 nvm->ops.read = igb_read_nvm_spi;
586 nvm->ops.write = igb_write_nvm_spi;
587 break;
588 case e1000_i350:
589 nvm->ops.validate = igb_validate_nvm_checksum_i350;
590 nvm->ops.update = igb_update_nvm_checksum_i350;
591 nvm->ops.acquire = igb_acquire_nvm_82575;
592 nvm->ops.release = igb_release_nvm_82575;
593 if (nvm->word_size < (1 << 15))
594 nvm->ops.read = igb_read_nvm_eerd;
595 else
596 nvm->ops.read = igb_read_nvm_spi;
597 nvm->ops.write = igb_write_nvm_spi;
598 break;
599 case e1000_i210:
600 nvm->ops.validate = igb_validate_nvm_checksum_i210;
601 nvm->ops.update = igb_update_nvm_checksum_i210;
602 nvm->ops.acquire = igb_acquire_nvm_i210;
603 nvm->ops.release = igb_release_nvm_i210;
604 nvm->ops.read = igb_read_nvm_srrd_i210;
605 nvm->ops.write = igb_write_nvm_srwr_i210;
606 nvm->ops.valid_led_default = igb_valid_led_default_i210;
607 break;
608 case e1000_i211:
609 nvm->ops.acquire = igb_acquire_nvm_i210;
610 nvm->ops.release = igb_release_nvm_i210;
611 nvm->ops.read = igb_read_nvm_i211;
612 nvm->ops.valid_led_default = igb_valid_led_default_i210;
613 nvm->ops.validate = NULL;
614 nvm->ops.update = NULL;
615 nvm->ops.write = NULL;
616 break;
617 default:
618 nvm->ops.validate = igb_validate_nvm_checksum;
619 nvm->ops.update = igb_update_nvm_checksum;
620 nvm->ops.acquire = igb_acquire_nvm_82575;
621 nvm->ops.release = igb_release_nvm_82575;
622 if (nvm->word_size < (1 << 15))
623 nvm->ops.read = igb_read_nvm_eerd;
624 else
625 nvm->ops.read = igb_read_nvm_spi;
626 nvm->ops.write = igb_write_nvm_spi;
627 break;
628 }
629 486
630 /* if part supports SR-IOV then initialize mailbox parameters */ 487 /* if part supports SR-IOV then initialize mailbox parameters */
631 switch (mac->type) { 488 switch (mac->type) {
@@ -638,107 +495,10 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
638 } 495 }
639 496
640 /* setup PHY parameters */ 497 /* setup PHY parameters */
641 if (phy->media_type != e1000_media_type_copper) { 498 ret_val = igb_init_phy_params_82575(hw);
642 phy->type = e1000_phy_none;
643 return 0;
644 }
645
646 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
647 phy->reset_delay_us = 100;
648
649 ctrl_ext = rd32(E1000_CTRL_EXT);
650
651 /* PHY function pointers */
652 if (igb_sgmii_active_82575(hw)) {
653 phy->ops.reset = igb_phy_hw_reset_sgmii_82575;
654 ctrl_ext |= E1000_CTRL_I2C_ENA;
655 } else {
656 phy->ops.reset = igb_phy_hw_reset;
657 ctrl_ext &= ~E1000_CTRL_I2C_ENA;
658 }
659
660 wr32(E1000_CTRL_EXT, ctrl_ext);
661 igb_reset_mdicnfg_82580(hw);
662
663 if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) {
664 phy->ops.read_reg = igb_read_phy_reg_sgmii_82575;
665 phy->ops.write_reg = igb_write_phy_reg_sgmii_82575;
666 } else if ((hw->mac.type == e1000_82580)
667 || (hw->mac.type == e1000_i350)) {
668 phy->ops.read_reg = igb_read_phy_reg_82580;
669 phy->ops.write_reg = igb_write_phy_reg_82580;
670 } else if (hw->phy.type >= e1000_phy_i210) {
671 phy->ops.read_reg = igb_read_phy_reg_gs40g;
672 phy->ops.write_reg = igb_write_phy_reg_gs40g;
673 } else {
674 phy->ops.read_reg = igb_read_phy_reg_igp;
675 phy->ops.write_reg = igb_write_phy_reg_igp;
676 }
677
678 /* set lan id */
679 hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >>
680 E1000_STATUS_FUNC_SHIFT;
681 499
682 /* Set phy->phy_addr and phy->id. */ 500out:
683 ret_val = igb_get_phy_id_82575(hw); 501 return ret_val;
684 if (ret_val)
685 return ret_val;
686
687 /* Verify phy id and set remaining function pointers */
688 switch (phy->id) {
689 case I347AT4_E_PHY_ID:
690 case M88E1112_E_PHY_ID:
691 case M88E1111_I_PHY_ID:
692 phy->type = e1000_phy_m88;
693 phy->ops.get_phy_info = igb_get_phy_info_m88;
694
695 if (phy->id == I347AT4_E_PHY_ID ||
696 phy->id == M88E1112_E_PHY_ID)
697 phy->ops.get_cable_length = igb_get_cable_length_m88_gen2;
698 else
699 phy->ops.get_cable_length = igb_get_cable_length_m88;
700
701 if (phy->id == I210_I_PHY_ID) {
702 phy->ops.get_cable_length =
703 igb_get_cable_length_m88_gen2;
704 phy->ops.set_d0_lplu_state =
705 igb_set_d0_lplu_state_82580;
706 phy->ops.set_d3_lplu_state =
707 igb_set_d3_lplu_state_82580;
708 }
709 phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
710 break;
711 case IGP03E1000_E_PHY_ID:
712 phy->type = e1000_phy_igp_3;
713 phy->ops.get_phy_info = igb_get_phy_info_igp;
714 phy->ops.get_cable_length = igb_get_cable_length_igp_2;
715 phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_igp;
716 phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82575;
717 phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state;
718 break;
719 case I82580_I_PHY_ID:
720 case I350_I_PHY_ID:
721 phy->type = e1000_phy_82580;
722 phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;
723 phy->ops.get_cable_length = igb_get_cable_length_82580;
724 phy->ops.get_phy_info = igb_get_phy_info_82580;
725 phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580;
726 phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
727 break;
728 case I210_I_PHY_ID:
729 phy->type = e1000_phy_i210;
730 phy->ops.get_phy_info = igb_get_phy_info_m88;
731 phy->ops.check_polarity = igb_check_polarity_m88;
732 phy->ops.get_cable_length = igb_get_cable_length_m88_gen2;
733 phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580;
734 phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
735 phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
736 break;
737 default:
738 return -E1000_ERR_PHY;
739 }
740
741 return 0;
742} 502}
743 503
744/** 504/**
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 16:37:37 -0500