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authorBruce Allan <bruce.w.allan@intel.com>2013-02-19 23:05:45 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-03-08 03:23:56 -0500
commit362e20caee2ca2184c887484fca8182289f7e0a2 (patch)
treef7d21114e2aa52387825e6c21b18fafb4c1cbe10 /drivers/net/ethernet/intel
parentf0ff439872e1eab81940d736a5683e93b44865e3 (diff)
e1000e: cleanup SPACING checkpatch errors and warnings
ERROR:SPACING: spaces prohibited around that ':' (ctx:WxV) ERROR:SPACING: need consistent spacing around '-' (ctx:WxV) ERROR:SPACING: space required after that ',' (ctx:VxV) ERROR:SPACING: spaces required around that '=' (ctx:VxV) WARNING:SPACING: missing space after enum definition and some similar spacing issues not reported by checkpatch. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/e1000e/82571.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/ethtool.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/hw.h2
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c48
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c12
-rw-r--r--drivers/net/ethernet/intel/e1000e/phy.c2
6 files changed, 34 insertions, 34 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c
index e63ddc6d77f4..2a4ae28e6587 100644
--- a/drivers/net/ethernet/intel/e1000e/82571.c
+++ b/drivers/net/ethernet/intel/e1000e/82571.c
@@ -847,7 +847,7 @@ static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
847 847
848 for (i = 0; i < words; i++) { 848 for (i = 0; i < words; i++) {
849 eewr = ((data[i] << E1000_NVM_RW_REG_DATA) | 849 eewr = ((data[i] << E1000_NVM_RW_REG_DATA) |
850 ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) | 850 ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
851 E1000_NVM_RW_REG_START); 851 E1000_NVM_RW_REG_START);
852 852
853 ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE); 853 ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
index fa375dd4da12..bbd4b1b3319d 100644
--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
+++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
@@ -39,7 +39,7 @@
39 39
40#include "e1000.h" 40#include "e1000.h"
41 41
42enum {NETDEV_STATS, E1000_STATS}; 42enum { NETDEV_STATS, E1000_STATS };
43 43
44struct e1000_stats { 44struct e1000_stats {
45 char stat_string[ETH_GSTRING_LEN]; 45 char stat_string[ETH_GSTRING_LEN];
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index 649bfb67bc05..84850f7a23e4 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -167,7 +167,7 @@ enum e1000_1000t_rx_status {
167 e1000_1000t_rx_status_undefined = 0xFF 167 e1000_1000t_rx_status_undefined = 0xFF
168}; 168};
169 169
170enum e1000_rev_polarity{ 170enum e1000_rev_polarity {
171 e1000_rev_polarity_normal = 0, 171 e1000_rev_polarity_normal = 0,
172 e1000_rev_polarity_reversed, 172 e1000_rev_polarity_reversed,
173 e1000_rev_polarity_undefined = 0xFF 173 e1000_rev_polarity_undefined = 0xFF
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 37b2003bcc9c..705e74f8c1d1 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -61,15 +61,15 @@
61/* Offset 04h HSFSTS */ 61/* Offset 04h HSFSTS */
62union ich8_hws_flash_status { 62union ich8_hws_flash_status {
63 struct ich8_hsfsts { 63 struct ich8_hsfsts {
64 u16 flcdone :1; /* bit 0 Flash Cycle Done */ 64 u16 flcdone:1; /* bit 0 Flash Cycle Done */
65 u16 flcerr :1; /* bit 1 Flash Cycle Error */ 65 u16 flcerr:1; /* bit 1 Flash Cycle Error */
66 u16 dael :1; /* bit 2 Direct Access error Log */ 66 u16 dael:1; /* bit 2 Direct Access error Log */
67 u16 berasesz :2; /* bit 4:3 Sector Erase Size */ 67 u16 berasesz:2; /* bit 4:3 Sector Erase Size */
68 u16 flcinprog :1; /* bit 5 flash cycle in Progress */ 68 u16 flcinprog:1; /* bit 5 flash cycle in Progress */
69 u16 reserved1 :2; /* bit 13:6 Reserved */ 69 u16 reserved1:2; /* bit 13:6 Reserved */
70 u16 reserved2 :6; /* bit 13:6 Reserved */ 70 u16 reserved2:6; /* bit 13:6 Reserved */
71 u16 fldesvalid :1; /* bit 14 Flash Descriptor Valid */ 71 u16 fldesvalid:1; /* bit 14 Flash Descriptor Valid */
72 u16 flockdn :1; /* bit 15 Flash Config Lock-Down */ 72 u16 flockdn:1; /* bit 15 Flash Config Lock-Down */
73 } hsf_status; 73 } hsf_status;
74 u16 regval; 74 u16 regval;
75}; 75};
@@ -78,11 +78,11 @@ union ich8_hws_flash_status {
78/* Offset 06h FLCTL */ 78/* Offset 06h FLCTL */
79union ich8_hws_flash_ctrl { 79union ich8_hws_flash_ctrl {
80 struct ich8_hsflctl { 80 struct ich8_hsflctl {
81 u16 flcgo :1; /* 0 Flash Cycle Go */ 81 u16 flcgo:1; /* 0 Flash Cycle Go */
82 u16 flcycle :2; /* 2:1 Flash Cycle */ 82 u16 flcycle:2; /* 2:1 Flash Cycle */
83 u16 reserved :5; /* 7:3 Reserved */ 83 u16 reserved:5; /* 7:3 Reserved */
84 u16 fldbcount :2; /* 9:8 Flash Data Byte Count */ 84 u16 fldbcount:2; /* 9:8 Flash Data Byte Count */
85 u16 flockdn :6; /* 15:10 Reserved */ 85 u16 flockdn:6; /* 15:10 Reserved */
86 } hsf_ctrl; 86 } hsf_ctrl;
87 u16 regval; 87 u16 regval;
88}; 88};
@@ -90,10 +90,10 @@ union ich8_hws_flash_ctrl {
90/* ICH Flash Region Access Permissions */ 90/* ICH Flash Region Access Permissions */
91union ich8_hws_flash_regacc { 91union ich8_hws_flash_regacc {
92 struct ich8_flracc { 92 struct ich8_flracc {
93 u32 grra :8; /* 0:7 GbE region Read Access */ 93 u32 grra:8; /* 0:7 GbE region Read Access */
94 u32 grwa :8; /* 8:15 GbE region Write Access */ 94 u32 grwa:8; /* 8:15 GbE region Write Access */
95 u32 gmrag :8; /* 23:16 GbE Master Read Access Grant */ 95 u32 gmrag:8; /* 23:16 GbE Master Read Access Grant */
96 u32 gmwag :8; /* 31:24 GbE Master Write Access Grant */ 96 u32 gmwag:8; /* 31:24 GbE Master Write Access Grant */
97 } hsf_flregacc; 97 } hsf_flregacc;
98 u16 regval; 98 u16 regval;
99}; 99};
@@ -1773,7 +1773,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
1773 * SHRAL/H) and initial CRC values to the MAC 1773 * SHRAL/H) and initial CRC values to the MAC
1774 */ 1774 */
1775 for (i = 0; i < (hw->mac.rar_entry_count + 4); i++) { 1775 for (i = 0; i < (hw->mac.rar_entry_count + 4); i++) {
1776 u8 mac_addr[ETH_ALEN] = {0}; 1776 u8 mac_addr[ETH_ALEN] = { 0 };
1777 u32 addr_high, addr_low; 1777 u32 addr_high, addr_low;
1778 1778
1779 addr_high = er32(RAH(i)); 1779 addr_high = er32(RAH(i));
@@ -2449,8 +2449,8 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
2449 2449
2450 ret_val = 0; 2450 ret_val = 0;
2451 for (i = 0; i < words; i++) { 2451 for (i = 0; i < words; i++) {
2452 if (dev_spec->shadow_ram[offset+i].modified) { 2452 if (dev_spec->shadow_ram[offset + i].modified) {
2453 data[i] = dev_spec->shadow_ram[offset+i].value; 2453 data[i] = dev_spec->shadow_ram[offset + i].value;
2454 } else { 2454 } else {
2455 ret_val = e1000_read_flash_word_ich8lan(hw, 2455 ret_val = e1000_read_flash_word_ich8lan(hw,
2456 act_offset + i, 2456 act_offset + i,
@@ -2713,8 +2713,8 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
2713 nvm->ops.acquire(hw); 2713 nvm->ops.acquire(hw);
2714 2714
2715 for (i = 0; i < words; i++) { 2715 for (i = 0; i < words; i++) {
2716 dev_spec->shadow_ram[offset+i].modified = true; 2716 dev_spec->shadow_ram[offset + i].modified = true;
2717 dev_spec->shadow_ram[offset+i].value = data[i]; 2717 dev_spec->shadow_ram[offset + i].value = data[i];
2718 } 2718 }
2719 2719
2720 nvm->ops.release(hw); 2720 nvm->ops.release(hw);
@@ -3001,7 +3001,7 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
3001 3001
3002 hsflctl.regval = er16flash(ICH_FLASH_HSFCTL); 3002 hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
3003 /* 0b/1b corresponds to 1 or 2 byte size, respectively. */ 3003 /* 0b/1b corresponds to 1 or 2 byte size, respectively. */
3004 hsflctl.hsf_ctrl.fldbcount = size -1; 3004 hsflctl.hsf_ctrl.fldbcount = size - 1;
3005 hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_WRITE; 3005 hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_WRITE;
3006 ew16flash(ICH_FLASH_HSFCTL, hsflctl.regval); 3006 ew16flash(ICH_FLASH_HSFCTL, hsflctl.regval);
3007 3007
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index e8192d3f7eb4..247f61f77e5d 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -1495,7 +1495,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1495 unsigned int i; 1495 unsigned int i;
1496 int cleaned_count = 0; 1496 int cleaned_count = 0;
1497 bool cleaned = false; 1497 bool cleaned = false;
1498 unsigned int total_rx_bytes=0, total_rx_packets=0; 1498 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1499 1499
1500 i = rx_ring->next_to_clean; 1500 i = rx_ring->next_to_clean;
1501 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1501 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
@@ -2489,7 +2489,7 @@ static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2489 switch (itr_setting) { 2489 switch (itr_setting) {
2490 case lowest_latency: 2490 case lowest_latency:
2491 /* handle TSO and jumbo frames */ 2491 /* handle TSO and jumbo frames */
2492 if (bytes/packets > 8000) 2492 if (bytes / packets > 8000)
2493 retval = bulk_latency; 2493 retval = bulk_latency;
2494 else if ((packets < 5) && (bytes > 512)) 2494 else if ((packets < 5) && (bytes > 512))
2495 retval = low_latency; 2495 retval = low_latency;
@@ -2497,13 +2497,13 @@ static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2497 case low_latency: /* 50 usec aka 20000 ints/s */ 2497 case low_latency: /* 50 usec aka 20000 ints/s */
2498 if (bytes > 10000) { 2498 if (bytes > 10000) {
2499 /* this if handles the TSO accounting */ 2499 /* this if handles the TSO accounting */
2500 if (bytes/packets > 8000) 2500 if (bytes / packets > 8000)
2501 retval = bulk_latency; 2501 retval = bulk_latency;
2502 else if ((packets < 10) || ((bytes/packets) > 1200)) 2502 else if ((packets < 10) || ((bytes / packets) > 1200))
2503 retval = bulk_latency; 2503 retval = bulk_latency;
2504 else if ((packets > 35)) 2504 else if ((packets > 35))
2505 retval = lowest_latency; 2505 retval = lowest_latency;
2506 } else if (bytes/packets > 2000) { 2506 } else if (bytes / packets > 2000) {
2507 retval = bulk_latency; 2507 retval = bulk_latency;
2508 } else if (packets <= 2 && bytes < 512) { 2508 } else if (packets <= 2 && bytes < 512) {
2509 retval = lowest_latency; 2509 retval = lowest_latency;
@@ -5346,7 +5346,7 @@ static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5346 return 0; 5346 return 0;
5347 5347
5348 { 5348 {
5349 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 5349 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5350 struct udphdr *udp; 5350 struct udphdr *udp;
5351 5351
5352 if (ip->protocol != IPPROTO_UDP) 5352 if (ip->protocol != IPPROTO_UDP)
diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
index c39a65e293fa..e46b65f11894 100644
--- a/drivers/net/ethernet/intel/e1000e/phy.c
+++ b/drivers/net/ethernet/intel/e1000e/phy.c
@@ -1756,7 +1756,7 @@ s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
1756 if (phy_status & BMSR_LSTATUS) 1756 if (phy_status & BMSR_LSTATUS)
1757 break; 1757 break;
1758 if (usec_interval >= 1000) 1758 if (usec_interval >= 1000)
1759 mdelay(usec_interval/1000); 1759 mdelay(usec_interval / 1000);
1760 else 1760 else
1761 udelay(usec_interval); 1761 udelay(usec_interval);
1762 } 1762 }