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authorEmil Tantilov <emil.s.tantilov@intel.com>2013-01-25 01:19:20 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-02-16 02:51:14 -0500
commit67da097e1295071da700862e7faa8a294b182b42 (patch)
treea8806aac14268ff4aaca79c2e1be483b2481eb55 /drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
parent71858acbe5c38e82554d92d041741ea949e46b99 (diff)
ixgbe: fix Tx timeouts with BQL
This patch makes sure that TXDCTL.WTHRESH is set to 1 when BQL is enabled and EITR is set to more than 100k interrupts per second to avoid Tx timeouts. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index b0b72fccb86b..68478d6dfa2d 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -2786,13 +2786,19 @@ void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2786 2786
2787 /* 2787 /*
2788 * set WTHRESH to encourage burst writeback, it should not be set 2788 * set WTHRESH to encourage burst writeback, it should not be set
2789 * higher than 1 when ITR is 0 as it could cause false TX hangs 2789 * higher than 1 when:
2790 * - ITR is 0 as it could cause false TX hangs
2791 * - ITR is set to > 100k int/sec and BQL is enabled
2790 * 2792 *
2791 * In order to avoid issues WTHRESH + PTHRESH should always be equal 2793 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2792 * to or less than the number of on chip descriptors, which is 2794 * to or less than the number of on chip descriptors, which is
2793 * currently 40. 2795 * currently 40.
2794 */ 2796 */
2797#if IS_ENABLED(CONFIG_BQL)
2798 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
2799#else
2795 if (!ring->q_vector || (ring->q_vector->itr < 8)) 2800 if (!ring->q_vector || (ring->q_vector->itr < 8))
2801#endif
2796 txdctl |= (1 << 16); /* WTHRESH = 1 */ 2802 txdctl |= (1 << 16); /* WTHRESH = 1 */
2797 else 2803 else
2798 txdctl |= (8 << 16); /* WTHRESH = 8 */ 2804 txdctl |= (8 << 16); /* WTHRESH = 8 */