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authorDon Skidmore <donald.c.skidmore@intel.com>2012-10-24 02:19:01 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-10-30 01:14:48 -0400
commitd7bbcd32adafee94e965d9ca188ddeede4c94597 (patch)
treefe88f22de09a1311f60796b1ab35e68a254dfc5a /drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
parenta932657f51eadb8280166e82dc7034dfbff3985a (diff)
ixgbe: Add support for pipeline reset
Calling the ixgbe_reset_pipeline_82599 function will ensure a full pipeline reset on all 82599 devices. This is necessary to avoid possible link issues. Since this patch accomplishes this by modifying AUTOC.LMS we need to wrap all AUTOC writes when LESM is enabled. v2- fix LMS behaviour based on feedback by Martin Josefsson CC: Martin Josefsson <gandalf@mjufs.se> Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_common.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c70
1 files changed, 67 insertions, 3 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index a2a9bcca4915..8f285edb5094 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -90,6 +90,7 @@ static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
90 s32 ret_val = 0; 90 s32 ret_val = 0;
91 u32 reg = 0, reg_bp = 0; 91 u32 reg = 0, reg_bp = 0;
92 u16 reg_cu = 0; 92 u16 reg_cu = 0;
93 bool got_lock = false;
93 94
94 /* 95 /*
95 * Validate the requested mode. Strict IEEE mode does not allow 96 * Validate the requested mode. Strict IEEE mode does not allow
@@ -210,8 +211,29 @@ static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
210 * 211 *
211 */ 212 */
212 if (hw->phy.media_type == ixgbe_media_type_backplane) { 213 if (hw->phy.media_type == ixgbe_media_type_backplane) {
213 reg_bp |= IXGBE_AUTOC_AN_RESTART; 214 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
215 * LESM is on, likewise reset_pipeline requries the lock as
216 * it also writes AUTOC.
217 */
218 if ((hw->mac.type == ixgbe_mac_82599EB) &&
219 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
220 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
221 IXGBE_GSSR_MAC_CSR_SM);
222 if (ret_val)
223 goto out;
224
225 got_lock = true;
226 }
227
214 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp); 228 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);
229
230 if (hw->mac.type == ixgbe_mac_82599EB)
231 ixgbe_reset_pipeline_82599(hw);
232
233 if (got_lock)
234 hw->mac.ops.release_swfw_sync(hw,
235 IXGBE_GSSR_MAC_CSR_SM);
236
215 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && 237 } else if ((hw->phy.media_type == ixgbe_media_type_copper) &&
216 (ixgbe_device_supports_autoneg_fc(hw) == 0)) { 238 (ixgbe_device_supports_autoneg_fc(hw) == 0)) {
217 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, 239 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,
@@ -2616,6 +2638,7 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
2616 bool link_up = false; 2638 bool link_up = false;
2617 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); 2639 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
2618 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2640 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2641 s32 ret_val = 0;
2619 2642
2620 /* 2643 /*
2621 * Link must be up to auto-blink the LEDs; 2644 * Link must be up to auto-blink the LEDs;
@@ -2624,10 +2647,28 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
2624 hw->mac.ops.check_link(hw, &speed, &link_up, false); 2647 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2625 2648
2626 if (!link_up) { 2649 if (!link_up) {
2650 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
2651 * LESM is on.
2652 */
2653 bool got_lock = false;
2654
2655 if ((hw->mac.type == ixgbe_mac_82599EB) &&
2656 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
2657 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
2658 IXGBE_GSSR_MAC_CSR_SM);
2659 if (ret_val)
2660 goto out;
2661
2662 got_lock = true;
2663 }
2627 autoc_reg |= IXGBE_AUTOC_AN_RESTART; 2664 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
2628 autoc_reg |= IXGBE_AUTOC_FLU; 2665 autoc_reg |= IXGBE_AUTOC_FLU;
2629 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); 2666 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
2630 IXGBE_WRITE_FLUSH(hw); 2667 IXGBE_WRITE_FLUSH(hw);
2668
2669 if (got_lock)
2670 hw->mac.ops.release_swfw_sync(hw,
2671 IXGBE_GSSR_MAC_CSR_SM);
2631 usleep_range(10000, 20000); 2672 usleep_range(10000, 20000);
2632 } 2673 }
2633 2674
@@ -2636,7 +2677,8 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
2636 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); 2677 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
2637 IXGBE_WRITE_FLUSH(hw); 2678 IXGBE_WRITE_FLUSH(hw);
2638 2679
2639 return 0; 2680out:
2681 return ret_val;
2640} 2682}
2641 2683
2642/** 2684/**
@@ -2648,18 +2690,40 @@ s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
2648{ 2690{
2649 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); 2691 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
2650 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2692 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2693 s32 ret_val = 0;
2694 bool got_lock = false;
2695
2696 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
2697 * LESM is on.
2698 */
2699 if ((hw->mac.type == ixgbe_mac_82599EB) &&
2700 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
2701 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
2702 IXGBE_GSSR_MAC_CSR_SM);
2703 if (ret_val)
2704 goto out;
2705
2706 got_lock = true;
2707 }
2651 2708
2652 autoc_reg &= ~IXGBE_AUTOC_FLU; 2709 autoc_reg &= ~IXGBE_AUTOC_FLU;
2653 autoc_reg |= IXGBE_AUTOC_AN_RESTART; 2710 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
2654 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); 2711 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
2655 2712
2713 if (hw->mac.type == ixgbe_mac_82599EB)
2714 ixgbe_reset_pipeline_82599(hw);
2715
2716 if (got_lock)
2717 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
2718
2656 led_reg &= ~IXGBE_LED_MODE_MASK(index); 2719 led_reg &= ~IXGBE_LED_MODE_MASK(index);
2657 led_reg &= ~IXGBE_LED_BLINK(index); 2720 led_reg &= ~IXGBE_LED_BLINK(index);
2658 led_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index); 2721 led_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
2659 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); 2722 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
2660 IXGBE_WRITE_FLUSH(hw); 2723 IXGBE_WRITE_FLUSH(hw);
2661 2724
2662 return 0; 2725out:
2726 return ret_val;
2663} 2727}
2664 2728
2665/** 2729/**