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authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-01-21 04:57:50 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-02-23 20:11:54 -0500
commit0340501b1cf7dc67bc53dcbe26d3c7d678157606 (patch)
tree3106bdf3de249daf9136a2e2d3f6c2c3cfc66e0b /drivers/net/ethernet/intel/igbvf/igbvf.h
parent79849ebc0e06d775f53d160bb1a63b000fa0947b (diff)
igbvf: Fix code comments and whitespace
Fix the code comments to align with the drivers/net/ commenting style. Also fix other checkpatch errors such as using tabs where possible and properly wrap lines to conform to the 80 char limit (unless it is a string). Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igbvf/igbvf.h')
-rw-r--r--drivers/net/ethernet/intel/igbvf/igbvf.h103
1 files changed, 48 insertions, 55 deletions
diff --git a/drivers/net/ethernet/intel/igbvf/igbvf.h b/drivers/net/ethernet/intel/igbvf/igbvf.h
index 7d6a25c8f889..f166baab8d7e 100644
--- a/drivers/net/ethernet/intel/igbvf/igbvf.h
+++ b/drivers/net/ethernet/intel/igbvf/igbvf.h
@@ -13,8 +13,7 @@
13 more details. 13 more details.
14 14
15 You should have received a copy of the GNU General Public License along with 15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc., 16 this program; if not, see <http://www.gnu.org/licenses/>.
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 17
19 The full GNU General Public License is included in this distribution in 18 The full GNU General Public License is included in this distribution in
20 the file called "COPYING". 19 the file called "COPYING".
@@ -43,10 +42,10 @@ struct igbvf_info;
43struct igbvf_adapter; 42struct igbvf_adapter;
44 43
45/* Interrupt defines */ 44/* Interrupt defines */
46#define IGBVF_START_ITR 488 /* ~8000 ints/sec */ 45#define IGBVF_START_ITR 488 /* ~8000 ints/sec */
47#define IGBVF_4K_ITR 980 46#define IGBVF_4K_ITR 980
48#define IGBVF_20K_ITR 196 47#define IGBVF_20K_ITR 196
49#define IGBVF_70K_ITR 56 48#define IGBVF_70K_ITR 56
50 49
51enum latency_range { 50enum latency_range {
52 lowest_latency = 0, 51 lowest_latency = 0,
@@ -55,56 +54,55 @@ enum latency_range {
55 latency_invalid = 255 54 latency_invalid = 255
56}; 55};
57 56
58
59/* Interrupt modes, as used by the IntMode parameter */ 57/* Interrupt modes, as used by the IntMode parameter */
60#define IGBVF_INT_MODE_LEGACY 0 58#define IGBVF_INT_MODE_LEGACY 0
61#define IGBVF_INT_MODE_MSI 1 59#define IGBVF_INT_MODE_MSI 1
62#define IGBVF_INT_MODE_MSIX 2 60#define IGBVF_INT_MODE_MSIX 2
63 61
64/* Tx/Rx descriptor defines */ 62/* Tx/Rx descriptor defines */
65#define IGBVF_DEFAULT_TXD 256 63#define IGBVF_DEFAULT_TXD 256
66#define IGBVF_MAX_TXD 4096 64#define IGBVF_MAX_TXD 4096
67#define IGBVF_MIN_TXD 80 65#define IGBVF_MIN_TXD 80
68 66
69#define IGBVF_DEFAULT_RXD 256 67#define IGBVF_DEFAULT_RXD 256
70#define IGBVF_MAX_RXD 4096 68#define IGBVF_MAX_RXD 4096
71#define IGBVF_MIN_RXD 80 69#define IGBVF_MIN_RXD 80
72 70
73#define IGBVF_MIN_ITR_USECS 10 /* 100000 irq/sec */ 71#define IGBVF_MIN_ITR_USECS 10 /* 100000 irq/sec */
74#define IGBVF_MAX_ITR_USECS 10000 /* 100 irq/sec */ 72#define IGBVF_MAX_ITR_USECS 10000 /* 100 irq/sec */
75 73
76/* RX descriptor control thresholds. 74/* RX descriptor control thresholds.
77 * PTHRESH - MAC will consider prefetch if it has fewer than this number of 75 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
78 * descriptors available in its onboard memory. 76 * descriptors available in its onboard memory.
79 * Setting this to 0 disables RX descriptor prefetch. 77 * Setting this to 0 disables RX descriptor prefetch.
80 * HTHRESH - MAC will only prefetch if there are at least this many descriptors 78 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
81 * available in host memory. 79 * available in host memory.
82 * If PTHRESH is 0, this should also be 0. 80 * If PTHRESH is 0, this should also be 0.
83 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back 81 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
84 * descriptors until either it has this many to write back, or the 82 * descriptors until either it has this many to write back, or the
85 * ITR timer expires. 83 * ITR timer expires.
86 */ 84 */
87#define IGBVF_RX_PTHRESH 16 85#define IGBVF_RX_PTHRESH 16
88#define IGBVF_RX_HTHRESH 8 86#define IGBVF_RX_HTHRESH 8
89#define IGBVF_RX_WTHRESH 1 87#define IGBVF_RX_WTHRESH 1
90 88
91/* this is the size past which hardware will drop packets when setting LPE=0 */ 89/* this is the size past which hardware will drop packets when setting LPE=0 */
92#define MAXIMUM_ETHERNET_VLAN_SIZE 1522 90#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
93 91
94#define IGBVF_FC_PAUSE_TIME 0x0680 /* 858 usec */ 92#define IGBVF_FC_PAUSE_TIME 0x0680 /* 858 usec */
95 93
96/* How many Tx Descriptors do we need to call netif_wake_queue ? */ 94/* How many Tx Descriptors do we need to call netif_wake_queue ? */
97#define IGBVF_TX_QUEUE_WAKE 32 95#define IGBVF_TX_QUEUE_WAKE 32
98/* How many Rx Buffers do we bundle into one write to the hardware ? */ 96/* How many Rx Buffers do we bundle into one write to the hardware ? */
99#define IGBVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 97#define IGBVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
100 98
101#define AUTO_ALL_MODES 0 99#define AUTO_ALL_MODES 0
102#define IGBVF_EEPROM_APME 0x0400 100#define IGBVF_EEPROM_APME 0x0400
103 101
104#define IGBVF_MNG_VLAN_NONE (-1) 102#define IGBVF_MNG_VLAN_NONE (-1)
105 103
106/* Number of packet split data buffers (not including the header buffer) */ 104/* Number of packet split data buffers (not including the header buffer) */
107#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) 105#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
108 106
109enum igbvf_boards { 107enum igbvf_boards {
110 board_vf, 108 board_vf,
@@ -116,8 +114,7 @@ struct igbvf_queue_stats {
116 u64 bytes; 114 u64 bytes;
117}; 115};
118 116
119/* 117/* wrappers around a pointer to a socket buffer,
120 * wrappers around a pointer to a socket buffer,
121 * so a DMA handle can be stored along with the buffer 118 * so a DMA handle can be stored along with the buffer
122 */ 119 */
123struct igbvf_buffer { 120struct igbvf_buffer {
@@ -148,10 +145,10 @@ union igbvf_desc {
148 145
149struct igbvf_ring { 146struct igbvf_ring {
150 struct igbvf_adapter *adapter; /* backlink */ 147 struct igbvf_adapter *adapter; /* backlink */
151 union igbvf_desc *desc; /* pointer to ring memory */ 148 union igbvf_desc *desc; /* pointer to ring memory */
152 dma_addr_t dma; /* phys address of ring */ 149 dma_addr_t dma; /* phys address of ring */
153 unsigned int size; /* length of ring in bytes */ 150 unsigned int size; /* length of ring in bytes */
154 unsigned int count; /* number of desc. in ring */ 151 unsigned int count; /* number of desc. in ring */
155 152
156 u16 next_to_use; 153 u16 next_to_use;
157 u16 next_to_clean; 154 u16 next_to_clean;
@@ -202,9 +199,7 @@ struct igbvf_adapter {
202 u32 requested_itr; /* ints/sec or adaptive */ 199 u32 requested_itr; /* ints/sec or adaptive */
203 u32 current_itr; /* Actual ITR register value, not ints/sec */ 200 u32 current_itr; /* Actual ITR register value, not ints/sec */
204 201
205 /* 202 /* Tx */
206 * Tx
207 */
208 struct igbvf_ring *tx_ring /* One per active queue */ 203 struct igbvf_ring *tx_ring /* One per active queue */
209 ____cacheline_aligned_in_smp; 204 ____cacheline_aligned_in_smp;
210 205
@@ -226,9 +221,7 @@ struct igbvf_adapter {
226 u32 tx_fifo_size; 221 u32 tx_fifo_size;
227 u32 tx_dma_failed; 222 u32 tx_dma_failed;
228 223
229 /* 224 /* Rx */
230 * Rx
231 */
232 struct igbvf_ring *rx_ring; 225 struct igbvf_ring *rx_ring;
233 226
234 u32 rx_int_delay; 227 u32 rx_int_delay;
@@ -249,7 +242,7 @@ struct igbvf_adapter {
249 struct net_device *netdev; 242 struct net_device *netdev;
250 struct pci_dev *pdev; 243 struct pci_dev *pdev;
251 struct net_device_stats net_stats; 244 struct net_device_stats net_stats;
252 spinlock_t stats_lock; /* prevent concurrent stats updates */ 245 spinlock_t stats_lock; /* prevent concurrent stats updates */
253 246
254 /* structs defined in e1000_hw.h */ 247 /* structs defined in e1000_hw.h */
255 struct e1000_hw hw; 248 struct e1000_hw hw;
@@ -286,16 +279,16 @@ struct igbvf_adapter {
286}; 279};
287 280
288struct igbvf_info { 281struct igbvf_info {
289 enum e1000_mac_type mac; 282 enum e1000_mac_type mac;
290 unsigned int flags; 283 unsigned int flags;
291 u32 pba; 284 u32 pba;
292 void (*init_ops)(struct e1000_hw *); 285 void (*init_ops)(struct e1000_hw *);
293 s32 (*get_variants)(struct igbvf_adapter *); 286 s32 (*get_variants)(struct igbvf_adapter *);
294}; 287};
295 288
296/* hardware capability, feature, and workaround flags */ 289/* hardware capability, feature, and workaround flags */
297#define IGBVF_FLAG_RX_CSUM_DISABLED (1 << 0) 290#define IGBVF_FLAG_RX_CSUM_DISABLED (1 << 0)
298#define IGBVF_FLAG_RX_LB_VLAN_BSWAP (1 << 1) 291#define IGBVF_FLAG_RX_LB_VLAN_BSWAP (1 << 1)
299#define IGBVF_RX_DESC_ADV(R, i) \ 292#define IGBVF_RX_DESC_ADV(R, i) \
300 (&((((R).desc))[i].rx_desc)) 293 (&((((R).desc))[i].rx_desc))
301#define IGBVF_TX_DESC_ADV(R, i) \ 294#define IGBVF_TX_DESC_ADV(R, i) \