e1000e: use generic IEEE MII definitions

For standard IEEE MII-compatible transceivers, the kernel has generic
register and bit definitions.  Use those instead of redundant local
defines.

Do not replace references of MII_CR_SPEED_10 with BMCR_SPEED10 (0x0000)
when it is not necessary (i.e. when it is bitwise OR'ed with another
value).

Some whitespace issues in the surrounding context of the above changes are
also cleaned up.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

1 files changed, 15 insertions, 16 deletions

diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
index 7365288f20f7..b78e02174601 100644
--- a/drivers/net/ethernet/intel/e1000e/mac.c
+++ b/drivers/net/ethernet/intel/e1000e/mac.c
@@ -1053,14 +1053,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
                  * has completed.  We read this twice because this reg has
                  * some "sticky" (latched) bits.
                  */
-                ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
+                ret_val = e1e_rphy(hw, MII_BMSR, &mii_status_reg);
                 if (ret_val)
                         return ret_val;
-                ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
+                ret_val = e1e_rphy(hw, MII_BMSR, &mii_status_reg);
                 if (ret_val)
                         return ret_val;
 
-                if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
+                if (!(mii_status_reg & BMSR_ANEGCOMPLETE)) {
                         e_dbg("Copper PHY and Auto Neg has not completed.\n");
                         return ret_val;
                 }
@@ -1071,11 +1071,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
                  * Page Ability Register (Address 5) to determine how
                  * flow control was negotiated.
                  */
-                ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_nway_adv_reg);
+                ret_val = e1e_rphy(hw, MII_ADVERTISE, &mii_nway_adv_reg);
                 if (ret_val)
                         return ret_val;
-                ret_val = e1e_rphy(hw, PHY_LP_ABILITY,
-                                   &mii_nway_lp_ability_reg);
+                ret_val = e1e_rphy(hw, MII_LPA, &mii_nway_lp_ability_reg);
                 if (ret_val)
                         return ret_val;
 
@@ -1112,8 +1111,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
                  *   1   |   DC    |   1   |   DC    | E1000_fc_full
                  *
                  */
-                if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
-                    (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
+                if ((mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
+                    (mii_nway_lp_ability_reg & LPA_PAUSE_CAP)) {
                         /* Now we need to check if the user selected Rx ONLY
                          * of pause frames.  In this case, we had to advertise
                          * FULL flow control because we could not advertise Rx
@@ -1135,10 +1134,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
                  *-------|---------|-------|---------|--------------------
                  *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
                  */
-                else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
-                         (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
-                         (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
-                         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+                else if (!(mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
+                         (mii_nway_adv_reg & ADVERTISE_PAUSE_ASYM) &&
+                         (mii_nway_lp_ability_reg & LPA_PAUSE_CAP) &&
+                         (mii_nway_lp_ability_reg & LPA_PAUSE_ASYM)) {
                         hw->fc.current_mode = e1000_fc_tx_pause;
                         e_dbg("Flow Control = Tx PAUSE frames only.\n");
                 }
@@ -1149,10 +1148,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
                  *-------|---------|-------|---------|--------------------
                  *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
                  */
-                else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
-                         (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
-                         !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
-                         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+                else if ((mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
+                         (mii_nway_adv_reg & ADVERTISE_PAUSE_ASYM) &&
+                         !(mii_nway_lp_ability_reg & LPA_PAUSE_CAP) &&
+                         (mii_nway_lp_ability_reg & LPA_PAUSE_ASYM)) {
                         hw->fc.current_mode = e1000_fc_rx_pause;
                         e_dbg("Flow Control = Rx PAUSE frames only.\n");
                 } else {