diff options
author | Hariprasad Shenai <hariprasad@chelsio.com> | 2014-11-21 02:22:05 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-11-22 16:57:47 -0500 |
commit | b2e1a3f091cddd4e81a64d04a6641c2e860ea266 (patch) | |
tree | cf92c5174b665a036f03d16cdd9852918425425e /drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |
parent | 2b5fb1f25e7b22cb96fa8662f9c8f8cf34abc109 (diff) |
RDMA/cxgb4/cxgb4vf/csiostor: Cleanup macros/register defines related to PCIE, RSS and FW
This patch cleanups all PCIE, RSS & FW related macros/register defines that are
defined in t4fw_api.h and the affected files.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4_hw.c')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 20432e2bb17f..7975d26f50df 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -188,9 +188,9 @@ static void t4_report_fw_error(struct adapter *adap) | |||
188 | u32 pcie_fw; | 188 | u32 pcie_fw; |
189 | 189 | ||
190 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); | 190 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); |
191 | if (pcie_fw & FW_PCIE_FW_ERR) | 191 | if (pcie_fw & PCIE_FW_ERR) |
192 | dev_err(adap->pdev_dev, "Firmware reports adapter error: %s\n", | 192 | dev_err(adap->pdev_dev, "Firmware reports adapter error: %s\n", |
193 | reason[FW_PCIE_FW_EVAL_GET(pcie_fw)]); | 193 | reason[PCIE_FW_EVAL_G(pcie_fw)]); |
194 | } | 194 | } |
195 | 195 | ||
196 | /* | 196 | /* |
@@ -993,10 +993,10 @@ static int should_install_fs_fw(struct adapter *adap, int card_fw_usable, | |||
993 | install: | 993 | install: |
994 | dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, " | 994 | dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, " |
995 | "installing firmware %u.%u.%u.%u on card.\n", | 995 | "installing firmware %u.%u.%u.%u on card.\n", |
996 | FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c), | 996 | FW_HDR_FW_VER_MAJOR_G(c), FW_HDR_FW_VER_MINOR_G(c), |
997 | FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), reason, | 997 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), reason, |
998 | FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k), | 998 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), |
999 | FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k)); | 999 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); |
1000 | 1000 | ||
1001 | return 1; | 1001 | return 1; |
1002 | } | 1002 | } |
@@ -1068,12 +1068,12 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, | |||
1068 | "driver compiled with %d.%d.%d.%d, " | 1068 | "driver compiled with %d.%d.%d.%d, " |
1069 | "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n", | 1069 | "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n", |
1070 | state, | 1070 | state, |
1071 | FW_HDR_FW_VER_MAJOR_GET(d), FW_HDR_FW_VER_MINOR_GET(d), | 1071 | FW_HDR_FW_VER_MAJOR_G(d), FW_HDR_FW_VER_MINOR_G(d), |
1072 | FW_HDR_FW_VER_MICRO_GET(d), FW_HDR_FW_VER_BUILD_GET(d), | 1072 | FW_HDR_FW_VER_MICRO_G(d), FW_HDR_FW_VER_BUILD_G(d), |
1073 | FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c), | 1073 | FW_HDR_FW_VER_MAJOR_G(c), FW_HDR_FW_VER_MINOR_G(c), |
1074 | FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), | 1074 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), |
1075 | FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k), | 1075 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), |
1076 | FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k)); | 1076 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); |
1077 | ret = EINVAL; | 1077 | ret = EINVAL; |
1078 | goto bye; | 1078 | goto bye; |
1079 | } | 1079 | } |
@@ -1564,7 +1564,7 @@ static void cim_intr_handler(struct adapter *adapter) | |||
1564 | 1564 | ||
1565 | int fat; | 1565 | int fat; |
1566 | 1566 | ||
1567 | if (t4_read_reg(adapter, MA_PCIE_FW) & FW_PCIE_FW_ERR) | 1567 | if (t4_read_reg(adapter, MA_PCIE_FW) & PCIE_FW_ERR) |
1568 | t4_report_fw_error(adapter); | 1568 | t4_report_fw_error(adapter); |
1569 | 1569 | ||
1570 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, | 1570 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, |
@@ -2074,7 +2074,7 @@ int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, | |||
2074 | memset(&cmd, 0, sizeof(cmd)); | 2074 | memset(&cmd, 0, sizeof(cmd)); |
2075 | cmd.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | | 2075 | cmd.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
2076 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | | 2076 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
2077 | FW_RSS_IND_TBL_CMD_VIID(viid)); | 2077 | FW_RSS_IND_TBL_CMD_VIID_V(viid)); |
2078 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); | 2078 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); |
2079 | 2079 | ||
2080 | /* each fw_rss_ind_tbl_cmd takes up to 32 entries */ | 2080 | /* each fw_rss_ind_tbl_cmd takes up to 32 entries */ |
@@ -2091,13 +2091,13 @@ int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, | |||
2091 | while (nq > 0) { | 2091 | while (nq > 0) { |
2092 | unsigned int v; | 2092 | unsigned int v; |
2093 | 2093 | ||
2094 | v = FW_RSS_IND_TBL_CMD_IQ0(*rsp); | 2094 | v = FW_RSS_IND_TBL_CMD_IQ0_V(*rsp); |
2095 | if (++rsp >= rsp_end) | 2095 | if (++rsp >= rsp_end) |
2096 | rsp = rspq; | 2096 | rsp = rspq; |
2097 | v |= FW_RSS_IND_TBL_CMD_IQ1(*rsp); | 2097 | v |= FW_RSS_IND_TBL_CMD_IQ1_V(*rsp); |
2098 | if (++rsp >= rsp_end) | 2098 | if (++rsp >= rsp_end) |
2099 | rsp = rspq; | 2099 | rsp = rspq; |
2100 | v |= FW_RSS_IND_TBL_CMD_IQ2(*rsp); | 2100 | v |= FW_RSS_IND_TBL_CMD_IQ2_V(*rsp); |
2101 | if (++rsp >= rsp_end) | 2101 | if (++rsp >= rsp_end) |
2102 | rsp = rspq; | 2102 | rsp = rspq; |
2103 | 2103 | ||
@@ -2131,10 +2131,10 @@ int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, | |||
2131 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); | 2131 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
2132 | c.retval_len16 = htonl(FW_LEN16(c)); | 2132 | c.retval_len16 = htonl(FW_LEN16(c)); |
2133 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { | 2133 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { |
2134 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); | 2134 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE_V(mode)); |
2135 | } else if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) { | 2135 | } else if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) { |
2136 | c.u.basicvirtual.mode_pkd = | 2136 | c.u.basicvirtual.mode_pkd = |
2137 | htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); | 2137 | htonl(FW_RSS_GLB_CONFIG_CMD_MODE_V(mode)); |
2138 | c.u.basicvirtual.synmapen_to_hashtoeplitz = htonl(flags); | 2138 | c.u.basicvirtual.synmapen_to_hashtoeplitz = htonl(flags); |
2139 | } else | 2139 | } else |
2140 | return -EINVAL; | 2140 | return -EINVAL; |
@@ -2793,7 +2793,7 @@ retry: | |||
2793 | if (ret < 0) { | 2793 | if (ret < 0) { |
2794 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) | 2794 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) |
2795 | goto retry; | 2795 | goto retry; |
2796 | if (t4_read_reg(adap, MA_PCIE_FW) & FW_PCIE_FW_ERR) | 2796 | if (t4_read_reg(adap, MA_PCIE_FW) & PCIE_FW_ERR) |
2797 | t4_report_fw_error(adap); | 2797 | t4_report_fw_error(adap); |
2798 | return ret; | 2798 | return ret; |
2799 | } | 2799 | } |
@@ -2818,7 +2818,7 @@ retry: | |||
2818 | * and we wouldn't want to fail pointlessly. (This can happen when an | 2818 | * and we wouldn't want to fail pointlessly. (This can happen when an |
2819 | * OS loads lots of different drivers rapidly at the same time). In | 2819 | * OS loads lots of different drivers rapidly at the same time). In |
2820 | * this case, the Master PF returned by the firmware will be | 2820 | * this case, the Master PF returned by the firmware will be |
2821 | * FW_PCIE_FW_MASTER_MASK so the test below will work ... | 2821 | * PCIE_FW_MASTER_M so the test below will work ... |
2822 | */ | 2822 | */ |
2823 | if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 && | 2823 | if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 && |
2824 | master_mbox != mbox) { | 2824 | master_mbox != mbox) { |
@@ -2844,7 +2844,7 @@ retry: | |||
2844 | * our retries ... | 2844 | * our retries ... |
2845 | */ | 2845 | */ |
2846 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); | 2846 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); |
2847 | if (!(pcie_fw & (FW_PCIE_FW_ERR|FW_PCIE_FW_INIT))) { | 2847 | if (!(pcie_fw & (PCIE_FW_ERR|PCIE_FW_INIT))) { |
2848 | if (waiting <= 0) { | 2848 | if (waiting <= 0) { |
2849 | if (retries-- > 0) | 2849 | if (retries-- > 0) |
2850 | goto retry; | 2850 | goto retry; |
@@ -2859,9 +2859,9 @@ retry: | |||
2859 | * report errors preferentially. | 2859 | * report errors preferentially. |
2860 | */ | 2860 | */ |
2861 | if (state) { | 2861 | if (state) { |
2862 | if (pcie_fw & FW_PCIE_FW_ERR) | 2862 | if (pcie_fw & PCIE_FW_ERR) |
2863 | *state = DEV_STATE_ERR; | 2863 | *state = DEV_STATE_ERR; |
2864 | else if (pcie_fw & FW_PCIE_FW_INIT) | 2864 | else if (pcie_fw & PCIE_FW_INIT) |
2865 | *state = DEV_STATE_INIT; | 2865 | *state = DEV_STATE_INIT; |
2866 | } | 2866 | } |
2867 | 2867 | ||
@@ -2870,9 +2870,9 @@ retry: | |||
2870 | * there's not a valid Master PF, grab its identity | 2870 | * there's not a valid Master PF, grab its identity |
2871 | * for our caller. | 2871 | * for our caller. |
2872 | */ | 2872 | */ |
2873 | if (master_mbox == FW_PCIE_FW_MASTER_MASK && | 2873 | if (master_mbox == PCIE_FW_MASTER_M && |
2874 | (pcie_fw & FW_PCIE_FW_MASTER_VLD)) | 2874 | (pcie_fw & PCIE_FW_MASTER_VLD)) |
2875 | master_mbox = FW_PCIE_FW_MASTER_GET(pcie_fw); | 2875 | master_mbox = PCIE_FW_MASTER_G(pcie_fw); |
2876 | break; | 2876 | break; |
2877 | } | 2877 | } |
2878 | } | 2878 | } |
@@ -2940,7 +2940,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) | |||
2940 | * Issues a RESET command to firmware (if desired) with a HALT indication | 2940 | * Issues a RESET command to firmware (if desired) with a HALT indication |
2941 | * and then puts the microprocessor into RESET state. The RESET command | 2941 | * and then puts the microprocessor into RESET state. The RESET command |
2942 | * will only be issued if a legitimate mailbox is provided (mbox <= | 2942 | * will only be issued if a legitimate mailbox is provided (mbox <= |
2943 | * FW_PCIE_FW_MASTER_MASK). | 2943 | * PCIE_FW_MASTER_M). |
2944 | * | 2944 | * |
2945 | * This is generally used in order for the host to safely manipulate the | 2945 | * This is generally used in order for the host to safely manipulate the |
2946 | * adapter without fear of conflicting with whatever the firmware might | 2946 | * adapter without fear of conflicting with whatever the firmware might |
@@ -2955,7 +2955,7 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force) | |||
2955 | * If a legitimate mailbox is provided, issue a RESET command | 2955 | * If a legitimate mailbox is provided, issue a RESET command |
2956 | * with a HALT indication. | 2956 | * with a HALT indication. |
2957 | */ | 2957 | */ |
2958 | if (mbox <= FW_PCIE_FW_MASTER_MASK) { | 2958 | if (mbox <= PCIE_FW_MASTER_M) { |
2959 | struct fw_reset_cmd c; | 2959 | struct fw_reset_cmd c; |
2960 | 2960 | ||
2961 | memset(&c, 0, sizeof(c)); | 2961 | memset(&c, 0, sizeof(c)); |
@@ -2980,8 +2980,8 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force) | |||
2980 | */ | 2980 | */ |
2981 | if (ret == 0 || force) { | 2981 | if (ret == 0 || force) { |
2982 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, UPCRST); | 2982 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, UPCRST); |
2983 | t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT, | 2983 | t4_set_reg_field(adap, PCIE_FW, PCIE_FW_HALT_F, |
2984 | FW_PCIE_FW_HALT); | 2984 | PCIE_FW_HALT_F); |
2985 | } | 2985 | } |
2986 | 2986 | ||
2987 | /* | 2987 | /* |
@@ -3020,7 +3020,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3020 | * doing it automatically, we need to clear the PCIE_FW.HALT | 3020 | * doing it automatically, we need to clear the PCIE_FW.HALT |
3021 | * bit. | 3021 | * bit. |
3022 | */ | 3022 | */ |
3023 | t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT, 0); | 3023 | t4_set_reg_field(adap, PCIE_FW, PCIE_FW_HALT_F, 0); |
3024 | 3024 | ||
3025 | /* | 3025 | /* |
3026 | * If we've been given a valid mailbox, first try to get the | 3026 | * If we've been given a valid mailbox, first try to get the |
@@ -3029,7 +3029,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3029 | * valid mailbox or the RESET command failed, fall back to | 3029 | * valid mailbox or the RESET command failed, fall back to |
3030 | * hitting the chip with a hammer. | 3030 | * hitting the chip with a hammer. |
3031 | */ | 3031 | */ |
3032 | if (mbox <= FW_PCIE_FW_MASTER_MASK) { | 3032 | if (mbox <= PCIE_FW_MASTER_M) { |
3033 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); | 3033 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); |
3034 | msleep(100); | 3034 | msleep(100); |
3035 | if (t4_fw_reset(adap, mbox, | 3035 | if (t4_fw_reset(adap, mbox, |
@@ -3044,7 +3044,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3044 | 3044 | ||
3045 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); | 3045 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); |
3046 | for (ms = 0; ms < FW_CMD_MAX_TIMEOUT; ) { | 3046 | for (ms = 0; ms < FW_CMD_MAX_TIMEOUT; ) { |
3047 | if (!(t4_read_reg(adap, PCIE_FW) & FW_PCIE_FW_HALT)) | 3047 | if (!(t4_read_reg(adap, PCIE_FW) & PCIE_FW_HALT_F)) |
3048 | return 0; | 3048 | return 0; |
3049 | msleep(100); | 3049 | msleep(100); |
3050 | ms += 100; | 3050 | ms += 100; |