Merge branch 'for-linus' into for-next

Back-merge for cleaning up usb-audio code the recent commit modified,
and further UAC2 autoclock patches.

7 files changed, 111 insertions, 15 deletions

diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index 639049d7e92d..da5f4397f87c 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -301,12 +301,16 @@ static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
                         bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
                                   ring->start);
                 } else {
+                        /* Omit CRC. */
+                        len -= ETH_FCS_LEN;
+
                         new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
                         if (new_skb) {
                                 skb_put(new_skb, len);
                                 skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
                                                                  new_skb->data,
                                                                  len);
+                                skb_checksum_none_assert(skb);
                                 new_skb->protocol =
                                         eth_type_trans(new_skb, bgmac->net_dev);
                                 netif_receive_skb(new_skb);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index ecac04a3687c..4046f97378c2 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -2760,6 +2760,7 @@ load_error2:
         bp->port.pmf = 0;
 load_error1:
         bnx2x_napi_disable(bp);
+        bnx2x_del_all_napi(bp);
 
         /* clear pf_load status, as it was already set */
         if (IS_PF(bp))
@@ -3142,7 +3143,7 @@ static inline __le16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
                 tsum = ~csum_fold(csum_add((__force __wsum) csum,
                                   csum_partial(t_header, -fix, 0)));
 
-        return bswab16(csum);
+        return bswab16(tsum);
 }
 
 static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index 9a674b14b403..edfa67adf2f9 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -281,6 +281,8 @@ static int bnx2x_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
                         cmd->lp_advertising |= ADVERTISED_2500baseX_Full;
                 if (status & LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE)
                         cmd->lp_advertising |= ADVERTISED_10000baseT_Full;
+                if (status & LINK_STATUS_LINK_PARTNER_20GXFD_CAPABLE)
+                        cmd->lp_advertising |= ADVERTISED_20000baseKR2_Full;
         }
 
         cmd->maxtxpkt = 0;
@@ -463,6 +465,10 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
                                                 ADVERTISED_10000baseKR_Full))
                                 bp->link_params.speed_cap_mask[cfg_idx] |=
                                         PORT_HW_CFG_SPEED_CAPABILITY_D0_10G;
+
+                        if (cmd->advertising & ADVERTISED_20000baseKR2_Full)
+                                bp->link_params.speed_cap_mask[cfg_idx] |=
+                                        PORT_HW_CFG_SPEED_CAPABILITY_D0_20G;
                 }
         } else { /* forced speed */
                 /* advertise the requested speed and duplex if supported */
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index 1663e0b6b5a0..77ebae0ac64a 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -8647,7 +8647,9 @@ void bnx2x_handle_module_detect_int(struct link_params *params)
                                                 MDIO_WC_DEVAD,
                                                 MDIO_WC_REG_DIGITAL5_MISC6,
                                                 &rx_tx_in_reset);
-                                if (!rx_tx_in_reset) {
+                                if ((!rx_tx_in_reset) &&
+                                    (params->link_flags &
+                                     PHY_INITIALIZED)) {
                                         bnx2x_warpcore_reset_lane(bp, phy, 1);
                                         bnx2x_warpcore_config_sfi(phy, params);
                                         bnx2x_warpcore_reset_lane(bp, phy, 0);
@@ -10422,6 +10424,28 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
                                          MDIO_PMA_DEVAD,
                                          MDIO_PMA_REG_8481_LED1_MASK,
                                          0x0);
+                        if (phy->type ==
+                            PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84834) {
+                                /* Disable MI_INT interrupt before setting LED4
+                                 * source to constant off.
+                                 */
+                                if (REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 +
+                                           params->port*4) &
+                                    NIG_MASK_MI_INT) {
+                                        params->link_flags |=
+                                        LINK_FLAGS_INT_DISABLED;
+
+                                        bnx2x_bits_dis(
+                                                bp,
+                                                NIG_REG_MASK_INTERRUPT_PORT0 +
+                                                params->port*4,
+                                                NIG_MASK_MI_INT);
+                                }
+                                bnx2x_cl45_write(bp, phy,
+                                                 MDIO_PMA_DEVAD,
+                                                 MDIO_PMA_REG_8481_SIGNAL_MASK,
+                                                 0x0);
+                        }
                 }
                 break;
         case LED_MODE_ON:
@@ -10468,6 +10492,28 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
                                          MDIO_PMA_DEVAD,
                                          MDIO_PMA_REG_8481_LED1_MASK,
                                          0x20);
+                        if (phy->type ==
+                            PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84834) {
+                                /* Disable MI_INT interrupt before setting LED4
+                                 * source to constant on.
+                                 */
+                                if (REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 +
+                                           params->port*4) &
+                                    NIG_MASK_MI_INT) {
+                                        params->link_flags |=
+                                        LINK_FLAGS_INT_DISABLED;
+
+                                        bnx2x_bits_dis(
+                                                bp,
+                                                NIG_REG_MASK_INTERRUPT_PORT0 +
+                                                params->port*4,
+                                                NIG_MASK_MI_INT);
+                                }
+                                bnx2x_cl45_write(bp, phy,
+                                                 MDIO_PMA_DEVAD,
+                                                 MDIO_PMA_REG_8481_SIGNAL_MASK,
+                                                 0x20);
+                        }
                 }
                 break;
 
@@ -10532,6 +10578,22 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
                                          MDIO_PMA_DEVAD,
                                          MDIO_PMA_REG_8481_LINK_SIGNAL,
                                          val);
+                        if (phy->type ==
+                            PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84834) {
+                                /* Restore LED4 source to external link,
+                                 * and re-enable interrupts.
+                                 */
+                                bnx2x_cl45_write(bp, phy,
+                                                 MDIO_PMA_DEVAD,
+                                                 MDIO_PMA_REG_8481_SIGNAL_MASK,
+                                                 0x40);
+                                if (params->link_flags &
+                                    LINK_FLAGS_INT_DISABLED) {
+                                        bnx2x_link_int_enable(params);
+                                        params->link_flags &=
+                                                ~LINK_FLAGS_INT_DISABLED;
+                                }
+                        }
                 }
                 break;
         }
@@ -11791,6 +11853,8 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
                         phy->media_type = ETH_PHY_KR;
                         phy->flags |= FLAGS_WC_DUAL_MODE;
                         phy->supported &= (SUPPORTED_20000baseKR2_Full |
+                                           SUPPORTED_10000baseT_Full |
+                                           SUPPORTED_1000baseT_Full |
                                            SUPPORTED_Autoneg |
                                            SUPPORTED_FIBRE |
                                            SUPPORTED_Pause |
@@ -12465,6 +12529,8 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
         vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
         vars->mac_type = MAC_TYPE_NONE;
         vars->phy_flags = 0;
+        vars->check_kr2_recovery_cnt = 0;
+        params->link_flags = PHY_INITIALIZED;
         /* Driver opens NIG-BRB filters */
         bnx2x_set_rx_filter(params, 1);
         /* Check if link flap can be avoided */
@@ -12629,6 +12695,7 @@ int bnx2x_lfa_reset(struct link_params *params,
         struct bnx2x *bp = params->bp;
         vars->link_up = 0;
         vars->phy_flags = 0;
+        params->link_flags &= ~PHY_INITIALIZED;
         if (!params->lfa_base)
                 return bnx2x_link_reset(params, vars, 1);
         /*
@@ -13349,6 +13416,7 @@ static void bnx2x_disable_kr2(struct link_params *params,
         vars->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE;
         bnx2x_update_link_attr(params, vars->link_attr_sync);
 
+        vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT;
         /* Restart AN on leading lane */
         bnx2x_warpcore_restart_AN_KR(phy, params);
 }
@@ -13377,6 +13445,15 @@ static void bnx2x_check_kr2_wa(struct link_params *params,
                 return;
         }
 
+        /* Once KR2 was disabled, wait 5 seconds before checking KR2 recovery
+         * since some switches tend to reinit the AN process and clear the
+         * advertised BP/NP after ~2 seconds causing the KR2 to be disabled
+         * and recovered many times
+         */
+        if (vars->check_kr2_recovery_cnt > 0) {
+                vars->check_kr2_recovery_cnt--;
+                return;
+        }
         lane = bnx2x_get_warpcore_lane(phy, params);
         CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
                           MDIO_AER_BLOCK_AER_REG, lane);
@@ -13437,7 +13514,7 @@ void bnx2x_period_func(struct link_params *params, struct link_vars *vars)
                 struct bnx2x_phy *phy = &params->phy[INT_PHY];
                 bnx2x_set_aer_mmd(params, phy);
                 if ((phy->supported & SUPPORTED_20000baseKR2_Full) &&
-                    (phy->speed_cap_mask & SPEED_20000))
+                    (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_20G))
                         bnx2x_check_kr2_wa(params, vars, phy);
                 bnx2x_check_over_curr(params, vars);
                 if (vars->rx_tx_asic_rst)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
index d25c7d79787a..56c2aae4e2c8 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
@@ -307,7 +307,9 @@ struct link_params {
         struct bnx2x *bp;
         u16 req_fc_auto_adv; /* Should be set to TX / BOTH when
                                 req_flow_ctrl is set to AUTO */
-        u16 rsrv1;
+        u16 link_flags;
+#define LINK_FLAGS_INT_DISABLED         (1<<0)
+#define PHY_INITIALIZED         (1<<1)
         u32 lfa_base;
 };
 
@@ -341,7 +343,8 @@ struct link_vars {
         u32 link_status;
         u32 eee_status;
         u8 fault_detected;
-        u8 rsrv1;
+        u8 check_kr2_recovery_cnt;
+#define CHECK_KR2_RECOVERY_CNT  5
         u16 periodic_flags;
 #define PERIODIC_FLAGS_LINK_EVENT       0x0001
 
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
index 364e37ecbc5c..198f6f1c9ad5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h
@@ -459,8 +459,9 @@ struct bnx2x_fw_port_stats_old {
 
 #define UPDATE_QSTAT(s, t) \
         do { \
-                qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi); \
                 qstats->t##_lo = qstats_old->t##_lo + le32_to_cpu(s.lo); \
+                qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi) \
+                        + ((qstats->t##_lo < qstats_old->t##_lo) ? 1 : 0); \
         } while (0)
 
 #define UPDATE_QSTAT_OLD(f) \
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index fdb9b5655414..67d2663b3974 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -1869,6 +1869,8 @@ static void tg3_link_report(struct tg3 *tp)
 
                 tg3_ump_link_report(tp);
         }
+
+        tp->link_up = netif_carrier_ok(tp->dev);
 }
 
 static u16 tg3_advert_flowctrl_1000X(u8 flow_ctrl)
@@ -2522,12 +2524,6 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
         return err;
 }
 
-static void tg3_carrier_on(struct tg3 *tp)
-{
-        netif_carrier_on(tp->dev);
-        tp->link_up = true;
-}
-
 static void tg3_carrier_off(struct tg3 *tp)
 {
         netif_carrier_off(tp->dev);
@@ -2553,7 +2549,7 @@ static int tg3_phy_reset(struct tg3 *tp)
                 return -EBUSY;
 
         if (netif_running(tp->dev) && tp->link_up) {
-                tg3_carrier_off(tp);
+                netif_carrier_off(tp->dev);
                 tg3_link_report(tp);
         }
 
@@ -4134,6 +4130,14 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
                 tp->link_config.active_speed = tp->link_config.speed;
                 tp->link_config.active_duplex = tp->link_config.duplex;
 
+                if (tg3_asic_rev(tp) == ASIC_REV_5714) {
+                        /* With autoneg disabled, 5715 only links up when the
+                         * advertisement register has the configured speed
+                         * enabled.
+                         */
+                        tg3_writephy(tp, MII_ADVERTISE, ADVERTISE_ALL);
+                }
+
                 bmcr = 0;
                 switch (tp->link_config.speed) {
                 default:
@@ -4262,9 +4266,9 @@ static bool tg3_test_and_report_link_chg(struct tg3 *tp, int curr_link_up)
 {
         if (curr_link_up != tp->link_up) {
                 if (curr_link_up) {
-                        tg3_carrier_on(tp);
+                        netif_carrier_on(tp->dev);
                 } else {
-                        tg3_carrier_off(tp);
+                        netif_carrier_off(tp->dev);
                         if (tp->phy_flags & TG3_PHYFLG_MII_SERDES)
                                 tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
                 }