diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2011-11-16 18:36:59 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-11-16 18:36:59 -0500 |
commit | 28011cf19b75df9d3f35489a7599a97ec0b3f1a0 (patch) | |
tree | cc058e15191db60adb45e426fc3d328e9d246b41 /drivers/net/ethernet/broadcom/tg3.c | |
parent | f85fa279138489543206381883c8f67ef94aa912 (diff) |
net: Add ethtool to mii advertisment conversion helpers
Translating between ethtool advertisement settings and MII
advertisements are common operations for ethernet drivers. This patch
adds a set of helper functions that implements the conversion. The
patch then modifies a couple of the drivers to use the new functions.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.c')
-rw-r--r-- | drivers/net/ethernet/broadcom/tg3.c | 53 |
1 files changed, 13 insertions, 40 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 365cd47e2298..024ca1d4d028 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c | |||
@@ -3594,15 +3594,7 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) | |||
3594 | u32 val, new_adv; | 3594 | u32 val, new_adv; |
3595 | 3595 | ||
3596 | new_adv = ADVERTISE_CSMA; | 3596 | new_adv = ADVERTISE_CSMA; |
3597 | if (advertise & ADVERTISED_10baseT_Half) | 3597 | new_adv |= ethtool_adv_to_mii_100bt(advertise); |
3598 | new_adv |= ADVERTISE_10HALF; | ||
3599 | if (advertise & ADVERTISED_10baseT_Full) | ||
3600 | new_adv |= ADVERTISE_10FULL; | ||
3601 | if (advertise & ADVERTISED_100baseT_Half) | ||
3602 | new_adv |= ADVERTISE_100HALF; | ||
3603 | if (advertise & ADVERTISED_100baseT_Full) | ||
3604 | new_adv |= ADVERTISE_100FULL; | ||
3605 | |||
3606 | new_adv |= tg3_advert_flowctrl_1000T(flowctrl); | 3598 | new_adv |= tg3_advert_flowctrl_1000T(flowctrl); |
3607 | 3599 | ||
3608 | err = tg3_writephy(tp, MII_ADVERTISE, new_adv); | 3600 | err = tg3_writephy(tp, MII_ADVERTISE, new_adv); |
@@ -3612,11 +3604,7 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) | |||
3612 | if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) | 3604 | if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) |
3613 | goto done; | 3605 | goto done; |
3614 | 3606 | ||
3615 | new_adv = 0; | 3607 | new_adv = ethtool_adv_to_mii_1000T(advertise); |
3616 | if (advertise & ADVERTISED_1000baseT_Half) | ||
3617 | new_adv |= ADVERTISE_1000HALF; | ||
3618 | if (advertise & ADVERTISED_1000baseT_Full) | ||
3619 | new_adv |= ADVERTISE_1000FULL; | ||
3620 | 3608 | ||
3621 | if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 || | 3609 | if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 || |
3622 | tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) | 3610 | tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) |
@@ -3790,14 +3778,7 @@ static int tg3_copper_is_advertising_all(struct tg3 *tp, u32 mask) | |||
3790 | { | 3778 | { |
3791 | u32 adv_reg, all_mask = 0; | 3779 | u32 adv_reg, all_mask = 0; |
3792 | 3780 | ||
3793 | if (mask & ADVERTISED_10baseT_Half) | 3781 | all_mask = ethtool_adv_to_mii_100bt(mask); |
3794 | all_mask |= ADVERTISE_10HALF; | ||
3795 | if (mask & ADVERTISED_10baseT_Full) | ||
3796 | all_mask |= ADVERTISE_10FULL; | ||
3797 | if (mask & ADVERTISED_100baseT_Half) | ||
3798 | all_mask |= ADVERTISE_100HALF; | ||
3799 | if (mask & ADVERTISED_100baseT_Full) | ||
3800 | all_mask |= ADVERTISE_100FULL; | ||
3801 | 3782 | ||
3802 | if (tg3_readphy(tp, MII_ADVERTISE, &adv_reg)) | 3783 | if (tg3_readphy(tp, MII_ADVERTISE, &adv_reg)) |
3803 | return 0; | 3784 | return 0; |
@@ -3808,11 +3789,7 @@ static int tg3_copper_is_advertising_all(struct tg3 *tp, u32 mask) | |||
3808 | if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { | 3789 | if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { |
3809 | u32 tg3_ctrl; | 3790 | u32 tg3_ctrl; |
3810 | 3791 | ||
3811 | all_mask = 0; | 3792 | all_mask = ethtool_adv_to_mii_1000T(mask); |
3812 | if (mask & ADVERTISED_1000baseT_Half) | ||
3813 | all_mask |= ADVERTISE_1000HALF; | ||
3814 | if (mask & ADVERTISED_1000baseT_Full) | ||
3815 | all_mask |= ADVERTISE_1000FULL; | ||
3816 | 3793 | ||
3817 | if (tg3_readphy(tp, MII_CTRL1000, &tg3_ctrl)) | 3794 | if (tg3_readphy(tp, MII_CTRL1000, &tg3_ctrl)) |
3818 | return 0; | 3795 | return 0; |
@@ -4903,23 +4880,19 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset) | |||
4903 | (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) { | 4880 | (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) { |
4904 | /* do nothing, just check for link up at the end */ | 4881 | /* do nothing, just check for link up at the end */ |
4905 | } else if (tp->link_config.autoneg == AUTONEG_ENABLE) { | 4882 | } else if (tp->link_config.autoneg == AUTONEG_ENABLE) { |
4906 | u32 adv, new_adv; | 4883 | u32 adv, newadv; |
4907 | 4884 | ||
4908 | err |= tg3_readphy(tp, MII_ADVERTISE, &adv); | 4885 | err |= tg3_readphy(tp, MII_ADVERTISE, &adv); |
4909 | new_adv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF | | 4886 | newadv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF | |
4910 | ADVERTISE_1000XPAUSE | | 4887 | ADVERTISE_1000XPAUSE | |
4911 | ADVERTISE_1000XPSE_ASYM | | 4888 | ADVERTISE_1000XPSE_ASYM | |
4912 | ADVERTISE_SLCT); | 4889 | ADVERTISE_SLCT); |
4913 | |||
4914 | new_adv |= tg3_advert_flowctrl_1000X(tp->link_config.flowctrl); | ||
4915 | 4890 | ||
4916 | if (tp->link_config.advertising & ADVERTISED_1000baseT_Half) | 4891 | newadv |= tg3_advert_flowctrl_1000X(tp->link_config.flowctrl); |
4917 | new_adv |= ADVERTISE_1000XHALF; | 4892 | newadv |= ethtool_adv_to_mii_1000X(tp->link_config.advertising); |
4918 | if (tp->link_config.advertising & ADVERTISED_1000baseT_Full) | ||
4919 | new_adv |= ADVERTISE_1000XFULL; | ||
4920 | 4893 | ||
4921 | if ((new_adv != adv) || !(bmcr & BMCR_ANENABLE)) { | 4894 | if ((newadv != adv) || !(bmcr & BMCR_ANENABLE)) { |
4922 | tg3_writephy(tp, MII_ADVERTISE, new_adv); | 4895 | tg3_writephy(tp, MII_ADVERTISE, newadv); |
4923 | bmcr |= BMCR_ANENABLE | BMCR_ANRESTART; | 4896 | bmcr |= BMCR_ANENABLE | BMCR_ANRESTART; |
4924 | tg3_writephy(tp, MII_BMCR, bmcr); | 4897 | tg3_writephy(tp, MII_BMCR, bmcr); |
4925 | 4898 | ||