diff options
author | Yuval Mintz <yuvalmin@broadcom.com> | 2013-01-22 22:21:50 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-01-23 13:58:29 -0500 |
commit | 86564c3f0fe7ff3ffe452fcc54a774eeadc1cf45 (patch) | |
tree | 7156520a0da876f430695b235a7c1e2b54d998d5 /drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c | |
parent | 80bfe5cc1b8c320247a21ff40d8c139c5f3bbcaf (diff) |
bnx2x: Remove many sparse warnings
Remove most of the sparse warnings in the bnx2x compilation
(i.e., thus resulting when compiling with `C=2 CF=-D__CHECK_ENDIAN__').
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Ariel Elior <ariele@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c | 80 |
1 files changed, 42 insertions, 38 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c index 7d6d601a8420..7306416bc90d 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c | |||
@@ -707,7 +707,8 @@ static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp, | |||
707 | static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(u32 cid, int type, | 707 | static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(u32 cid, int type, |
708 | struct eth_classify_header *hdr, int rule_cnt) | 708 | struct eth_classify_header *hdr, int rule_cnt) |
709 | { | 709 | { |
710 | hdr->echo = (cid & BNX2X_SWCID_MASK) | (type << BNX2X_SWCID_SHIFT); | 710 | hdr->echo = cpu_to_le32((cid & BNX2X_SWCID_MASK) | |
711 | (type << BNX2X_SWCID_SHIFT)); | ||
711 | hdr->rule_cnt = (u8)rule_cnt; | 712 | hdr->rule_cnt = (u8)rule_cnt; |
712 | } | 713 | } |
713 | 714 | ||
@@ -813,8 +814,9 @@ static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp, | |||
813 | 814 | ||
814 | hdr->length = 1; | 815 | hdr->length = 1; |
815 | hdr->offset = (u8)cam_offset; | 816 | hdr->offset = (u8)cam_offset; |
816 | hdr->client_id = 0xff; | 817 | hdr->client_id = cpu_to_le16(0xff); |
817 | hdr->echo = ((r->cid & BNX2X_SWCID_MASK) | (type << BNX2X_SWCID_SHIFT)); | 818 | hdr->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | |
819 | (type << BNX2X_SWCID_SHIFT)); | ||
818 | } | 820 | } |
819 | 821 | ||
820 | static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp, | 822 | static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp, |
@@ -903,7 +905,7 @@ static void bnx2x_set_one_vlan_e2(struct bnx2x *bp, | |||
903 | (struct eth_classify_rules_ramrod_data *)(raw->rdata); | 905 | (struct eth_classify_rules_ramrod_data *)(raw->rdata); |
904 | int rule_cnt = rule_idx + 1; | 906 | int rule_cnt = rule_idx + 1; |
905 | union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; | 907 | union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; |
906 | int cmd = elem->cmd_data.vlan_mac.cmd; | 908 | enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; |
907 | bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; | 909 | bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; |
908 | u16 vlan = elem->cmd_data.vlan_mac.u.vlan.vlan; | 910 | u16 vlan = elem->cmd_data.vlan_mac.u.vlan.vlan; |
909 | 911 | ||
@@ -953,7 +955,7 @@ static void bnx2x_set_one_vlan_mac_e2(struct bnx2x *bp, | |||
953 | (struct eth_classify_rules_ramrod_data *)(raw->rdata); | 955 | (struct eth_classify_rules_ramrod_data *)(raw->rdata); |
954 | int rule_cnt = rule_idx + 1; | 956 | int rule_cnt = rule_idx + 1; |
955 | union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; | 957 | union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; |
956 | int cmd = elem->cmd_data.vlan_mac.cmd; | 958 | enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; |
957 | bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; | 959 | bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; |
958 | u16 vlan = elem->cmd_data.vlan_mac.u.vlan_mac.vlan; | 960 | u16 vlan = elem->cmd_data.vlan_mac.u.vlan_mac.vlan; |
959 | u8 *mac = elem->cmd_data.vlan_mac.u.vlan_mac.mac; | 961 | u8 *mac = elem->cmd_data.vlan_mac.u.vlan_mac.mac; |
@@ -1532,7 +1534,7 @@ static inline int bnx2x_vlan_mac_get_registry_elem( | |||
1532 | bool restore, | 1534 | bool restore, |
1533 | struct bnx2x_vlan_mac_registry_elem **re) | 1535 | struct bnx2x_vlan_mac_registry_elem **re) |
1534 | { | 1536 | { |
1535 | int cmd = elem->cmd_data.vlan_mac.cmd; | 1537 | enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; |
1536 | struct bnx2x_vlan_mac_registry_elem *reg_elem; | 1538 | struct bnx2x_vlan_mac_registry_elem *reg_elem; |
1537 | 1539 | ||
1538 | /* Allocate a new registry element if needed. */ | 1540 | /* Allocate a new registry element if needed. */ |
@@ -1591,7 +1593,7 @@ static int bnx2x_execute_vlan_mac(struct bnx2x *bp, | |||
1591 | bool restore = test_bit(RAMROD_RESTORE, ramrod_flags); | 1593 | bool restore = test_bit(RAMROD_RESTORE, ramrod_flags); |
1592 | bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags); | 1594 | bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags); |
1593 | struct bnx2x_vlan_mac_registry_elem *reg_elem; | 1595 | struct bnx2x_vlan_mac_registry_elem *reg_elem; |
1594 | int cmd; | 1596 | enum bnx2x_vlan_mac_cmd cmd; |
1595 | 1597 | ||
1596 | /* | 1598 | /* |
1597 | * If DRIVER_ONLY execution is requested, cleanup a registry | 1599 | * If DRIVER_ONLY execution is requested, cleanup a registry |
@@ -2186,7 +2188,7 @@ static inline void bnx2x_rx_mode_set_rdata_hdr_e2(u32 cid, | |||
2186 | struct eth_classify_header *hdr, | 2188 | struct eth_classify_header *hdr, |
2187 | u8 rule_cnt) | 2189 | u8 rule_cnt) |
2188 | { | 2190 | { |
2189 | hdr->echo = cid; | 2191 | hdr->echo = cpu_to_le32(cid); |
2190 | hdr->rule_cnt = rule_cnt; | 2192 | hdr->rule_cnt = rule_cnt; |
2191 | } | 2193 | } |
2192 | 2194 | ||
@@ -2433,7 +2435,7 @@ static int bnx2x_mcast_wait(struct bnx2x *bp, | |||
2433 | static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp, | 2435 | static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp, |
2434 | struct bnx2x_mcast_obj *o, | 2436 | struct bnx2x_mcast_obj *o, |
2435 | struct bnx2x_mcast_ramrod_params *p, | 2437 | struct bnx2x_mcast_ramrod_params *p, |
2436 | int cmd) | 2438 | enum bnx2x_mcast_cmd cmd) |
2437 | { | 2439 | { |
2438 | int total_sz; | 2440 | int total_sz; |
2439 | struct bnx2x_pending_mcast_cmd *new_cmd; | 2441 | struct bnx2x_pending_mcast_cmd *new_cmd; |
@@ -2565,7 +2567,7 @@ static inline u8 bnx2x_mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o) | |||
2565 | static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp, | 2567 | static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp, |
2566 | struct bnx2x_mcast_obj *o, int idx, | 2568 | struct bnx2x_mcast_obj *o, int idx, |
2567 | union bnx2x_mcast_config_data *cfg_data, | 2569 | union bnx2x_mcast_config_data *cfg_data, |
2568 | int cmd) | 2570 | enum bnx2x_mcast_cmd cmd) |
2569 | { | 2571 | { |
2570 | struct bnx2x_raw_obj *r = &o->raw; | 2572 | struct bnx2x_raw_obj *r = &o->raw; |
2571 | struct eth_multicast_rules_ramrod_data *data = | 2573 | struct eth_multicast_rules_ramrod_data *data = |
@@ -2629,7 +2631,7 @@ static inline int bnx2x_mcast_handle_restore_cmd_e2( | |||
2629 | int *rdata_idx) | 2631 | int *rdata_idx) |
2630 | { | 2632 | { |
2631 | int cur_bin, cnt = *rdata_idx; | 2633 | int cur_bin, cnt = *rdata_idx; |
2632 | union bnx2x_mcast_config_data cfg_data = {0}; | 2634 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
2633 | 2635 | ||
2634 | /* go through the registry and configure the bins from it */ | 2636 | /* go through the registry and configure the bins from it */ |
2635 | for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0; | 2637 | for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0; |
@@ -2661,7 +2663,7 @@ static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp, | |||
2661 | { | 2663 | { |
2662 | struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n; | 2664 | struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n; |
2663 | int cnt = *line_idx; | 2665 | int cnt = *line_idx; |
2664 | union bnx2x_mcast_config_data cfg_data = {0}; | 2666 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
2665 | 2667 | ||
2666 | list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head, | 2668 | list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head, |
2667 | link) { | 2669 | link) { |
@@ -2784,7 +2786,7 @@ static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp, | |||
2784 | int *line_idx) | 2786 | int *line_idx) |
2785 | { | 2787 | { |
2786 | struct bnx2x_mcast_list_elem *mlist_pos; | 2788 | struct bnx2x_mcast_list_elem *mlist_pos; |
2787 | union bnx2x_mcast_config_data cfg_data = {0}; | 2789 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
2788 | int cnt = *line_idx; | 2790 | int cnt = *line_idx; |
2789 | 2791 | ||
2790 | list_for_each_entry(mlist_pos, &p->mcast_list, link) { | 2792 | list_for_each_entry(mlist_pos, &p->mcast_list, link) { |
@@ -2831,7 +2833,8 @@ static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp, | |||
2831 | * Returns number of lines filled in the ramrod data in total. | 2833 | * Returns number of lines filled in the ramrod data in total. |
2832 | */ | 2834 | */ |
2833 | static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp, | 2835 | static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp, |
2834 | struct bnx2x_mcast_ramrod_params *p, int cmd, | 2836 | struct bnx2x_mcast_ramrod_params *p, |
2837 | enum bnx2x_mcast_cmd cmd, | ||
2835 | int start_cnt) | 2838 | int start_cnt) |
2836 | { | 2839 | { |
2837 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 2840 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
@@ -2865,7 +2868,7 @@ static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp, | |||
2865 | 2868 | ||
2866 | static int bnx2x_mcast_validate_e2(struct bnx2x *bp, | 2869 | static int bnx2x_mcast_validate_e2(struct bnx2x *bp, |
2867 | struct bnx2x_mcast_ramrod_params *p, | 2870 | struct bnx2x_mcast_ramrod_params *p, |
2868 | int cmd) | 2871 | enum bnx2x_mcast_cmd cmd) |
2869 | { | 2872 | { |
2870 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 2873 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
2871 | int reg_sz = o->get_registry_size(o); | 2874 | int reg_sz = o->get_registry_size(o); |
@@ -2934,8 +2937,9 @@ static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp, | |||
2934 | struct eth_multicast_rules_ramrod_data *data = | 2937 | struct eth_multicast_rules_ramrod_data *data = |
2935 | (struct eth_multicast_rules_ramrod_data *)(r->rdata); | 2938 | (struct eth_multicast_rules_ramrod_data *)(r->rdata); |
2936 | 2939 | ||
2937 | data->header.echo = ((r->cid & BNX2X_SWCID_MASK) | | 2940 | data->header.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | |
2938 | (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); | 2941 | (BNX2X_FILTER_MCAST_PENDING << |
2942 | BNX2X_SWCID_SHIFT)); | ||
2939 | data->header.rule_cnt = len; | 2943 | data->header.rule_cnt = len; |
2940 | } | 2944 | } |
2941 | 2945 | ||
@@ -2969,7 +2973,7 @@ static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp, | |||
2969 | 2973 | ||
2970 | static int bnx2x_mcast_setup_e2(struct bnx2x *bp, | 2974 | static int bnx2x_mcast_setup_e2(struct bnx2x *bp, |
2971 | struct bnx2x_mcast_ramrod_params *p, | 2975 | struct bnx2x_mcast_ramrod_params *p, |
2972 | int cmd) | 2976 | enum bnx2x_mcast_cmd cmd) |
2973 | { | 2977 | { |
2974 | struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; | 2978 | struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; |
2975 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 2979 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
@@ -3055,7 +3059,7 @@ static int bnx2x_mcast_setup_e2(struct bnx2x *bp, | |||
3055 | 3059 | ||
3056 | static int bnx2x_mcast_validate_e1h(struct bnx2x *bp, | 3060 | static int bnx2x_mcast_validate_e1h(struct bnx2x *bp, |
3057 | struct bnx2x_mcast_ramrod_params *p, | 3061 | struct bnx2x_mcast_ramrod_params *p, |
3058 | int cmd) | 3062 | enum bnx2x_mcast_cmd cmd) |
3059 | { | 3063 | { |
3060 | /* Mark, that there is a work to do */ | 3064 | /* Mark, that there is a work to do */ |
3061 | if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE)) | 3065 | if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE)) |
@@ -3117,7 +3121,7 @@ static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp, | |||
3117 | */ | 3121 | */ |
3118 | static int bnx2x_mcast_setup_e1h(struct bnx2x *bp, | 3122 | static int bnx2x_mcast_setup_e1h(struct bnx2x *bp, |
3119 | struct bnx2x_mcast_ramrod_params *p, | 3123 | struct bnx2x_mcast_ramrod_params *p, |
3120 | int cmd) | 3124 | enum bnx2x_mcast_cmd cmd) |
3121 | { | 3125 | { |
3122 | int i; | 3126 | int i; |
3123 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 3127 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
@@ -3171,7 +3175,7 @@ static int bnx2x_mcast_setup_e1h(struct bnx2x *bp, | |||
3171 | 3175 | ||
3172 | static int bnx2x_mcast_validate_e1(struct bnx2x *bp, | 3176 | static int bnx2x_mcast_validate_e1(struct bnx2x *bp, |
3173 | struct bnx2x_mcast_ramrod_params *p, | 3177 | struct bnx2x_mcast_ramrod_params *p, |
3174 | int cmd) | 3178 | enum bnx2x_mcast_cmd cmd) |
3175 | { | 3179 | { |
3176 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 3180 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
3177 | int reg_sz = o->get_registry_size(o); | 3181 | int reg_sz = o->get_registry_size(o); |
@@ -3244,7 +3248,7 @@ static void bnx2x_mcast_revert_e1(struct bnx2x *bp, | |||
3244 | static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp, | 3248 | static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp, |
3245 | struct bnx2x_mcast_obj *o, int idx, | 3249 | struct bnx2x_mcast_obj *o, int idx, |
3246 | union bnx2x_mcast_config_data *cfg_data, | 3250 | union bnx2x_mcast_config_data *cfg_data, |
3247 | int cmd) | 3251 | enum bnx2x_mcast_cmd cmd) |
3248 | { | 3252 | { |
3249 | struct bnx2x_raw_obj *r = &o->raw; | 3253 | struct bnx2x_raw_obj *r = &o->raw; |
3250 | struct mac_configuration_cmd *data = | 3254 | struct mac_configuration_cmd *data = |
@@ -3288,9 +3292,10 @@ static inline void bnx2x_mcast_set_rdata_hdr_e1(struct bnx2x *bp, | |||
3288 | BNX2X_MAX_MULTICAST*(1 + r->func_id)); | 3292 | BNX2X_MAX_MULTICAST*(1 + r->func_id)); |
3289 | 3293 | ||
3290 | data->hdr.offset = offset; | 3294 | data->hdr.offset = offset; |
3291 | data->hdr.client_id = 0xff; | 3295 | data->hdr.client_id = cpu_to_le16(0xff); |
3292 | data->hdr.echo = ((r->cid & BNX2X_SWCID_MASK) | | 3296 | data->hdr.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | |
3293 | (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); | 3297 | (BNX2X_FILTER_MCAST_PENDING << |
3298 | BNX2X_SWCID_SHIFT)); | ||
3294 | data->hdr.length = len; | 3299 | data->hdr.length = len; |
3295 | } | 3300 | } |
3296 | 3301 | ||
@@ -3313,7 +3318,7 @@ static inline int bnx2x_mcast_handle_restore_cmd_e1( | |||
3313 | { | 3318 | { |
3314 | struct bnx2x_mcast_mac_elem *elem; | 3319 | struct bnx2x_mcast_mac_elem *elem; |
3315 | int i = 0; | 3320 | int i = 0; |
3316 | union bnx2x_mcast_config_data cfg_data = {0}; | 3321 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
3317 | 3322 | ||
3318 | /* go through the registry and configure the MACs from it. */ | 3323 | /* go through the registry and configure the MACs from it. */ |
3319 | list_for_each_entry(elem, &o->registry.exact_match.macs, link) { | 3324 | list_for_each_entry(elem, &o->registry.exact_match.macs, link) { |
@@ -3338,7 +3343,7 @@ static inline int bnx2x_mcast_handle_pending_cmds_e1( | |||
3338 | struct bnx2x_pending_mcast_cmd *cmd_pos; | 3343 | struct bnx2x_pending_mcast_cmd *cmd_pos; |
3339 | struct bnx2x_mcast_mac_elem *pmac_pos; | 3344 | struct bnx2x_mcast_mac_elem *pmac_pos; |
3340 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 3345 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
3341 | union bnx2x_mcast_config_data cfg_data = {0}; | 3346 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
3342 | int cnt = 0; | 3347 | int cnt = 0; |
3343 | 3348 | ||
3344 | 3349 | ||
@@ -3462,7 +3467,7 @@ static inline int bnx2x_mcast_refresh_registry_e1(struct bnx2x *bp, | |||
3462 | 3467 | ||
3463 | static int bnx2x_mcast_setup_e1(struct bnx2x *bp, | 3468 | static int bnx2x_mcast_setup_e1(struct bnx2x *bp, |
3464 | struct bnx2x_mcast_ramrod_params *p, | 3469 | struct bnx2x_mcast_ramrod_params *p, |
3465 | int cmd) | 3470 | enum bnx2x_mcast_cmd cmd) |
3466 | { | 3471 | { |
3467 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 3472 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
3468 | struct bnx2x_raw_obj *raw = &o->raw; | 3473 | struct bnx2x_raw_obj *raw = &o->raw; |
@@ -3566,7 +3571,7 @@ static void bnx2x_mcast_set_registry_size_aprox(struct bnx2x_mcast_obj *o, | |||
3566 | 3571 | ||
3567 | int bnx2x_config_mcast(struct bnx2x *bp, | 3572 | int bnx2x_config_mcast(struct bnx2x *bp, |
3568 | struct bnx2x_mcast_ramrod_params *p, | 3573 | struct bnx2x_mcast_ramrod_params *p, |
3569 | int cmd) | 3574 | enum bnx2x_mcast_cmd cmd) |
3570 | { | 3575 | { |
3571 | struct bnx2x_mcast_obj *o = p->mcast_obj; | 3576 | struct bnx2x_mcast_obj *o = p->mcast_obj; |
3572 | struct bnx2x_raw_obj *r = &o->raw; | 3577 | struct bnx2x_raw_obj *r = &o->raw; |
@@ -4089,8 +4094,8 @@ static int bnx2x_setup_rss(struct bnx2x *bp, | |||
4089 | DP(BNX2X_MSG_SP, "Configuring RSS\n"); | 4094 | DP(BNX2X_MSG_SP, "Configuring RSS\n"); |
4090 | 4095 | ||
4091 | /* Set an echo field */ | 4096 | /* Set an echo field */ |
4092 | data->echo = (r->cid & BNX2X_SWCID_MASK) | | 4097 | data->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | |
4093 | (r->state << BNX2X_SWCID_SHIFT); | 4098 | (r->state << BNX2X_SWCID_SHIFT)); |
4094 | 4099 | ||
4095 | /* RSS mode */ | 4100 | /* RSS mode */ |
4096 | if (test_bit(BNX2X_RSS_MODE_DISABLED, &p->rss_flags)) | 4101 | if (test_bit(BNX2X_RSS_MODE_DISABLED, &p->rss_flags)) |
@@ -5749,21 +5754,20 @@ inline int bnx2x_func_send_afex_viflists(struct bnx2x *bp, | |||
5749 | struct bnx2x_func_sp_obj *o = params->f_obj; | 5754 | struct bnx2x_func_sp_obj *o = params->f_obj; |
5750 | struct afex_vif_list_ramrod_data *rdata = | 5755 | struct afex_vif_list_ramrod_data *rdata = |
5751 | (struct afex_vif_list_ramrod_data *)o->afex_rdata; | 5756 | (struct afex_vif_list_ramrod_data *)o->afex_rdata; |
5752 | struct bnx2x_func_afex_viflists_params *afex_viflist_params = | 5757 | struct bnx2x_func_afex_viflists_params *afex_vif_params = |
5753 | ¶ms->params.afex_viflists; | 5758 | ¶ms->params.afex_viflists; |
5754 | u64 *p_rdata = (u64 *)rdata; | 5759 | u64 *p_rdata = (u64 *)rdata; |
5755 | 5760 | ||
5756 | memset(rdata, 0, sizeof(*rdata)); | 5761 | memset(rdata, 0, sizeof(*rdata)); |
5757 | 5762 | ||
5758 | /* Fill the ramrod data with provided parameters */ | 5763 | /* Fill the ramrod data with provided parameters */ |
5759 | rdata->vif_list_index = afex_viflist_params->vif_list_index; | 5764 | rdata->vif_list_index = cpu_to_le16(afex_vif_params->vif_list_index); |
5760 | rdata->func_bit_map = afex_viflist_params->func_bit_map; | 5765 | rdata->func_bit_map = afex_vif_params->func_bit_map; |
5761 | rdata->afex_vif_list_command = | 5766 | rdata->afex_vif_list_command = afex_vif_params->afex_vif_list_command; |
5762 | afex_viflist_params->afex_vif_list_command; | 5767 | rdata->func_to_clear = afex_vif_params->func_to_clear; |
5763 | rdata->func_to_clear = afex_viflist_params->func_to_clear; | ||
5764 | 5768 | ||
5765 | /* send in echo type of sub command */ | 5769 | /* send in echo type of sub command */ |
5766 | rdata->echo = afex_viflist_params->afex_vif_list_command; | 5770 | rdata->echo = afex_vif_params->afex_vif_list_command; |
5767 | 5771 | ||
5768 | /* No need for an explicit memory barrier here as long we would | 5772 | /* No need for an explicit memory barrier here as long we would |
5769 | * need to ensure the ordering of writing to the SPQ element | 5773 | * need to ensure the ordering of writing to the SPQ element |