diff options
author | Yuval Mintz <yuvalmin@broadcom.com> | 2012-04-03 14:41:24 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-04-04 01:37:58 -0400 |
commit | 32d68de1cd267f811d72f189cbaba3af624f0fd5 (patch) | |
tree | 7a4b0b7984822f573cb5075614e53672cdbbb75c /drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |
parent | ef81442f728ffcf30ccbc6db253df8e35a5182c4 (diff) |
bnx2x: remove unnecessary dmae code
Removed uninformative debug prints, as well as two functions
which were hardly used in the code.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 91 |
1 files changed, 4 insertions, 87 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index db5fb4e15127..a2324a862993 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -308,67 +308,6 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) | |||
308 | #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" | 308 | #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" |
309 | #define DMAE_DP_DST_NONE "dst_addr [none]" | 309 | #define DMAE_DP_DST_NONE "dst_addr [none]" |
310 | 310 | ||
311 | static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, | ||
312 | int msglvl) | ||
313 | { | ||
314 | u32 src_type = dmae->opcode & DMAE_COMMAND_SRC; | ||
315 | |||
316 | switch (dmae->opcode & DMAE_COMMAND_DST) { | ||
317 | case DMAE_CMD_DST_PCI: | ||
318 | if (src_type == DMAE_CMD_SRC_PCI) | ||
319 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
320 | "src [%x:%08x], len [%d*4], dst [%x:%08x]\n" | ||
321 | "comp_addr [%x:%08x], comp_val 0x%08x\n", | ||
322 | dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo, | ||
323 | dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo, | ||
324 | dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
325 | dmae->comp_val); | ||
326 | else | ||
327 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
328 | "src [%08x], len [%d*4], dst [%x:%08x]\n" | ||
329 | "comp_addr [%x:%08x], comp_val 0x%08x\n", | ||
330 | dmae->opcode, dmae->src_addr_lo >> 2, | ||
331 | dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo, | ||
332 | dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
333 | dmae->comp_val); | ||
334 | break; | ||
335 | case DMAE_CMD_DST_GRC: | ||
336 | if (src_type == DMAE_CMD_SRC_PCI) | ||
337 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
338 | "src [%x:%08x], len [%d*4], dst_addr [%08x]\n" | ||
339 | "comp_addr [%x:%08x], comp_val 0x%08x\n", | ||
340 | dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo, | ||
341 | dmae->len, dmae->dst_addr_lo >> 2, | ||
342 | dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
343 | dmae->comp_val); | ||
344 | else | ||
345 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
346 | "src [%08x], len [%d*4], dst [%08x]\n" | ||
347 | "comp_addr [%x:%08x], comp_val 0x%08x\n", | ||
348 | dmae->opcode, dmae->src_addr_lo >> 2, | ||
349 | dmae->len, dmae->dst_addr_lo >> 2, | ||
350 | dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
351 | dmae->comp_val); | ||
352 | break; | ||
353 | default: | ||
354 | if (src_type == DMAE_CMD_SRC_PCI) | ||
355 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
356 | "src_addr [%x:%08x] len [%d * 4] dst_addr [none]\n" | ||
357 | "comp_addr [%x:%08x] comp_val 0x%08x\n", | ||
358 | dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo, | ||
359 | dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
360 | dmae->comp_val); | ||
361 | else | ||
362 | DP(msglvl, "DMAE: opcode 0x%08x\n" | ||
363 | "src_addr [%08x] len [%d * 4] dst_addr [none]\n" | ||
364 | "comp_addr [%x:%08x] comp_val 0x%08x\n", | ||
365 | dmae->opcode, dmae->src_addr_lo >> 2, | ||
366 | dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo, | ||
367 | dmae->comp_val); | ||
368 | break; | ||
369 | } | ||
370 | |||
371 | } | ||
372 | 311 | ||
373 | /* copy command into DMAE command memory and set DMAE command go */ | 312 | /* copy command into DMAE command memory and set DMAE command go */ |
374 | void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx) | 313 | void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx) |
@@ -505,8 +444,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, | |||
505 | dmae.dst_addr_hi = 0; | 444 | dmae.dst_addr_hi = 0; |
506 | dmae.len = len32; | 445 | dmae.len = len32; |
507 | 446 | ||
508 | bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF); | ||
509 | |||
510 | /* issue the command and wait for completion */ | 447 | /* issue the command and wait for completion */ |
511 | bnx2x_issue_dmae_with_comp(bp, &dmae); | 448 | bnx2x_issue_dmae_with_comp(bp, &dmae); |
512 | } | 449 | } |
@@ -539,8 +476,6 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) | |||
539 | dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data)); | 476 | dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data)); |
540 | dmae.len = len32; | 477 | dmae.len = len32; |
541 | 478 | ||
542 | bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF); | ||
543 | |||
544 | /* issue the command and wait for completion */ | 479 | /* issue the command and wait for completion */ |
545 | bnx2x_issue_dmae_with_comp(bp, &dmae); | 480 | bnx2x_issue_dmae_with_comp(bp, &dmae); |
546 | } | 481 | } |
@@ -561,27 +496,6 @@ static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, | |||
561 | bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len); | 496 | bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len); |
562 | } | 497 | } |
563 | 498 | ||
564 | /* used only for slowpath so not inlined */ | ||
565 | static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo) | ||
566 | { | ||
567 | u32 wb_write[2]; | ||
568 | |||
569 | wb_write[0] = val_hi; | ||
570 | wb_write[1] = val_lo; | ||
571 | REG_WR_DMAE(bp, reg, wb_write, 2); | ||
572 | } | ||
573 | |||
574 | #ifdef USE_WB_RD | ||
575 | static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg) | ||
576 | { | ||
577 | u32 wb_data[2]; | ||
578 | |||
579 | REG_RD_DMAE(bp, reg, wb_data, 2); | ||
580 | |||
581 | return HILO_U64(wb_data[0], wb_data[1]); | ||
582 | } | ||
583 | #endif | ||
584 | |||
585 | static int bnx2x_mc_assert(struct bnx2x *bp) | 499 | static int bnx2x_mc_assert(struct bnx2x *bp) |
586 | { | 500 | { |
587 | char last_idx; | 501 | char last_idx; |
@@ -6639,13 +6553,16 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
6639 | static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) | 6553 | static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) |
6640 | { | 6554 | { |
6641 | int reg; | 6555 | int reg; |
6556 | u32 wb_write[2]; | ||
6642 | 6557 | ||
6643 | if (CHIP_IS_E1(bp)) | 6558 | if (CHIP_IS_E1(bp)) |
6644 | reg = PXP2_REG_RQ_ONCHIP_AT + index*8; | 6559 | reg = PXP2_REG_RQ_ONCHIP_AT + index*8; |
6645 | else | 6560 | else |
6646 | reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8; | 6561 | reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8; |
6647 | 6562 | ||
6648 | bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr)); | 6563 | wb_write[0] = ONCHIP_ADDR1(addr); |
6564 | wb_write[1] = ONCHIP_ADDR2(addr); | ||
6565 | REG_WR_DMAE(bp, reg, wb_write, 2); | ||
6649 | } | 6566 | } |
6650 | 6567 | ||
6651 | static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) | 6568 | static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) |