diff options
author | Eric Dumazet <edumazet@google.com> | 2012-04-27 17:39:21 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-04-30 21:38:17 -0400 |
commit | 1191cb83489e6ee87a38ae5b127651f4a7c438dc (patch) | |
tree | 24c0bc14c3f8d2fbbb2d9110e948afdaa443e2cf /drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |
parent | d344c4f3103c6faa1635b155d8f516e8a7e0aa4e (diff) |
bnx2x: remove some bloat
Before doing skb->head_frag work on bnx2x driver, I found too much stuff
was inlined in bnx2x/bnx2x_cmn.h for no good reason and made my work not
very easy.
Move some big functions out of this include file to the respective .c
file.
A lot of inline keywords are not needed at all in this huge driver.
text data bss dec hex filename
490083 1270 56 491409 77f91 bnx2x/bnx2x.ko.before
484206 1270 56 485532 7689c bnx2x/bnx2x.ko
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Eilon Greenstein <eilong@broadcom.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Maciej Żenczykowski <maze@google.com>
Cc: Neal Cardwell <ncardwell@google.com>
Cc: Tom Herbert <therbert@google.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: Ben Hutchings <bhutchings@solarflare.com>
Cc: Matt Carlson <mcarlson@broadcom.com>
Cc: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 325 |
1 files changed, 224 insertions, 101 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index 0708cb803335..35b82e00d052 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -226,15 +226,15 @@ static LIST_HEAD(bnx2x_prev_list); | |||
226 | * General service functions | 226 | * General service functions |
227 | ****************************************************************************/ | 227 | ****************************************************************************/ |
228 | 228 | ||
229 | static inline void __storm_memset_dma_mapping(struct bnx2x *bp, | 229 | static void __storm_memset_dma_mapping(struct bnx2x *bp, |
230 | u32 addr, dma_addr_t mapping) | 230 | u32 addr, dma_addr_t mapping) |
231 | { | 231 | { |
232 | REG_WR(bp, addr, U64_LO(mapping)); | 232 | REG_WR(bp, addr, U64_LO(mapping)); |
233 | REG_WR(bp, addr + 4, U64_HI(mapping)); | 233 | REG_WR(bp, addr + 4, U64_HI(mapping)); |
234 | } | 234 | } |
235 | 235 | ||
236 | static inline void storm_memset_spq_addr(struct bnx2x *bp, | 236 | static void storm_memset_spq_addr(struct bnx2x *bp, |
237 | dma_addr_t mapping, u16 abs_fid) | 237 | dma_addr_t mapping, u16 abs_fid) |
238 | { | 238 | { |
239 | u32 addr = XSEM_REG_FAST_MEMORY + | 239 | u32 addr = XSEM_REG_FAST_MEMORY + |
240 | XSTORM_SPQ_PAGE_BASE_OFFSET(abs_fid); | 240 | XSTORM_SPQ_PAGE_BASE_OFFSET(abs_fid); |
@@ -242,8 +242,8 @@ static inline void storm_memset_spq_addr(struct bnx2x *bp, | |||
242 | __storm_memset_dma_mapping(bp, addr, mapping); | 242 | __storm_memset_dma_mapping(bp, addr, mapping); |
243 | } | 243 | } |
244 | 244 | ||
245 | static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, | 245 | static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, |
246 | u16 pf_id) | 246 | u16 pf_id) |
247 | { | 247 | { |
248 | REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid), | 248 | REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid), |
249 | pf_id); | 249 | pf_id); |
@@ -255,8 +255,8 @@ static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, | |||
255 | pf_id); | 255 | pf_id); |
256 | } | 256 | } |
257 | 257 | ||
258 | static inline void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid, | 258 | static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid, |
259 | u8 enable) | 259 | u8 enable) |
260 | { | 260 | { |
261 | REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid), | 261 | REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid), |
262 | enable); | 262 | enable); |
@@ -268,8 +268,8 @@ static inline void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid, | |||
268 | enable); | 268 | enable); |
269 | } | 269 | } |
270 | 270 | ||
271 | static inline void storm_memset_eq_data(struct bnx2x *bp, | 271 | static void storm_memset_eq_data(struct bnx2x *bp, |
272 | struct event_ring_data *eq_data, | 272 | struct event_ring_data *eq_data, |
273 | u16 pfid) | 273 | u16 pfid) |
274 | { | 274 | { |
275 | size_t size = sizeof(struct event_ring_data); | 275 | size_t size = sizeof(struct event_ring_data); |
@@ -279,8 +279,8 @@ static inline void storm_memset_eq_data(struct bnx2x *bp, | |||
279 | __storm_memset_struct(bp, addr, size, (u32 *)eq_data); | 279 | __storm_memset_struct(bp, addr, size, (u32 *)eq_data); |
280 | } | 280 | } |
281 | 281 | ||
282 | static inline void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod, | 282 | static void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod, |
283 | u16 pfid) | 283 | u16 pfid) |
284 | { | 284 | { |
285 | u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_PROD_OFFSET(pfid); | 285 | u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_PROD_OFFSET(pfid); |
286 | REG_WR16(bp, addr, eq_prod); | 286 | REG_WR16(bp, addr, eq_prod); |
@@ -676,7 +676,7 @@ void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) | |||
676 | printk("%s" "end of fw dump\n", lvl); | 676 | printk("%s" "end of fw dump\n", lvl); |
677 | } | 677 | } |
678 | 678 | ||
679 | static inline void bnx2x_fw_dump(struct bnx2x *bp) | 679 | static void bnx2x_fw_dump(struct bnx2x *bp) |
680 | { | 680 | { |
681 | bnx2x_fw_dump_lvl(bp, KERN_ERR); | 681 | bnx2x_fw_dump_lvl(bp, KERN_ERR); |
682 | } | 682 | } |
@@ -996,8 +996,8 @@ static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp, | |||
996 | poll_count-cur_cnt, FLR_WAIT_INTERVAL, regs->pN); | 996 | poll_count-cur_cnt, FLR_WAIT_INTERVAL, regs->pN); |
997 | } | 997 | } |
998 | 998 | ||
999 | static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg, | 999 | static u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg, |
1000 | u32 expected, u32 poll_count) | 1000 | u32 expected, u32 poll_count) |
1001 | { | 1001 | { |
1002 | u32 cur_cnt = poll_count; | 1002 | u32 cur_cnt = poll_count; |
1003 | u32 val; | 1003 | u32 val; |
@@ -1008,8 +1008,8 @@ static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg, | |||
1008 | return val; | 1008 | return val; |
1009 | } | 1009 | } |
1010 | 1010 | ||
1011 | static inline int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, | 1011 | static int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, |
1012 | char *msg, u32 poll_cnt) | 1012 | char *msg, u32 poll_cnt) |
1013 | { | 1013 | { |
1014 | u32 val = bnx2x_flr_clnup_reg_poll(bp, reg, 0, poll_cnt); | 1014 | u32 val = bnx2x_flr_clnup_reg_poll(bp, reg, 0, poll_cnt); |
1015 | if (val != 0) { | 1015 | if (val != 0) { |
@@ -1106,7 +1106,7 @@ static void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count) | |||
1106 | (((index) << SDM_OP_GEN_AGG_VECT_IDX_SHIFT) & SDM_OP_GEN_AGG_VECT_IDX) | 1106 | (((index) << SDM_OP_GEN_AGG_VECT_IDX_SHIFT) & SDM_OP_GEN_AGG_VECT_IDX) |
1107 | 1107 | ||
1108 | 1108 | ||
1109 | static inline int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, | 1109 | static int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, |
1110 | u32 poll_cnt) | 1110 | u32 poll_cnt) |
1111 | { | 1111 | { |
1112 | struct sdm_op_gen op_gen = {0}; | 1112 | struct sdm_op_gen op_gen = {0}; |
@@ -1140,7 +1140,7 @@ static inline int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, | |||
1140 | return ret; | 1140 | return ret; |
1141 | } | 1141 | } |
1142 | 1142 | ||
1143 | static inline u8 bnx2x_is_pcie_pending(struct pci_dev *dev) | 1143 | static u8 bnx2x_is_pcie_pending(struct pci_dev *dev) |
1144 | { | 1144 | { |
1145 | int pos; | 1145 | int pos; |
1146 | u16 status; | 1146 | u16 status; |
@@ -1550,7 +1550,7 @@ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource) | |||
1550 | * Returns the recovery leader resource id according to the engine this function | 1550 | * Returns the recovery leader resource id according to the engine this function |
1551 | * belongs to. Currently only only 2 engines is supported. | 1551 | * belongs to. Currently only only 2 engines is supported. |
1552 | */ | 1552 | */ |
1553 | static inline int bnx2x_get_leader_lock_resource(struct bnx2x *bp) | 1553 | static int bnx2x_get_leader_lock_resource(struct bnx2x *bp) |
1554 | { | 1554 | { |
1555 | if (BP_PATH(bp)) | 1555 | if (BP_PATH(bp)) |
1556 | return HW_LOCK_RESOURCE_RECOVERY_LEADER_1; | 1556 | return HW_LOCK_RESOURCE_RECOVERY_LEADER_1; |
@@ -1563,9 +1563,9 @@ static inline int bnx2x_get_leader_lock_resource(struct bnx2x *bp) | |||
1563 | * | 1563 | * |
1564 | * @bp: driver handle | 1564 | * @bp: driver handle |
1565 | * | 1565 | * |
1566 | * Tries to aquire a leader lock for cuurent engine. | 1566 | * Tries to aquire a leader lock for current engine. |
1567 | */ | 1567 | */ |
1568 | static inline bool bnx2x_trylock_leader_lock(struct bnx2x *bp) | 1568 | static bool bnx2x_trylock_leader_lock(struct bnx2x *bp) |
1569 | { | 1569 | { |
1570 | return bnx2x_trylock_hw_lock(bp, bnx2x_get_leader_lock_resource(bp)); | 1570 | return bnx2x_trylock_hw_lock(bp, bnx2x_get_leader_lock_resource(bp)); |
1571 | } | 1571 | } |
@@ -2331,6 +2331,35 @@ static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) | |||
2331 | "rate shaping and fairness are disabled\n"); | 2331 | "rate shaping and fairness are disabled\n"); |
2332 | } | 2332 | } |
2333 | 2333 | ||
2334 | static void storm_memset_cmng(struct bnx2x *bp, | ||
2335 | struct cmng_init *cmng, | ||
2336 | u8 port) | ||
2337 | { | ||
2338 | int vn; | ||
2339 | size_t size = sizeof(struct cmng_struct_per_port); | ||
2340 | |||
2341 | u32 addr = BAR_XSTRORM_INTMEM + | ||
2342 | XSTORM_CMNG_PER_PORT_VARS_OFFSET(port); | ||
2343 | |||
2344 | __storm_memset_struct(bp, addr, size, (u32 *)&cmng->port); | ||
2345 | |||
2346 | for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { | ||
2347 | int func = func_by_vn(bp, vn); | ||
2348 | |||
2349 | addr = BAR_XSTRORM_INTMEM + | ||
2350 | XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func); | ||
2351 | size = sizeof(struct rate_shaping_vars_per_vn); | ||
2352 | __storm_memset_struct(bp, addr, size, | ||
2353 | (u32 *)&cmng->vnic.vnic_max_rate[vn]); | ||
2354 | |||
2355 | addr = BAR_XSTRORM_INTMEM + | ||
2356 | XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func); | ||
2357 | size = sizeof(struct fairness_vars_per_vn); | ||
2358 | __storm_memset_struct(bp, addr, size, | ||
2359 | (u32 *)&cmng->vnic.vnic_min_rate[vn]); | ||
2360 | } | ||
2361 | } | ||
2362 | |||
2334 | /* This function is called upon link interrupt */ | 2363 | /* This function is called upon link interrupt */ |
2335 | static void bnx2x_link_attn(struct bnx2x *bp) | 2364 | static void bnx2x_link_attn(struct bnx2x *bp) |
2336 | { | 2365 | { |
@@ -2671,6 +2700,18 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) | |||
2671 | } | 2700 | } |
2672 | 2701 | ||
2673 | 2702 | ||
2703 | static void storm_memset_func_cfg(struct bnx2x *bp, | ||
2704 | struct tstorm_eth_function_common_config *tcfg, | ||
2705 | u16 abs_fid) | ||
2706 | { | ||
2707 | size_t size = sizeof(struct tstorm_eth_function_common_config); | ||
2708 | |||
2709 | u32 addr = BAR_TSTRORM_INTMEM + | ||
2710 | TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(abs_fid); | ||
2711 | |||
2712 | __storm_memset_struct(bp, addr, size, (u32 *)tcfg); | ||
2713 | } | ||
2714 | |||
2674 | void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) | 2715 | void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) |
2675 | { | 2716 | { |
2676 | if (CHIP_IS_E1x(bp)) { | 2717 | if (CHIP_IS_E1x(bp)) { |
@@ -2700,9 +2741,9 @@ void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) | |||
2700 | * | 2741 | * |
2701 | * Return the flags that are common for the Tx-only and not normal connections. | 2742 | * Return the flags that are common for the Tx-only and not normal connections. |
2702 | */ | 2743 | */ |
2703 | static inline unsigned long bnx2x_get_common_flags(struct bnx2x *bp, | 2744 | static unsigned long bnx2x_get_common_flags(struct bnx2x *bp, |
2704 | struct bnx2x_fastpath *fp, | 2745 | struct bnx2x_fastpath *fp, |
2705 | bool zero_stats) | 2746 | bool zero_stats) |
2706 | { | 2747 | { |
2707 | unsigned long flags = 0; | 2748 | unsigned long flags = 0; |
2708 | 2749 | ||
@@ -2722,9 +2763,9 @@ static inline unsigned long bnx2x_get_common_flags(struct bnx2x *bp, | |||
2722 | return flags; | 2763 | return flags; |
2723 | } | 2764 | } |
2724 | 2765 | ||
2725 | static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp, | 2766 | static unsigned long bnx2x_get_q_flags(struct bnx2x *bp, |
2726 | struct bnx2x_fastpath *fp, | 2767 | struct bnx2x_fastpath *fp, |
2727 | bool leading) | 2768 | bool leading) |
2728 | { | 2769 | { |
2729 | unsigned long flags = 0; | 2770 | unsigned long flags = 0; |
2730 | 2771 | ||
@@ -3117,7 +3158,7 @@ static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp) | |||
3117 | * configure FW | 3158 | * configure FW |
3118 | * notify others function about the change | 3159 | * notify others function about the change |
3119 | */ | 3160 | */ |
3120 | static inline void bnx2x_config_mf_bw(struct bnx2x *bp) | 3161 | static void bnx2x_config_mf_bw(struct bnx2x *bp) |
3121 | { | 3162 | { |
3122 | if (bp->link_vars.link_up) { | 3163 | if (bp->link_vars.link_up) { |
3123 | bnx2x_cmng_fns_init(bp, true, CMNG_FNS_MINMAX); | 3164 | bnx2x_cmng_fns_init(bp, true, CMNG_FNS_MINMAX); |
@@ -3126,7 +3167,7 @@ static inline void bnx2x_config_mf_bw(struct bnx2x *bp) | |||
3126 | storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); | 3167 | storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); |
3127 | } | 3168 | } |
3128 | 3169 | ||
3129 | static inline void bnx2x_set_mf_bw(struct bnx2x *bp) | 3170 | static void bnx2x_set_mf_bw(struct bnx2x *bp) |
3130 | { | 3171 | { |
3131 | bnx2x_config_mf_bw(bp); | 3172 | bnx2x_config_mf_bw(bp); |
3132 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW_ACK, 0); | 3173 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW_ACK, 0); |
@@ -3213,7 +3254,7 @@ static void bnx2x_dcc_event(struct bnx2x *bp, u32 dcc_event) | |||
3213 | } | 3254 | } |
3214 | 3255 | ||
3215 | /* must be called under the spq lock */ | 3256 | /* must be called under the spq lock */ |
3216 | static inline struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp) | 3257 | static struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp) |
3217 | { | 3258 | { |
3218 | struct eth_spe *next_spe = bp->spq_prod_bd; | 3259 | struct eth_spe *next_spe = bp->spq_prod_bd; |
3219 | 3260 | ||
@@ -3229,7 +3270,7 @@ static inline struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp) | |||
3229 | } | 3270 | } |
3230 | 3271 | ||
3231 | /* must be called under the spq lock */ | 3272 | /* must be called under the spq lock */ |
3232 | static inline void bnx2x_sp_prod_update(struct bnx2x *bp) | 3273 | static void bnx2x_sp_prod_update(struct bnx2x *bp) |
3233 | { | 3274 | { |
3234 | int func = BP_FUNC(bp); | 3275 | int func = BP_FUNC(bp); |
3235 | 3276 | ||
@@ -3251,7 +3292,7 @@ static inline void bnx2x_sp_prod_update(struct bnx2x *bp) | |||
3251 | * @cmd: command to check | 3292 | * @cmd: command to check |
3252 | * @cmd_type: command type | 3293 | * @cmd_type: command type |
3253 | */ | 3294 | */ |
3254 | static inline bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type) | 3295 | static bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type) |
3255 | { | 3296 | { |
3256 | if ((cmd_type == NONE_CONNECTION_TYPE) || | 3297 | if ((cmd_type == NONE_CONNECTION_TYPE) || |
3257 | (cmd == RAMROD_CMD_ID_ETH_FORWARD_SETUP) || | 3298 | (cmd == RAMROD_CMD_ID_ETH_FORWARD_SETUP) || |
@@ -3385,7 +3426,7 @@ static void bnx2x_release_alr(struct bnx2x *bp) | |||
3385 | #define BNX2X_DEF_SB_ATT_IDX 0x0001 | 3426 | #define BNX2X_DEF_SB_ATT_IDX 0x0001 |
3386 | #define BNX2X_DEF_SB_IDX 0x0002 | 3427 | #define BNX2X_DEF_SB_IDX 0x0002 |
3387 | 3428 | ||
3388 | static inline u16 bnx2x_update_dsb_idx(struct bnx2x *bp) | 3429 | static u16 bnx2x_update_dsb_idx(struct bnx2x *bp) |
3389 | { | 3430 | { |
3390 | struct host_sp_status_block *def_sb = bp->def_status_blk; | 3431 | struct host_sp_status_block *def_sb = bp->def_status_blk; |
3391 | u16 rc = 0; | 3432 | u16 rc = 0; |
@@ -3517,7 +3558,7 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted) | |||
3517 | } | 3558 | } |
3518 | } | 3559 | } |
3519 | 3560 | ||
3520 | static inline void bnx2x_fan_failure(struct bnx2x *bp) | 3561 | static void bnx2x_fan_failure(struct bnx2x *bp) |
3521 | { | 3562 | { |
3522 | int port = BP_PORT(bp); | 3563 | int port = BP_PORT(bp); |
3523 | u32 ext_phy_config; | 3564 | u32 ext_phy_config; |
@@ -3547,7 +3588,7 @@ static inline void bnx2x_fan_failure(struct bnx2x *bp) | |||
3547 | 3588 | ||
3548 | } | 3589 | } |
3549 | 3590 | ||
3550 | static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) | 3591 | static void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) |
3551 | { | 3592 | { |
3552 | int port = BP_PORT(bp); | 3593 | int port = BP_PORT(bp); |
3553 | int reg_offset; | 3594 | int reg_offset; |
@@ -3587,7 +3628,7 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) | |||
3587 | } | 3628 | } |
3588 | } | 3629 | } |
3589 | 3630 | ||
3590 | static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn) | 3631 | static void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn) |
3591 | { | 3632 | { |
3592 | u32 val; | 3633 | u32 val; |
3593 | 3634 | ||
@@ -3618,7 +3659,7 @@ static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn) | |||
3618 | } | 3659 | } |
3619 | } | 3660 | } |
3620 | 3661 | ||
3621 | static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) | 3662 | static void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) |
3622 | { | 3663 | { |
3623 | u32 val; | 3664 | u32 val; |
3624 | 3665 | ||
@@ -3662,7 +3703,7 @@ static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) | |||
3662 | } | 3703 | } |
3663 | } | 3704 | } |
3664 | 3705 | ||
3665 | static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) | 3706 | static void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) |
3666 | { | 3707 | { |
3667 | u32 val; | 3708 | u32 val; |
3668 | 3709 | ||
@@ -3792,7 +3833,7 @@ void bnx2x_set_reset_global(struct bnx2x *bp) | |||
3792 | * | 3833 | * |
3793 | * Should be run under rtnl lock | 3834 | * Should be run under rtnl lock |
3794 | */ | 3835 | */ |
3795 | static inline void bnx2x_clear_reset_global(struct bnx2x *bp) | 3836 | static void bnx2x_clear_reset_global(struct bnx2x *bp) |
3796 | { | 3837 | { |
3797 | u32 val; | 3838 | u32 val; |
3798 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); | 3839 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); |
@@ -3806,7 +3847,7 @@ static inline void bnx2x_clear_reset_global(struct bnx2x *bp) | |||
3806 | * | 3847 | * |
3807 | * should be run under rtnl lock | 3848 | * should be run under rtnl lock |
3808 | */ | 3849 | */ |
3809 | static inline bool bnx2x_reset_is_global(struct bnx2x *bp) | 3850 | static bool bnx2x_reset_is_global(struct bnx2x *bp) |
3810 | { | 3851 | { |
3811 | u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); | 3852 | u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); |
3812 | 3853 | ||
@@ -3819,7 +3860,7 @@ static inline bool bnx2x_reset_is_global(struct bnx2x *bp) | |||
3819 | * | 3860 | * |
3820 | * Should be run under rtnl lock | 3861 | * Should be run under rtnl lock |
3821 | */ | 3862 | */ |
3822 | static inline void bnx2x_set_reset_done(struct bnx2x *bp) | 3863 | static void bnx2x_set_reset_done(struct bnx2x *bp) |
3823 | { | 3864 | { |
3824 | u32 val; | 3865 | u32 val; |
3825 | u32 bit = BP_PATH(bp) ? | 3866 | u32 bit = BP_PATH(bp) ? |
@@ -3944,7 +3985,7 @@ bool bnx2x_clear_pf_load(struct bnx2x *bp) | |||
3944 | * | 3985 | * |
3945 | * should be run under rtnl lock | 3986 | * should be run under rtnl lock |
3946 | */ | 3987 | */ |
3947 | static inline bool bnx2x_get_load_status(struct bnx2x *bp, int engine) | 3988 | static bool bnx2x_get_load_status(struct bnx2x *bp, int engine) |
3948 | { | 3989 | { |
3949 | u32 mask = (engine ? BNX2X_PATH1_LOAD_CNT_MASK : | 3990 | u32 mask = (engine ? BNX2X_PATH1_LOAD_CNT_MASK : |
3950 | BNX2X_PATH0_LOAD_CNT_MASK); | 3991 | BNX2X_PATH0_LOAD_CNT_MASK); |
@@ -3965,7 +4006,7 @@ static inline bool bnx2x_get_load_status(struct bnx2x *bp, int engine) | |||
3965 | /* | 4006 | /* |
3966 | * Reset the load status for the current engine. | 4007 | * Reset the load status for the current engine. |
3967 | */ | 4008 | */ |
3968 | static inline void bnx2x_clear_load_status(struct bnx2x *bp) | 4009 | static void bnx2x_clear_load_status(struct bnx2x *bp) |
3969 | { | 4010 | { |
3970 | u32 val; | 4011 | u32 val; |
3971 | u32 mask = (BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK : | 4012 | u32 mask = (BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK : |
@@ -3976,13 +4017,13 @@ static inline void bnx2x_clear_load_status(struct bnx2x *bp) | |||
3976 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); | 4017 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); |
3977 | } | 4018 | } |
3978 | 4019 | ||
3979 | static inline void _print_next_block(int idx, const char *blk) | 4020 | static void _print_next_block(int idx, const char *blk) |
3980 | { | 4021 | { |
3981 | pr_cont("%s%s", idx ? ", " : "", blk); | 4022 | pr_cont("%s%s", idx ? ", " : "", blk); |
3982 | } | 4023 | } |
3983 | 4024 | ||
3984 | static inline int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, | 4025 | static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, |
3985 | bool print) | 4026 | bool print) |
3986 | { | 4027 | { |
3987 | int i = 0; | 4028 | int i = 0; |
3988 | u32 cur_bit = 0; | 4029 | u32 cur_bit = 0; |
@@ -4029,8 +4070,8 @@ static inline int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, | |||
4029 | return par_num; | 4070 | return par_num; |
4030 | } | 4071 | } |
4031 | 4072 | ||
4032 | static inline int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, | 4073 | static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, |
4033 | bool *global, bool print) | 4074 | bool *global, bool print) |
4034 | { | 4075 | { |
4035 | int i = 0; | 4076 | int i = 0; |
4036 | u32 cur_bit = 0; | 4077 | u32 cur_bit = 0; |
@@ -4115,8 +4156,8 @@ static inline int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, | |||
4115 | return par_num; | 4156 | return par_num; |
4116 | } | 4157 | } |
4117 | 4158 | ||
4118 | static inline int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, | 4159 | static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, |
4119 | bool print) | 4160 | bool print) |
4120 | { | 4161 | { |
4121 | int i = 0; | 4162 | int i = 0; |
4122 | u32 cur_bit = 0; | 4163 | u32 cur_bit = 0; |
@@ -4167,8 +4208,8 @@ static inline int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, | |||
4167 | return par_num; | 4208 | return par_num; |
4168 | } | 4209 | } |
4169 | 4210 | ||
4170 | static inline int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, | 4211 | static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, |
4171 | bool *global, bool print) | 4212 | bool *global, bool print) |
4172 | { | 4213 | { |
4173 | int i = 0; | 4214 | int i = 0; |
4174 | u32 cur_bit = 0; | 4215 | u32 cur_bit = 0; |
@@ -4209,8 +4250,8 @@ static inline int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, | |||
4209 | return par_num; | 4250 | return par_num; |
4210 | } | 4251 | } |
4211 | 4252 | ||
4212 | static inline int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, | 4253 | static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, |
4213 | bool print) | 4254 | bool print) |
4214 | { | 4255 | { |
4215 | int i = 0; | 4256 | int i = 0; |
4216 | u32 cur_bit = 0; | 4257 | u32 cur_bit = 0; |
@@ -4236,8 +4277,8 @@ static inline int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, | |||
4236 | return par_num; | 4277 | return par_num; |
4237 | } | 4278 | } |
4238 | 4279 | ||
4239 | static inline bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, | 4280 | static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, |
4240 | u32 *sig) | 4281 | u32 *sig) |
4241 | { | 4282 | { |
4242 | if ((sig[0] & HW_PRTY_ASSERT_SET_0) || | 4283 | if ((sig[0] & HW_PRTY_ASSERT_SET_0) || |
4243 | (sig[1] & HW_PRTY_ASSERT_SET_1) || | 4284 | (sig[1] & HW_PRTY_ASSERT_SET_1) || |
@@ -4308,7 +4349,7 @@ bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print) | |||
4308 | } | 4349 | } |
4309 | 4350 | ||
4310 | 4351 | ||
4311 | static inline void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) | 4352 | static void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) |
4312 | { | 4353 | { |
4313 | u32 val; | 4354 | u32 val; |
4314 | if (attn & AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT) { | 4355 | if (attn & AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT) { |
@@ -4500,7 +4541,7 @@ void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, | |||
4500 | igu_addr); | 4541 | igu_addr); |
4501 | } | 4542 | } |
4502 | 4543 | ||
4503 | static inline void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod) | 4544 | static void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod) |
4504 | { | 4545 | { |
4505 | /* No memory barriers */ | 4546 | /* No memory barriers */ |
4506 | storm_memset_eq_prod(bp, prod, BP_FUNC(bp)); | 4547 | storm_memset_eq_prod(bp, prod, BP_FUNC(bp)); |
@@ -4531,7 +4572,7 @@ static int bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid, | |||
4531 | } | 4572 | } |
4532 | #endif | 4573 | #endif |
4533 | 4574 | ||
4534 | static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp) | 4575 | static void bnx2x_handle_mcast_eqe(struct bnx2x *bp) |
4535 | { | 4576 | { |
4536 | struct bnx2x_mcast_ramrod_params rparam; | 4577 | struct bnx2x_mcast_ramrod_params rparam; |
4537 | int rc; | 4578 | int rc; |
@@ -4556,8 +4597,8 @@ static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp) | |||
4556 | netif_addr_unlock_bh(bp->dev); | 4597 | netif_addr_unlock_bh(bp->dev); |
4557 | } | 4598 | } |
4558 | 4599 | ||
4559 | static inline void bnx2x_handle_classification_eqe(struct bnx2x *bp, | 4600 | static void bnx2x_handle_classification_eqe(struct bnx2x *bp, |
4560 | union event_ring_elem *elem) | 4601 | union event_ring_elem *elem) |
4561 | { | 4602 | { |
4562 | unsigned long ramrod_flags = 0; | 4603 | unsigned long ramrod_flags = 0; |
4563 | int rc = 0; | 4604 | int rc = 0; |
@@ -4604,7 +4645,7 @@ static inline void bnx2x_handle_classification_eqe(struct bnx2x *bp, | |||
4604 | static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start); | 4645 | static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start); |
4605 | #endif | 4646 | #endif |
4606 | 4647 | ||
4607 | static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) | 4648 | static void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) |
4608 | { | 4649 | { |
4609 | netif_addr_lock_bh(bp->dev); | 4650 | netif_addr_lock_bh(bp->dev); |
4610 | 4651 | ||
@@ -4625,7 +4666,7 @@ static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) | |||
4625 | netif_addr_unlock_bh(bp->dev); | 4666 | netif_addr_unlock_bh(bp->dev); |
4626 | } | 4667 | } |
4627 | 4668 | ||
4628 | static inline void bnx2x_after_afex_vif_lists(struct bnx2x *bp, | 4669 | static void bnx2x_after_afex_vif_lists(struct bnx2x *bp, |
4629 | union event_ring_elem *elem) | 4670 | union event_ring_elem *elem) |
4630 | { | 4671 | { |
4631 | if (elem->message.data.vif_list_event.echo == VIF_LIST_RULE_GET) { | 4672 | if (elem->message.data.vif_list_event.echo == VIF_LIST_RULE_GET) { |
@@ -4642,7 +4683,7 @@ static inline void bnx2x_after_afex_vif_lists(struct bnx2x *bp, | |||
4642 | } | 4683 | } |
4643 | 4684 | ||
4644 | /* called with rtnl_lock */ | 4685 | /* called with rtnl_lock */ |
4645 | static inline void bnx2x_after_function_update(struct bnx2x *bp) | 4686 | static void bnx2x_after_function_update(struct bnx2x *bp) |
4646 | { | 4687 | { |
4647 | int q, rc; | 4688 | int q, rc; |
4648 | struct bnx2x_fastpath *fp; | 4689 | struct bnx2x_fastpath *fp; |
@@ -4712,7 +4753,7 @@ static inline void bnx2x_after_function_update(struct bnx2x *bp) | |||
4712 | #endif /* BCM_CNIC */ | 4753 | #endif /* BCM_CNIC */ |
4713 | } | 4754 | } |
4714 | 4755 | ||
4715 | static inline struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj( | 4756 | static struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj( |
4716 | struct bnx2x *bp, u32 cid) | 4757 | struct bnx2x *bp, u32 cid) |
4717 | { | 4758 | { |
4718 | DP(BNX2X_MSG_SP, "retrieving fp from cid %d\n", cid); | 4759 | DP(BNX2X_MSG_SP, "retrieving fp from cid %d\n", cid); |
@@ -5056,7 +5097,7 @@ static void bnx2x_timer(unsigned long data) | |||
5056 | * nic init service functions | 5097 | * nic init service functions |
5057 | */ | 5098 | */ |
5058 | 5099 | ||
5059 | static inline void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) | 5100 | static void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) |
5060 | { | 5101 | { |
5061 | u32 i; | 5102 | u32 i; |
5062 | if (!(len%4) && !(addr%4)) | 5103 | if (!(len%4) && !(addr%4)) |
@@ -5069,10 +5110,10 @@ static inline void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) | |||
5069 | } | 5110 | } |
5070 | 5111 | ||
5071 | /* helper: writes FP SP data to FW - data_size in dwords */ | 5112 | /* helper: writes FP SP data to FW - data_size in dwords */ |
5072 | static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp, | 5113 | static void bnx2x_wr_fp_sb_data(struct bnx2x *bp, |
5073 | int fw_sb_id, | 5114 | int fw_sb_id, |
5074 | u32 *sb_data_p, | 5115 | u32 *sb_data_p, |
5075 | u32 data_size) | 5116 | u32 data_size) |
5076 | { | 5117 | { |
5077 | int index; | 5118 | int index; |
5078 | for (index = 0; index < data_size; index++) | 5119 | for (index = 0; index < data_size; index++) |
@@ -5082,7 +5123,7 @@ static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp, | |||
5082 | *(sb_data_p + index)); | 5123 | *(sb_data_p + index)); |
5083 | } | 5124 | } |
5084 | 5125 | ||
5085 | static inline void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id) | 5126 | static void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id) |
5086 | { | 5127 | { |
5087 | u32 *sb_data_p; | 5128 | u32 *sb_data_p; |
5088 | u32 data_size = 0; | 5129 | u32 data_size = 0; |
@@ -5115,7 +5156,7 @@ static inline void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id) | |||
5115 | } | 5156 | } |
5116 | 5157 | ||
5117 | /* helper: writes SP SB data to FW */ | 5158 | /* helper: writes SP SB data to FW */ |
5118 | static inline void bnx2x_wr_sp_sb_data(struct bnx2x *bp, | 5159 | static void bnx2x_wr_sp_sb_data(struct bnx2x *bp, |
5119 | struct hc_sp_status_block_data *sp_sb_data) | 5160 | struct hc_sp_status_block_data *sp_sb_data) |
5120 | { | 5161 | { |
5121 | int func = BP_FUNC(bp); | 5162 | int func = BP_FUNC(bp); |
@@ -5127,7 +5168,7 @@ static inline void bnx2x_wr_sp_sb_data(struct bnx2x *bp, | |||
5127 | *((u32 *)sp_sb_data + i)); | 5168 | *((u32 *)sp_sb_data + i)); |
5128 | } | 5169 | } |
5129 | 5170 | ||
5130 | static inline void bnx2x_zero_sp_sb(struct bnx2x *bp) | 5171 | static void bnx2x_zero_sp_sb(struct bnx2x *bp) |
5131 | { | 5172 | { |
5132 | int func = BP_FUNC(bp); | 5173 | int func = BP_FUNC(bp); |
5133 | struct hc_sp_status_block_data sp_sb_data; | 5174 | struct hc_sp_status_block_data sp_sb_data; |
@@ -5148,8 +5189,7 @@ static inline void bnx2x_zero_sp_sb(struct bnx2x *bp) | |||
5148 | } | 5189 | } |
5149 | 5190 | ||
5150 | 5191 | ||
5151 | static inline | 5192 | static void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, |
5152 | void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, | ||
5153 | int igu_sb_id, int igu_seg_id) | 5193 | int igu_sb_id, int igu_seg_id) |
5154 | { | 5194 | { |
5155 | hc_sm->igu_sb_id = igu_sb_id; | 5195 | hc_sm->igu_sb_id = igu_sb_id; |
@@ -5160,8 +5200,7 @@ void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, | |||
5160 | 5200 | ||
5161 | 5201 | ||
5162 | /* allocates state machine ids. */ | 5202 | /* allocates state machine ids. */ |
5163 | static inline | 5203 | static void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) |
5164 | void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) | ||
5165 | { | 5204 | { |
5166 | /* zero out state machine indices */ | 5205 | /* zero out state machine indices */ |
5167 | /* rx indices */ | 5206 | /* rx indices */ |
@@ -5569,7 +5608,7 @@ static inline u8 bnx2x_fp_fw_sb_id(struct bnx2x_fastpath *fp) | |||
5569 | return fp->bp->base_fw_ndsb + fp->index + CNIC_PRESENT; | 5608 | return fp->bp->base_fw_ndsb + fp->index + CNIC_PRESENT; |
5570 | } | 5609 | } |
5571 | 5610 | ||
5572 | static inline u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp) | 5611 | static u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp) |
5573 | { | 5612 | { |
5574 | if (CHIP_IS_E1x(fp->bp)) | 5613 | if (CHIP_IS_E1x(fp->bp)) |
5575 | return BP_L_ID(fp->bp) + fp->index; | 5614 | return BP_L_ID(fp->bp) + fp->index; |
@@ -5630,6 +5669,43 @@ static void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx) | |||
5630 | bnx2x_update_fpsb_idx(fp); | 5669 | bnx2x_update_fpsb_idx(fp); |
5631 | } | 5670 | } |
5632 | 5671 | ||
5672 | static void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata) | ||
5673 | { | ||
5674 | int i; | ||
5675 | |||
5676 | for (i = 1; i <= NUM_TX_RINGS; i++) { | ||
5677 | struct eth_tx_next_bd *tx_next_bd = | ||
5678 | &txdata->tx_desc_ring[TX_DESC_CNT * i - 1].next_bd; | ||
5679 | |||
5680 | tx_next_bd->addr_hi = | ||
5681 | cpu_to_le32(U64_HI(txdata->tx_desc_mapping + | ||
5682 | BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); | ||
5683 | tx_next_bd->addr_lo = | ||
5684 | cpu_to_le32(U64_LO(txdata->tx_desc_mapping + | ||
5685 | BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); | ||
5686 | } | ||
5687 | |||
5688 | SET_FLAG(txdata->tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1); | ||
5689 | txdata->tx_db.data.zero_fill1 = 0; | ||
5690 | txdata->tx_db.data.prod = 0; | ||
5691 | |||
5692 | txdata->tx_pkt_prod = 0; | ||
5693 | txdata->tx_pkt_cons = 0; | ||
5694 | txdata->tx_bd_prod = 0; | ||
5695 | txdata->tx_bd_cons = 0; | ||
5696 | txdata->tx_pkt = 0; | ||
5697 | } | ||
5698 | |||
5699 | static void bnx2x_init_tx_rings(struct bnx2x *bp) | ||
5700 | { | ||
5701 | int i; | ||
5702 | u8 cos; | ||
5703 | |||
5704 | for_each_tx_queue(bp, i) | ||
5705 | for_each_cos_in_tx_queue(&bp->fp[i], cos) | ||
5706 | bnx2x_init_tx_ring_one(&bp->fp[i].txdata[cos]); | ||
5707 | } | ||
5708 | |||
5633 | void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) | 5709 | void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) |
5634 | { | 5710 | { |
5635 | int i; | 5711 | int i; |
@@ -6154,7 +6230,7 @@ void bnx2x_pf_disable(struct bnx2x *bp) | |||
6154 | REG_WR(bp, CFC_REG_WEAK_ENABLE_PF, 0); | 6230 | REG_WR(bp, CFC_REG_WEAK_ENABLE_PF, 0); |
6155 | } | 6231 | } |
6156 | 6232 | ||
6157 | static inline void bnx2x__common_init_phy(struct bnx2x *bp) | 6233 | static void bnx2x__common_init_phy(struct bnx2x *bp) |
6158 | { | 6234 | { |
6159 | u32 shmem_base[2], shmem2_base[2]; | 6235 | u32 shmem_base[2], shmem2_base[2]; |
6160 | shmem_base[0] = bp->common.shmem_base; | 6236 | shmem_base[0] = bp->common.shmem_base; |
@@ -6882,12 +6958,59 @@ static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) | |||
6882 | REG_WR_DMAE(bp, reg, wb_write, 2); | 6958 | REG_WR_DMAE(bp, reg, wb_write, 2); |
6883 | } | 6959 | } |
6884 | 6960 | ||
6885 | static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) | 6961 | static void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, |
6962 | u8 idu_sb_id, bool is_Pf) | ||
6963 | { | ||
6964 | u32 data, ctl, cnt = 100; | ||
6965 | u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA; | ||
6966 | u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; | ||
6967 | u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4; | ||
6968 | u32 sb_bit = 1 << (idu_sb_id%32); | ||
6969 | u32 func_encode = func | (is_Pf ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT; | ||
6970 | u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id; | ||
6971 | |||
6972 | /* Not supported in BC mode */ | ||
6973 | if (CHIP_INT_MODE_IS_BC(bp)) | ||
6974 | return; | ||
6975 | |||
6976 | data = (IGU_USE_REGISTER_cstorm_type_0_sb_cleanup | ||
6977 | << IGU_REGULAR_CLEANUP_TYPE_SHIFT) | | ||
6978 | IGU_REGULAR_CLEANUP_SET | | ||
6979 | IGU_REGULAR_BCLEANUP; | ||
6980 | |||
6981 | ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT | | ||
6982 | func_encode << IGU_CTRL_REG_FID_SHIFT | | ||
6983 | IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT; | ||
6984 | |||
6985 | DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", | ||
6986 | data, igu_addr_data); | ||
6987 | REG_WR(bp, igu_addr_data, data); | ||
6988 | mmiowb(); | ||
6989 | barrier(); | ||
6990 | DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", | ||
6991 | ctl, igu_addr_ctl); | ||
6992 | REG_WR(bp, igu_addr_ctl, ctl); | ||
6993 | mmiowb(); | ||
6994 | barrier(); | ||
6995 | |||
6996 | /* wait for clean up to finish */ | ||
6997 | while (!(REG_RD(bp, igu_addr_ack) & sb_bit) && --cnt) | ||
6998 | msleep(20); | ||
6999 | |||
7000 | |||
7001 | if (!(REG_RD(bp, igu_addr_ack) & sb_bit)) { | ||
7002 | DP(NETIF_MSG_HW, | ||
7003 | "Unable to finish IGU cleanup: idu_sb_id %d offset %d bit %d (cnt %d)\n", | ||
7004 | idu_sb_id, idu_sb_id/32, idu_sb_id%32, cnt); | ||
7005 | } | ||
7006 | } | ||
7007 | |||
7008 | static void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) | ||
6886 | { | 7009 | { |
6887 | bnx2x_igu_clear_sb_gen(bp, BP_FUNC(bp), idu_sb_id, true /*PF*/); | 7010 | bnx2x_igu_clear_sb_gen(bp, BP_FUNC(bp), idu_sb_id, true /*PF*/); |
6888 | } | 7011 | } |
6889 | 7012 | ||
6890 | static inline void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func) | 7013 | static void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func) |
6891 | { | 7014 | { |
6892 | u32 i, base = FUNC_ILT_BASE(func); | 7015 | u32 i, base = FUNC_ILT_BASE(func); |
6893 | for (i = base; i < base + ILT_PER_FUNC; i++) | 7016 | for (i = base; i < base + ILT_PER_FUNC; i++) |
@@ -7238,7 +7361,7 @@ void bnx2x_free_mem(struct bnx2x *bp) | |||
7238 | BCM_PAGE_SIZE * NUM_EQ_PAGES); | 7361 | BCM_PAGE_SIZE * NUM_EQ_PAGES); |
7239 | } | 7362 | } |
7240 | 7363 | ||
7241 | static inline int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) | 7364 | static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) |
7242 | { | 7365 | { |
7243 | int num_groups; | 7366 | int num_groups; |
7244 | int is_fcoe_stats = NO_FCOE(bp) ? 0 : 1; | 7367 | int is_fcoe_stats = NO_FCOE(bp) ? 0 : 1; |
@@ -7604,7 +7727,7 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) | |||
7604 | * - HC configuration | 7727 | * - HC configuration |
7605 | * - Queue's CDU context | 7728 | * - Queue's CDU context |
7606 | */ | 7729 | */ |
7607 | static inline void bnx2x_pf_q_prep_init(struct bnx2x *bp, | 7730 | static void bnx2x_pf_q_prep_init(struct bnx2x *bp, |
7608 | struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params) | 7731 | struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params) |
7609 | { | 7732 | { |
7610 | 7733 | ||
@@ -7954,7 +8077,7 @@ static void bnx2x_reset_port(struct bnx2x *bp) | |||
7954 | /* TODO: Close Doorbell port? */ | 8077 | /* TODO: Close Doorbell port? */ |
7955 | } | 8078 | } |
7956 | 8079 | ||
7957 | static inline int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code) | 8080 | static int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code) |
7958 | { | 8081 | { |
7959 | struct bnx2x_func_state_params func_params = {NULL}; | 8082 | struct bnx2x_func_state_params func_params = {NULL}; |
7960 | 8083 | ||
@@ -7969,7 +8092,7 @@ static inline int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code) | |||
7969 | return bnx2x_func_state_change(bp, &func_params); | 8092 | return bnx2x_func_state_change(bp, &func_params); |
7970 | } | 8093 | } |
7971 | 8094 | ||
7972 | static inline int bnx2x_func_stop(struct bnx2x *bp) | 8095 | static int bnx2x_func_stop(struct bnx2x *bp) |
7973 | { | 8096 | { |
7974 | struct bnx2x_func_state_params func_params = {NULL}; | 8097 | struct bnx2x_func_state_params func_params = {NULL}; |
7975 | int rc; | 8098 | int rc; |
@@ -8084,7 +8207,7 @@ void bnx2x_send_unload_done(struct bnx2x *bp) | |||
8084 | bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); | 8207 | bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); |
8085 | } | 8208 | } |
8086 | 8209 | ||
8087 | static inline int bnx2x_func_wait_started(struct bnx2x *bp) | 8210 | static int bnx2x_func_wait_started(struct bnx2x *bp) |
8088 | { | 8211 | { |
8089 | int tout = 50; | 8212 | int tout = 50; |
8090 | int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; | 8213 | int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; |
@@ -8394,7 +8517,7 @@ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val) | |||
8394 | * | 8517 | * |
8395 | * @bp: driver handle | 8518 | * @bp: driver handle |
8396 | */ | 8519 | */ |
8397 | static inline void bnx2x_mcp_wait_one(struct bnx2x *bp) | 8520 | static void bnx2x_mcp_wait_one(struct bnx2x *bp) |
8398 | { | 8521 | { |
8399 | /* special handling for emulation and FPGA, | 8522 | /* special handling for emulation and FPGA, |
8400 | wait 10 times longer */ | 8523 | wait 10 times longer */ |
@@ -8730,7 +8853,7 @@ exit_leader_reset: | |||
8730 | return rc; | 8853 | return rc; |
8731 | } | 8854 | } |
8732 | 8855 | ||
8733 | static inline void bnx2x_recovery_failed(struct bnx2x *bp) | 8856 | static void bnx2x_recovery_failed(struct bnx2x *bp) |
8734 | { | 8857 | { |
8735 | netdev_err(bp->dev, "Recovery has failed. Power cycle is needed.\n"); | 8858 | netdev_err(bp->dev, "Recovery has failed. Power cycle is needed.\n"); |
8736 | 8859 | ||
@@ -10803,8 +10926,8 @@ static int bnx2x_close(struct net_device *dev) | |||
10803 | return 0; | 10926 | return 0; |
10804 | } | 10927 | } |
10805 | 10928 | ||
10806 | static inline int bnx2x_init_mcast_macs_list(struct bnx2x *bp, | 10929 | static int bnx2x_init_mcast_macs_list(struct bnx2x *bp, |
10807 | struct bnx2x_mcast_ramrod_params *p) | 10930 | struct bnx2x_mcast_ramrod_params *p) |
10808 | { | 10931 | { |
10809 | int mc_count = netdev_mc_count(bp->dev); | 10932 | int mc_count = netdev_mc_count(bp->dev); |
10810 | struct bnx2x_mcast_list_elem *mc_mac = | 10933 | struct bnx2x_mcast_list_elem *mc_mac = |
@@ -10827,7 +10950,7 @@ static inline int bnx2x_init_mcast_macs_list(struct bnx2x *bp, | |||
10827 | return 0; | 10950 | return 0; |
10828 | } | 10951 | } |
10829 | 10952 | ||
10830 | static inline void bnx2x_free_mcast_macs_list( | 10953 | static void bnx2x_free_mcast_macs_list( |
10831 | struct bnx2x_mcast_ramrod_params *p) | 10954 | struct bnx2x_mcast_ramrod_params *p) |
10832 | { | 10955 | { |
10833 | struct bnx2x_mcast_list_elem *mc_mac = | 10956 | struct bnx2x_mcast_list_elem *mc_mac = |
@@ -10845,7 +10968,7 @@ static inline void bnx2x_free_mcast_macs_list( | |||
10845 | * | 10968 | * |
10846 | * We will use zero (0) as a MAC type for these MACs. | 10969 | * We will use zero (0) as a MAC type for these MACs. |
10847 | */ | 10970 | */ |
10848 | static inline int bnx2x_set_uc_list(struct bnx2x *bp) | 10971 | static int bnx2x_set_uc_list(struct bnx2x *bp) |
10849 | { | 10972 | { |
10850 | int rc; | 10973 | int rc; |
10851 | struct net_device *dev = bp->dev; | 10974 | struct net_device *dev = bp->dev; |
@@ -10876,7 +10999,7 @@ static inline int bnx2x_set_uc_list(struct bnx2x *bp) | |||
10876 | BNX2X_UC_LIST_MAC, &ramrod_flags); | 10999 | BNX2X_UC_LIST_MAC, &ramrod_flags); |
10877 | } | 11000 | } |
10878 | 11001 | ||
10879 | static inline int bnx2x_set_mc_list(struct bnx2x *bp) | 11002 | static int bnx2x_set_mc_list(struct bnx2x *bp) |
10880 | { | 11003 | { |
10881 | struct net_device *dev = bp->dev; | 11004 | struct net_device *dev = bp->dev; |
10882 | struct bnx2x_mcast_ramrod_params rparam = {NULL}; | 11005 | struct bnx2x_mcast_ramrod_params rparam = {NULL}; |
@@ -11062,7 +11185,7 @@ static const struct net_device_ops bnx2x_netdev_ops = { | |||
11062 | #endif | 11185 | #endif |
11063 | }; | 11186 | }; |
11064 | 11187 | ||
11065 | static inline int bnx2x_set_coherency_mask(struct bnx2x *bp) | 11188 | static int bnx2x_set_coherency_mask(struct bnx2x *bp) |
11066 | { | 11189 | { |
11067 | struct device *dev = &bp->pdev->dev; | 11190 | struct device *dev = &bp->pdev->dev; |
11068 | 11191 | ||
@@ -11328,7 +11451,7 @@ static int bnx2x_check_firmware(struct bnx2x *bp) | |||
11328 | return 0; | 11451 | return 0; |
11329 | } | 11452 | } |
11330 | 11453 | ||
11331 | static inline void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n) | 11454 | static void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n) |
11332 | { | 11455 | { |
11333 | const __be32 *source = (const __be32 *)_source; | 11456 | const __be32 *source = (const __be32 *)_source; |
11334 | u32 *target = (u32 *)_target; | 11457 | u32 *target = (u32 *)_target; |
@@ -11342,7 +11465,7 @@ static inline void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n) | |||
11342 | Ops array is stored in the following format: | 11465 | Ops array is stored in the following format: |
11343 | {op(8bit), offset(24bit, big endian), data(32bit, big endian)} | 11466 | {op(8bit), offset(24bit, big endian), data(32bit, big endian)} |
11344 | */ | 11467 | */ |
11345 | static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) | 11468 | static void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) |
11346 | { | 11469 | { |
11347 | const __be32 *source = (const __be32 *)_source; | 11470 | const __be32 *source = (const __be32 *)_source; |
11348 | struct raw_op *target = (struct raw_op *)_target; | 11471 | struct raw_op *target = (struct raw_op *)_target; |
@@ -11360,7 +11483,7 @@ static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) | |||
11360 | * IRO array is stored in the following format: | 11483 | * IRO array is stored in the following format: |
11361 | * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) } | 11484 | * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) } |
11362 | */ | 11485 | */ |
11363 | static inline void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) | 11486 | static void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) |
11364 | { | 11487 | { |
11365 | const __be32 *source = (const __be32 *)_source; | 11488 | const __be32 *source = (const __be32 *)_source; |
11366 | struct iro *target = (struct iro *)_target; | 11489 | struct iro *target = (struct iro *)_target; |
@@ -11380,7 +11503,7 @@ static inline void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) | |||
11380 | } | 11503 | } |
11381 | } | 11504 | } |
11382 | 11505 | ||
11383 | static inline void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) | 11506 | static void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) |
11384 | { | 11507 | { |
11385 | const __be16 *source = (const __be16 *)_source; | 11508 | const __be16 *source = (const __be16 *)_source; |
11386 | u16 *target = (u16 *)_target; | 11509 | u16 *target = (u16 *)_target; |
@@ -11523,7 +11646,7 @@ void bnx2x__init_func_obj(struct bnx2x *bp) | |||
11523 | } | 11646 | } |
11524 | 11647 | ||
11525 | /* must be called after sriov-enable */ | 11648 | /* must be called after sriov-enable */ |
11526 | static inline int bnx2x_set_qm_cid_count(struct bnx2x *bp) | 11649 | static int bnx2x_set_qm_cid_count(struct bnx2x *bp) |
11527 | { | 11650 | { |
11528 | int cid_count = BNX2X_L2_CID_COUNT(bp); | 11651 | int cid_count = BNX2X_L2_CID_COUNT(bp); |
11529 | 11652 | ||
@@ -11539,7 +11662,7 @@ static inline int bnx2x_set_qm_cid_count(struct bnx2x *bp) | |||
11539 | * @dev: pci device | 11662 | * @dev: pci device |
11540 | * | 11663 | * |
11541 | */ | 11664 | */ |
11542 | static inline int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev) | 11665 | static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev) |
11543 | { | 11666 | { |
11544 | int pos; | 11667 | int pos; |
11545 | u16 control; | 11668 | u16 control; |
@@ -12015,7 +12138,7 @@ module_exit(bnx2x_cleanup); | |||
12015 | * This function will wait until the ramdord completion returns. | 12138 | * This function will wait until the ramdord completion returns. |
12016 | * Return 0 if success, -ENODEV if ramrod doesn't return. | 12139 | * Return 0 if success, -ENODEV if ramrod doesn't return. |
12017 | */ | 12140 | */ |
12018 | static inline int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp) | 12141 | static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp) |
12019 | { | 12142 | { |
12020 | unsigned long ramrod_flags = 0; | 12143 | unsigned long ramrod_flags = 0; |
12021 | 12144 | ||