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authorCloud Ren <cjren@qca.qualcomm.com>2012-07-19 13:01:58 -0400
committerDavid S. Miller <davem@davemloft.net>2012-07-20 14:21:18 -0400
commitfa0afcd10951afad2022dda09777d2bf70cdab3d (patch)
tree3f74c4d6d407f0b4a23e291ba56652c5f3125522 /drivers/net/ethernet/atheros/atl1c/atl1c_main.c
parentb09e786bd1dd66418b69348cb110f3a64764626a (diff)
atl1c: fix issue of io access mode for AR8152 v2.1
When io access mode is enabled by BOOTROM or BIOS for AR8152 v2.1, the register can't be read/write by memory access mode. Clearing Bit 8 of Register 0x21c could fixed the issue. Signed-off-by: Cloud Ren <cjren@qca.qualcomm.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: xiong <xiong@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/atheros/atl1c/atl1c_main.c')
-rw-r--r--drivers/net/ethernet/atheros/atl1c/atl1c_main.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 36d3783ebfa0..1bf5bbfe778e 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -727,6 +727,8 @@ static const struct atl1c_platform_patch plats[] __devinitdata = {
727 727
728static void __devinit atl1c_patch_assign(struct atl1c_hw *hw) 728static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
729{ 729{
730 struct pci_dev *pdev = hw->adapter->pdev;
731 u32 misc_ctrl;
730 int i = 0; 732 int i = 0;
731 733
732 hw->msi_lnkpatch = false; 734 hw->msi_lnkpatch = false;
@@ -741,6 +743,18 @@ static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
741 } 743 }
742 i++; 744 i++;
743 } 745 }
746
747 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
748 hw->revision_id == L2CB_V21) {
749 /* config acess mode */
750 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
751 REG_PCIE_DEV_MISC_CTRL);
752 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
753 misc_ctrl &= ~0x100;
754 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
755 REG_PCIE_DEV_MISC_CTRL);
756 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
757 }
744} 758}
745/** 759/**
746 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 760 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
@@ -768,7 +782,7 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
768 hw->device_id = pdev->device; 782 hw->device_id = pdev->device;
769 hw->subsystem_vendor_id = pdev->subsystem_vendor; 783 hw->subsystem_vendor_id = pdev->subsystem_vendor;
770 hw->subsystem_id = pdev->subsystem_device; 784 hw->subsystem_id = pdev->subsystem_device;
771 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); 785 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
772 hw->revision_id = revision & 0xFF; 786 hw->revision_id = revision & 0xFF;
773 /* before link up, we assume hibernate is true */ 787 /* before link up, we assume hibernate is true */
774 hw->hibernate = true; 788 hw->hibernate = true;