diff options
author | Dave Airlie <airlied@redhat.com> | 2014-06-05 06:28:59 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2014-06-05 06:28:59 -0400 |
commit | 8d4ad9d4bb0a618c975a32d77087694ec6336f68 (patch) | |
tree | d18d12688174a623e3503b11118e44ef8186c90b /drivers/net/ethernet/altera/altera_utils.c | |
parent | 5ea1f752ae04be403a3dc8ec876a60d7f5f6990a (diff) | |
parent | 9e9a928eed8796a0a1aaed7e0b676db86ba84594 (diff) |
Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next
Merge drm-fixes into drm-next.
Both i915 and radeon need this done for later patches.
Conflicts:
drivers/gpu/drm/drm_crtc_helper.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_gtt.c
Diffstat (limited to 'drivers/net/ethernet/altera/altera_utils.c')
-rw-r--r-- | drivers/net/ethernet/altera/altera_utils.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/net/ethernet/altera/altera_utils.c b/drivers/net/ethernet/altera/altera_utils.c index 70fa13f486b2..d7eeb1713ad2 100644 --- a/drivers/net/ethernet/altera/altera_utils.c +++ b/drivers/net/ethernet/altera/altera_utils.c | |||
@@ -17,28 +17,28 @@ | |||
17 | #include "altera_tse.h" | 17 | #include "altera_tse.h" |
18 | #include "altera_utils.h" | 18 | #include "altera_utils.h" |
19 | 19 | ||
20 | void tse_set_bit(void __iomem *ioaddr, u32 bit_mask) | 20 | void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
21 | { | 21 | { |
22 | u32 value = ioread32(ioaddr); | 22 | u32 value = csrrd32(ioaddr, offs); |
23 | value |= bit_mask; | 23 | value |= bit_mask; |
24 | iowrite32(value, ioaddr); | 24 | csrwr32(value, ioaddr, offs); |
25 | } | 25 | } |
26 | 26 | ||
27 | void tse_clear_bit(void __iomem *ioaddr, u32 bit_mask) | 27 | void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
28 | { | 28 | { |
29 | u32 value = ioread32(ioaddr); | 29 | u32 value = csrrd32(ioaddr, offs); |
30 | value &= ~bit_mask; | 30 | value &= ~bit_mask; |
31 | iowrite32(value, ioaddr); | 31 | csrwr32(value, ioaddr, offs); |
32 | } | 32 | } |
33 | 33 | ||
34 | int tse_bit_is_set(void __iomem *ioaddr, u32 bit_mask) | 34 | int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
35 | { | 35 | { |
36 | u32 value = ioread32(ioaddr); | 36 | u32 value = csrrd32(ioaddr, offs); |
37 | return (value & bit_mask) ? 1 : 0; | 37 | return (value & bit_mask) ? 1 : 0; |
38 | } | 38 | } |
39 | 39 | ||
40 | int tse_bit_is_clear(void __iomem *ioaddr, u32 bit_mask) | 40 | int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
41 | { | 41 | { |
42 | u32 value = ioread32(ioaddr); | 42 | u32 value = csrrd32(ioaddr, offs); |
43 | return (value & bit_mask) ? 0 : 1; | 43 | return (value & bit_mask) ? 0 : 1; |
44 | } | 44 | } |