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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/net/enic/enic.h
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/net/enic/enic.h')
-rw-r--r--drivers/net/enic/enic.h43
1 files changed, 14 insertions, 29 deletions
diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h
index f239aa8c6f4c..38b351c7b979 100644
--- a/drivers/net/enic/enic.h
+++ b/drivers/net/enic/enic.h
@@ -32,35 +32,16 @@
32 32
33#define DRV_NAME "enic" 33#define DRV_NAME "enic"
34#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" 34#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver"
35#define DRV_VERSION "1.4.1.1" 35#define DRV_VERSION "2.1.1.13"
36#define DRV_COPYRIGHT "Copyright 2008-2010 Cisco Systems, Inc" 36#define DRV_COPYRIGHT "Copyright 2008-2011 Cisco Systems, Inc"
37 37
38#define ENIC_BARS_MAX 6 38#define ENIC_BARS_MAX 6
39 39
40#define ENIC_WQ_MAX 8 40#define ENIC_WQ_MAX 1
41#define ENIC_RQ_MAX 8 41#define ENIC_RQ_MAX 1
42#define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX) 42#define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX)
43#define ENIC_INTR_MAX (ENIC_CQ_MAX + 2) 43#define ENIC_INTR_MAX (ENIC_CQ_MAX + 2)
44 44
45enum enic_cq_index {
46 ENIC_CQ_RQ,
47 ENIC_CQ_WQ,
48};
49
50enum enic_intx_intr_index {
51 ENIC_INTX_WQ_RQ,
52 ENIC_INTX_ERR,
53 ENIC_INTX_NOTIFY,
54};
55
56enum enic_msix_intr_index {
57 ENIC_MSIX_RQ,
58 ENIC_MSIX_WQ,
59 ENIC_MSIX_ERR,
60 ENIC_MSIX_NOTIFY,
61 ENIC_MSIX_MAX,
62};
63
64struct enic_msix_entry { 45struct enic_msix_entry {
65 int requested; 46 int requested;
66 char devname[IFNAMSIZ]; 47 char devname[IFNAMSIZ];
@@ -68,7 +49,7 @@ struct enic_msix_entry {
68 void *devid; 49 void *devid;
69}; 50};
70 51
71#define ENIC_SET_APPLIED (1 << 0) 52#define ENIC_PORT_REQUEST_APPLIED (1 << 0)
72#define ENIC_SET_REQUEST (1 << 1) 53#define ENIC_SET_REQUEST (1 << 1)
73#define ENIC_SET_NAME (1 << 2) 54#define ENIC_SET_NAME (1 << 2)
74#define ENIC_SET_INSTANCE (1 << 3) 55#define ENIC_SET_INSTANCE (1 << 3)
@@ -80,6 +61,8 @@ struct enic_port_profile {
80 char name[PORT_PROFILE_MAX]; 61 char name[PORT_PROFILE_MAX];
81 u8 instance_uuid[PORT_UUID_MAX]; 62 u8 instance_uuid[PORT_UUID_MAX];
82 u8 host_uuid[PORT_UUID_MAX]; 63 u8 host_uuid[PORT_UUID_MAX];
64 u8 vf_mac[ETH_ALEN];
65 u8 mac_addr[ETH_ALEN];
83}; 66};
84 67
85/* Per-instance private data structure */ 68/* Per-instance private data structure */
@@ -91,15 +74,16 @@ struct enic {
91 struct vnic_dev *vdev; 74 struct vnic_dev *vdev;
92 struct timer_list notify_timer; 75 struct timer_list notify_timer;
93 struct work_struct reset; 76 struct work_struct reset;
94 struct msix_entry msix_entry[ENIC_MSIX_MAX]; 77 struct msix_entry msix_entry[ENIC_INTR_MAX];
95 struct enic_msix_entry msix[ENIC_MSIX_MAX]; 78 struct enic_msix_entry msix[ENIC_INTR_MAX];
96 u32 msg_enable; 79 u32 msg_enable;
97 spinlock_t devcmd_lock; 80 spinlock_t devcmd_lock;
98 u8 mac_addr[ETH_ALEN]; 81 u8 mac_addr[ETH_ALEN];
99 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; 82 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
83 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
100 unsigned int flags; 84 unsigned int flags;
101 unsigned int mc_count; 85 unsigned int mc_count;
102 int csum_rx_enabled; 86 unsigned int uc_count;
103 u32 port_mtu; 87 u32 port_mtu;
104 u32 rx_coalesce_usecs; 88 u32 rx_coalesce_usecs;
105 u32 tx_coalesce_usecs; 89 u32 tx_coalesce_usecs;
@@ -116,10 +100,9 @@ struct enic {
116 /* receive queue cache line section */ 100 /* receive queue cache line section */
117 ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX]; 101 ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
118 unsigned int rq_count; 102 unsigned int rq_count;
119 int (*rq_alloc_buf)(struct vnic_rq *rq);
120 u64 rq_truncated_pkts; 103 u64 rq_truncated_pkts;
121 u64 rq_bad_fcs; 104 u64 rq_bad_fcs;
122 struct napi_struct napi; 105 struct napi_struct napi[ENIC_RQ_MAX];
123 106
124 /* interrupt resource cache line section */ 107 /* interrupt resource cache line section */
125 ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX]; 108 ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
@@ -136,4 +119,6 @@ static inline struct device *enic_get_dev(struct enic *enic)
136 return &(enic->pdev->dev); 119 return &(enic->pdev->dev);
137} 120}
138 121
122void enic_reset_addr_lists(struct enic *enic);
123
139#endif /* _ENIC_H_ */ 124#endif /* _ENIC_H_ */