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authorBruce Allan <bruce.w.allan@intel.com>2008-08-26 21:37:06 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-09-03 10:08:13 -0400
commit4662e82b2cb41c60826e50474dd86dd5c6372b0c (patch)
tree75a99d62d28ad8ff5d9557f4665bae177218bb2a /drivers/net/e1000e/hw.h
parentf4187b56e1f8a05dd110875d5094b21b51ebd79b (diff)
e1000e: add support for new 82574L part
This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/e1000e/hw.h')
-rw-r--r--drivers/net/e1000e/hw.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 5d2acc531b5c..f66ed37a7f76 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -65,7 +65,11 @@ enum e1e_registers {
65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */ 65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */
66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */ 66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */
67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */ 67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */
68 E1000_EIAC_82574 = 0x000DC, /* Ext. Interrupt Auto Clear - RW */
68 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */ 69 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */
70 E1000_IVAR = 0x000E4, /* Interrupt Vector Allocation - RW */
71 E1000_EITR_82574_BASE = 0x000E8, /* Interrupt Throttling - RW */
72#define E1000_EITR_82574(_n) (E1000_EITR_82574_BASE + (_n << 2))
69 E1000_RCTL = 0x00100, /* Rx Control - RW */ 73 E1000_RCTL = 0x00100, /* Rx Control - RW */
70 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */ 74 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */
71 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */ 75 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */
@@ -332,6 +336,7 @@ enum e1e_registers {
332#define E1000_DEV_ID_82573E 0x108B 336#define E1000_DEV_ID_82573E 0x108B
333#define E1000_DEV_ID_82573E_IAMT 0x108C 337#define E1000_DEV_ID_82573E_IAMT 0x108C
334#define E1000_DEV_ID_82573L 0x109A 338#define E1000_DEV_ID_82573L 0x109A
339#define E1000_DEV_ID_82574L 0x10D3
335 340
336#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 341#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096
337#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 342#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098
@@ -360,12 +365,15 @@ enum e1e_registers {
360#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE 365#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE
361#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF 366#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF
362 367
368#define E1000_REVISION_4 4
369
363#define E1000_FUNC_1 1 370#define E1000_FUNC_1 1
364 371
365enum e1000_mac_type { 372enum e1000_mac_type {
366 e1000_82571, 373 e1000_82571,
367 e1000_82572, 374 e1000_82572,
368 e1000_82573, 375 e1000_82573,
376 e1000_82574,
369 e1000_80003es2lan, 377 e1000_80003es2lan,
370 e1000_ich8lan, 378 e1000_ich8lan,
371 e1000_ich9lan, 379 e1000_ich9lan,
@@ -700,8 +708,7 @@ struct e1000_host_mng_command_info {
700 708
701/* Function pointers and static data for the MAC. */ 709/* Function pointers and static data for the MAC. */
702struct e1000_mac_operations { 710struct e1000_mac_operations {
703 u32 mng_mode_enab; 711 bool (*check_mng_mode)(struct e1000_hw *);
704
705 s32 (*check_for_link)(struct e1000_hw *); 712 s32 (*check_for_link)(struct e1000_hw *);
706 s32 (*cleanup_led)(struct e1000_hw *); 713 s32 (*cleanup_led)(struct e1000_hw *);
707 void (*clear_hw_cntrs)(struct e1000_hw *); 714 void (*clear_hw_cntrs)(struct e1000_hw *);