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authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2006-09-27 15:53:51 -0400
committerAuke Kok <juke-jan.h.kok@intel.com>2006-09-27 15:53:51 -0400
commit09ae3e88662478c014617291e5a2115e6b2f65eb (patch)
tree75bda0753b1e751933cd35dc565adb67f619dfed /drivers/net/e1000/e1000_main.c
parent65c7973fa5b46b024f38be208aa477e8daf9a603 (diff)
e1000: gather hardware bit tweaks.
Several hardware bits were set all over the driver and have been consolidated into a single function. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_main.c')
-rw-r--r--drivers/net/e1000/e1000_main.c24
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index e8a760802070..aaadb2bb0763 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -573,6 +573,9 @@ void
573e1000_reset(struct e1000_adapter *adapter) 573e1000_reset(struct e1000_adapter *adapter)
574{ 574{
575 uint32_t pba, manc; 575 uint32_t pba, manc;
576#ifdef DISABLE_MULR
577 uint32_t tctl;
578#endif
576 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; 579 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
577 580
578 /* Repartition Pba for greater than 9k mtu 581 /* Repartition Pba for greater than 9k mtu
@@ -639,6 +642,12 @@ e1000_reset(struct e1000_adapter *adapter)
639 e1000_reset_hw(&adapter->hw); 642 e1000_reset_hw(&adapter->hw);
640 if (adapter->hw.mac_type >= e1000_82544) 643 if (adapter->hw.mac_type >= e1000_82544)
641 E1000_WRITE_REG(&adapter->hw, WUC, 0); 644 E1000_WRITE_REG(&adapter->hw, WUC, 0);
645#ifdef DISABLE_MULR
646 /* disable Multiple Reads in Transmit Control Register for debugging */
647 tctl = E1000_READ_REG(hw, TCTL);
648 E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
649
650#endif
642 if (e1000_init_hw(&adapter->hw)) 651 if (e1000_init_hw(&adapter->hw))
643 DPRINTK(PROBE, ERR, "Hardware Error\n"); 652 DPRINTK(PROBE, ERR, "Hardware Error\n");
644 e1000_update_mng_vlan(adapter); 653 e1000_update_mng_vlan(adapter);
@@ -1517,27 +1526,14 @@ e1000_configure_tx(struct e1000_adapter *adapter)
1517 /* Program the Transmit Control Register */ 1526 /* Program the Transmit Control Register */
1518 1527
1519 tctl = E1000_READ_REG(hw, TCTL); 1528 tctl = E1000_READ_REG(hw, TCTL);
1520
1521 tctl &= ~E1000_TCTL_CT; 1529 tctl &= ~E1000_TCTL_CT;
1522 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 1530 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1523 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 1531 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1524 1532
1525#ifdef DISABLE_MULR
1526 /* disable Multiple Reads for debugging */
1527 tctl &= ~E1000_TCTL_MULR;
1528#endif
1529
1530 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { 1533 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1531 tarc = E1000_READ_REG(hw, TARC0); 1534 tarc = E1000_READ_REG(hw, TARC0);
1532 tarc |= ((1 << 25) | (1 << 21)); 1535 tarc |= (1 << 21);
1533 E1000_WRITE_REG(hw, TARC0, tarc); 1536 E1000_WRITE_REG(hw, TARC0, tarc);
1534 tarc = E1000_READ_REG(hw, TARC1);
1535 tarc |= (1 << 25);
1536 if (tctl & E1000_TCTL_MULR)
1537 tarc &= ~(1 << 28);
1538 else
1539 tarc |= (1 << 28);
1540 E1000_WRITE_REG(hw, TARC1, tarc);
1541 } else if (hw->mac_type == e1000_80003es2lan) { 1537 } else if (hw->mac_type == e1000_80003es2lan) {
1542 tarc = E1000_READ_REG(hw, TARC0); 1538 tarc = E1000_READ_REG(hw, TARC0);
1543 tarc |= 1; 1539 tarc |= 1;