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authorAdrian Bunk <bunk@stusta.de>2005-10-30 10:53:34 -0500
committerJohn W. Linville <linville@tuxdriver.com>2005-11-05 21:00:01 -0500
commit3ad2cc6798be9388c9a3f1e6180e77690303eb01 (patch)
tree28389b018b626949eb5a6c4b1b0157c94a5f9ed4 /drivers/net/e1000/e1000_hw.c
parente9ab1d145365a871858f402f3655cd4939fa38d5 (diff)
[PATCH] drivers/net/e1000/: possible cleanups
This patch contains the following possible cleanups: - make needlessly global code static - #if 0 the following unused global functions: - e1000_hw.c: e1000_mc_addr_list_update - e1000_hw.c: e1000_read_reg_io - e1000_hw.c: e1000_enable_pciex_master Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r--drivers/net/e1000/e1000_hw.c101
1 files changed, 70 insertions, 31 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 8fc876da43b4..a267c5235fc0 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -68,6 +68,38 @@ static int32_t e1000_polarity_reversal_workaround(struct e1000_hw *hw);
68static int32_t e1000_set_phy_mode(struct e1000_hw *hw); 68static int32_t e1000_set_phy_mode(struct e1000_hw *hw);
69static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer); 69static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer);
70static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length); 70static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length);
71static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw);
72static int32_t e1000_check_downshift(struct e1000_hw *hw);
73static int32_t e1000_check_polarity(struct e1000_hw *hw, uint16_t *polarity);
74static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
75static void e1000_clear_vfta(struct e1000_hw *hw);
76static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw);
77static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw,
78 boolean_t link_up);
79static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw);
80static int32_t e1000_detect_gig_phy(struct e1000_hw *hw);
81static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw);
82static int32_t e1000_get_cable_length(struct e1000_hw *hw,
83 uint16_t *min_length,
84 uint16_t *max_length);
85static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
86static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw);
87static int32_t e1000_id_led_init(struct e1000_hw * hw);
88static void e1000_init_rx_addrs(struct e1000_hw *hw);
89static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);
90static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
91static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
92static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset,
93 uint16_t words, uint16_t *data);
94static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active);
95static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active);
96static int32_t e1000_wait_autoneg(struct e1000_hw *hw);
97
98static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset,
99 uint32_t value);
100
101#define E1000_WRITE_REG_IO(a, reg, val) \
102 e1000_write_reg_io((a), E1000_##reg, val)
71 103
72/* IGP cable length table */ 104/* IGP cable length table */
73static const 105static const
@@ -2035,7 +2067,7 @@ e1000_force_mac_fc(struct e1000_hw *hw)
2035 * based on the flow control negotiated by the PHY. In TBI mode, the TFCE 2067 * based on the flow control negotiated by the PHY. In TBI mode, the TFCE
2036 * and RFCE bits will be automaticaly set to the negotiated flow control mode. 2068 * and RFCE bits will be automaticaly set to the negotiated flow control mode.
2037 *****************************************************************************/ 2069 *****************************************************************************/
2038int32_t 2070static int32_t
2039e1000_config_fc_after_link_up(struct e1000_hw *hw) 2071e1000_config_fc_after_link_up(struct e1000_hw *hw)
2040{ 2072{
2041 int32_t ret_val; 2073 int32_t ret_val;
@@ -2537,7 +2569,7 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
2537* 2569*
2538* hw - Struct containing variables accessed by shared code 2570* hw - Struct containing variables accessed by shared code
2539******************************************************************************/ 2571******************************************************************************/
2540int32_t 2572static int32_t
2541e1000_wait_autoneg(struct e1000_hw *hw) 2573e1000_wait_autoneg(struct e1000_hw *hw)
2542{ 2574{
2543 int32_t ret_val; 2575 int32_t ret_val;
@@ -3021,7 +3053,7 @@ e1000_phy_reset(struct e1000_hw *hw)
3021* 3053*
3022* hw - Struct containing variables accessed by shared code 3054* hw - Struct containing variables accessed by shared code
3023******************************************************************************/ 3055******************************************************************************/
3024int32_t 3056static int32_t
3025e1000_detect_gig_phy(struct e1000_hw *hw) 3057e1000_detect_gig_phy(struct e1000_hw *hw)
3026{ 3058{
3027 int32_t phy_init_status, ret_val; 3059 int32_t phy_init_status, ret_val;
@@ -3121,7 +3153,7 @@ e1000_phy_reset_dsp(struct e1000_hw *hw)
3121* hw - Struct containing variables accessed by shared code 3153* hw - Struct containing variables accessed by shared code
3122* phy_info - PHY information structure 3154* phy_info - PHY information structure
3123******************************************************************************/ 3155******************************************************************************/
3124int32_t 3156static int32_t
3125e1000_phy_igp_get_info(struct e1000_hw *hw, 3157e1000_phy_igp_get_info(struct e1000_hw *hw,
3126 struct e1000_phy_info *phy_info) 3158 struct e1000_phy_info *phy_info)
3127{ 3159{
@@ -3195,7 +3227,7 @@ e1000_phy_igp_get_info(struct e1000_hw *hw,
3195* hw - Struct containing variables accessed by shared code 3227* hw - Struct containing variables accessed by shared code
3196* phy_info - PHY information structure 3228* phy_info - PHY information structure
3197******************************************************************************/ 3229******************************************************************************/
3198int32_t 3230static int32_t
3199e1000_phy_m88_get_info(struct e1000_hw *hw, 3231e1000_phy_m88_get_info(struct e1000_hw *hw,
3200 struct e1000_phy_info *phy_info) 3232 struct e1000_phy_info *phy_info)
3201{ 3233{
@@ -3905,7 +3937,7 @@ e1000_read_eeprom(struct e1000_hw *hw,
3905 * data - word read from the EEPROM 3937 * data - word read from the EEPROM
3906 * words - number of words to read 3938 * words - number of words to read
3907 *****************************************************************************/ 3939 *****************************************************************************/
3908int32_t 3940static int32_t
3909e1000_read_eeprom_eerd(struct e1000_hw *hw, 3941e1000_read_eeprom_eerd(struct e1000_hw *hw,
3910 uint16_t offset, 3942 uint16_t offset,
3911 uint16_t words, 3943 uint16_t words,
@@ -3939,7 +3971,7 @@ e1000_read_eeprom_eerd(struct e1000_hw *hw,
3939 * data - word read from the EEPROM 3971 * data - word read from the EEPROM
3940 * words - number of words to read 3972 * words - number of words to read
3941 *****************************************************************************/ 3973 *****************************************************************************/
3942int32_t 3974static int32_t
3943e1000_write_eeprom_eewr(struct e1000_hw *hw, 3975e1000_write_eeprom_eewr(struct e1000_hw *hw,
3944 uint16_t offset, 3976 uint16_t offset,
3945 uint16_t words, 3977 uint16_t words,
@@ -3976,7 +4008,7 @@ e1000_write_eeprom_eewr(struct e1000_hw *hw,
3976 * 4008 *
3977 * hw - Struct containing variables accessed by shared code 4009 * hw - Struct containing variables accessed by shared code
3978 *****************************************************************************/ 4010 *****************************************************************************/
3979int32_t 4011static int32_t
3980e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd) 4012e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
3981{ 4013{
3982 uint32_t attempts = 100000; 4014 uint32_t attempts = 100000;
@@ -4004,7 +4036,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
4004* 4036*
4005* hw - Struct containing variables accessed by shared code 4037* hw - Struct containing variables accessed by shared code
4006****************************************************************************/ 4038****************************************************************************/
4007boolean_t 4039static boolean_t
4008e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) 4040e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
4009{ 4041{
4010 uint32_t eecd = 0; 4042 uint32_t eecd = 0;
@@ -4322,7 +4354,7 @@ e1000_write_eeprom_microwire(struct e1000_hw *hw,
4322 * data - word read from the EEPROM 4354 * data - word read from the EEPROM
4323 * words - number of words to read 4355 * words - number of words to read
4324 *****************************************************************************/ 4356 *****************************************************************************/
4325int32_t 4357static int32_t
4326e1000_commit_shadow_ram(struct e1000_hw *hw) 4358e1000_commit_shadow_ram(struct e1000_hw *hw)
4327{ 4359{
4328 uint32_t attempts = 100000; 4360 uint32_t attempts = 100000;
@@ -4453,7 +4485,7 @@ e1000_read_mac_addr(struct e1000_hw * hw)
4453 * of the receive addresss registers. Clears the multicast table. Assumes 4485 * of the receive addresss registers. Clears the multicast table. Assumes
4454 * the receiver is in reset when the routine is called. 4486 * the receiver is in reset when the routine is called.
4455 *****************************************************************************/ 4487 *****************************************************************************/
4456void 4488static void
4457e1000_init_rx_addrs(struct e1000_hw *hw) 4489e1000_init_rx_addrs(struct e1000_hw *hw)
4458{ 4490{
4459 uint32_t i; 4491 uint32_t i;
@@ -4481,6 +4513,7 @@ e1000_init_rx_addrs(struct e1000_hw *hw)
4481 } 4513 }
4482} 4514}
4483 4515
4516#if 0
4484/****************************************************************************** 4517/******************************************************************************
4485 * Updates the MAC's list of multicast addresses. 4518 * Updates the MAC's list of multicast addresses.
4486 * 4519 *
@@ -4564,6 +4597,7 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
4564 } 4597 }
4565 DEBUGOUT("MC Update Complete\n"); 4598 DEBUGOUT("MC Update Complete\n");
4566} 4599}
4600#endif /* 0 */
4567 4601
4568/****************************************************************************** 4602/******************************************************************************
4569 * Hashes an address to determine its location in the multicast table 4603 * Hashes an address to determine its location in the multicast table
@@ -4705,7 +4739,7 @@ e1000_write_vfta(struct e1000_hw *hw,
4705 * 4739 *
4706 * hw - Struct containing variables accessed by shared code 4740 * hw - Struct containing variables accessed by shared code
4707 *****************************************************************************/ 4741 *****************************************************************************/
4708void 4742static void
4709e1000_clear_vfta(struct e1000_hw *hw) 4743e1000_clear_vfta(struct e1000_hw *hw)
4710{ 4744{
4711 uint32_t offset; 4745 uint32_t offset;
@@ -4735,7 +4769,7 @@ e1000_clear_vfta(struct e1000_hw *hw)
4735 } 4769 }
4736} 4770}
4737 4771
4738int32_t 4772static int32_t
4739e1000_id_led_init(struct e1000_hw * hw) 4773e1000_id_led_init(struct e1000_hw * hw)
4740{ 4774{
4741 uint32_t ledctl; 4775 uint32_t ledctl;
@@ -4997,7 +5031,7 @@ e1000_led_off(struct e1000_hw *hw)
4997 * 5031 *
4998 * hw - Struct containing variables accessed by shared code 5032 * hw - Struct containing variables accessed by shared code
4999 *****************************************************************************/ 5033 *****************************************************************************/
5000void 5034static void
5001e1000_clear_hw_cntrs(struct e1000_hw *hw) 5035e1000_clear_hw_cntrs(struct e1000_hw *hw)
5002{ 5036{
5003 volatile uint32_t temp; 5037 volatile uint32_t temp;
@@ -5283,6 +5317,8 @@ e1000_get_bus_info(struct e1000_hw *hw)
5283 break; 5317 break;
5284 } 5318 }
5285} 5319}
5320
5321#if 0
5286/****************************************************************************** 5322/******************************************************************************
5287 * Reads a value from one of the devices registers using port I/O (as opposed 5323 * Reads a value from one of the devices registers using port I/O (as opposed
5288 * memory mapped I/O). Only 82544 and newer devices support port I/O. 5324 * memory mapped I/O). Only 82544 and newer devices support port I/O.
@@ -5300,6 +5336,7 @@ e1000_read_reg_io(struct e1000_hw *hw,
5300 e1000_io_write(hw, io_addr, offset); 5336 e1000_io_write(hw, io_addr, offset);
5301 return e1000_io_read(hw, io_data); 5337 return e1000_io_read(hw, io_data);
5302} 5338}
5339#endif /* 0 */
5303 5340
5304/****************************************************************************** 5341/******************************************************************************
5305 * Writes a value to one of the devices registers using port I/O (as opposed to 5342 * Writes a value to one of the devices registers using port I/O (as opposed to
@@ -5309,7 +5346,7 @@ e1000_read_reg_io(struct e1000_hw *hw,
5309 * offset - offset to write to 5346 * offset - offset to write to
5310 * value - value to write 5347 * value - value to write
5311 *****************************************************************************/ 5348 *****************************************************************************/
5312void 5349static void
5313e1000_write_reg_io(struct e1000_hw *hw, 5350e1000_write_reg_io(struct e1000_hw *hw,
5314 uint32_t offset, 5351 uint32_t offset,
5315 uint32_t value) 5352 uint32_t value)
@@ -5337,7 +5374,7 @@ e1000_write_reg_io(struct e1000_hw *hw,
5337 * register to the minimum and maximum range. 5374 * register to the minimum and maximum range.
5338 * For IGP phy's, the function calculates the range by the AGC registers. 5375 * For IGP phy's, the function calculates the range by the AGC registers.
5339 *****************************************************************************/ 5376 *****************************************************************************/
5340int32_t 5377static int32_t
5341e1000_get_cable_length(struct e1000_hw *hw, 5378e1000_get_cable_length(struct e1000_hw *hw,
5342 uint16_t *min_length, 5379 uint16_t *min_length,
5343 uint16_t *max_length) 5380 uint16_t *max_length)
@@ -5489,7 +5526,7 @@ e1000_get_cable_length(struct e1000_hw *hw,
5489 * return 0. If the link speed is 1000 Mbps the polarity status is in the 5526 * return 0. If the link speed is 1000 Mbps the polarity status is in the
5490 * IGP01E1000_PHY_PCS_INIT_REG. 5527 * IGP01E1000_PHY_PCS_INIT_REG.
5491 *****************************************************************************/ 5528 *****************************************************************************/
5492int32_t 5529static int32_t
5493e1000_check_polarity(struct e1000_hw *hw, 5530e1000_check_polarity(struct e1000_hw *hw,
5494 uint16_t *polarity) 5531 uint16_t *polarity)
5495{ 5532{
@@ -5551,7 +5588,7 @@ e1000_check_polarity(struct e1000_hw *hw,
5551 * Link Health register. In IGP this bit is latched high, so the driver must 5588 * Link Health register. In IGP this bit is latched high, so the driver must
5552 * read it immediately after link is established. 5589 * read it immediately after link is established.
5553 *****************************************************************************/ 5590 *****************************************************************************/
5554int32_t 5591static int32_t
5555e1000_check_downshift(struct e1000_hw *hw) 5592e1000_check_downshift(struct e1000_hw *hw)
5556{ 5593{
5557 int32_t ret_val; 5594 int32_t ret_val;
@@ -5592,7 +5629,7 @@ e1000_check_downshift(struct e1000_hw *hw)
5592 * 5629 *
5593 ****************************************************************************/ 5630 ****************************************************************************/
5594 5631
5595int32_t 5632static int32_t
5596e1000_config_dsp_after_link_change(struct e1000_hw *hw, 5633e1000_config_dsp_after_link_change(struct e1000_hw *hw,
5597 boolean_t link_up) 5634 boolean_t link_up)
5598{ 5635{
@@ -5823,7 +5860,7 @@ e1000_set_phy_mode(struct e1000_hw *hw)
5823 * 5860 *
5824 ****************************************************************************/ 5861 ****************************************************************************/
5825 5862
5826int32_t 5863static int32_t
5827e1000_set_d3_lplu_state(struct e1000_hw *hw, 5864e1000_set_d3_lplu_state(struct e1000_hw *hw,
5828 boolean_t active) 5865 boolean_t active)
5829{ 5866{
@@ -5936,7 +5973,7 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw,
5936 * 5973 *
5937 ****************************************************************************/ 5974 ****************************************************************************/
5938 5975
5939int32_t 5976static int32_t
5940e1000_set_d0_lplu_state(struct e1000_hw *hw, 5977e1000_set_d0_lplu_state(struct e1000_hw *hw,
5941 boolean_t active) 5978 boolean_t active)
5942{ 5979{
@@ -6103,7 +6140,7 @@ e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
6103 * timeout 6140 * timeout
6104 * - E1000_SUCCESS for success. 6141 * - E1000_SUCCESS for success.
6105 ****************************************************************************/ 6142 ****************************************************************************/
6106int32_t 6143static int32_t
6107e1000_mng_enable_host_if(struct e1000_hw * hw) 6144e1000_mng_enable_host_if(struct e1000_hw * hw)
6108{ 6145{
6109 uint32_t hicr; 6146 uint32_t hicr;
@@ -6137,7 +6174,7 @@ e1000_mng_enable_host_if(struct e1000_hw * hw)
6137 * 6174 *
6138 * returns - E1000_SUCCESS for success. 6175 * returns - E1000_SUCCESS for success.
6139 ****************************************************************************/ 6176 ****************************************************************************/
6140int32_t 6177static int32_t
6141e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer, 6178e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer,
6142 uint16_t length, uint16_t offset, uint8_t *sum) 6179 uint16_t length, uint16_t offset, uint8_t *sum)
6143{ 6180{
@@ -6205,7 +6242,7 @@ e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer,
6205 * 6242 *
6206 * returns - E1000_SUCCESS for success. 6243 * returns - E1000_SUCCESS for success.
6207 ****************************************************************************/ 6244 ****************************************************************************/
6208int32_t 6245static int32_t
6209e1000_mng_write_cmd_header(struct e1000_hw * hw, 6246e1000_mng_write_cmd_header(struct e1000_hw * hw,
6210 struct e1000_host_mng_command_header * hdr) 6247 struct e1000_host_mng_command_header * hdr)
6211{ 6248{
@@ -6243,7 +6280,7 @@ e1000_mng_write_cmd_header(struct e1000_hw * hw,
6243 * 6280 *
6244 * returns - E1000_SUCCESS for success. 6281 * returns - E1000_SUCCESS for success.
6245 ****************************************************************************/ 6282 ****************************************************************************/
6246int32_t 6283static int32_t
6247e1000_mng_write_commit( 6284e1000_mng_write_commit(
6248 struct e1000_hw * hw) 6285 struct e1000_hw * hw)
6249{ 6286{
@@ -6496,7 +6533,7 @@ e1000_polarity_reversal_workaround(struct e1000_hw *hw)
6496 * returns: - none. 6533 * returns: - none.
6497 * 6534 *
6498 ***************************************************************************/ 6535 ***************************************************************************/
6499void 6536static void
6500e1000_set_pci_express_master_disable(struct e1000_hw *hw) 6537e1000_set_pci_express_master_disable(struct e1000_hw *hw)
6501{ 6538{
6502 uint32_t ctrl; 6539 uint32_t ctrl;
@@ -6511,6 +6548,7 @@ e1000_set_pci_express_master_disable(struct e1000_hw *hw)
6511 E1000_WRITE_REG(hw, CTRL, ctrl); 6548 E1000_WRITE_REG(hw, CTRL, ctrl);
6512} 6549}
6513 6550
6551#if 0
6514/*************************************************************************** 6552/***************************************************************************
6515 * 6553 *
6516 * Enables PCI-Express master access. 6554 * Enables PCI-Express master access.
@@ -6534,6 +6572,7 @@ e1000_enable_pciex_master(struct e1000_hw *hw)
6534 ctrl &= ~E1000_CTRL_GIO_MASTER_DISABLE; 6572 ctrl &= ~E1000_CTRL_GIO_MASTER_DISABLE;
6535 E1000_WRITE_REG(hw, CTRL, ctrl); 6573 E1000_WRITE_REG(hw, CTRL, ctrl);
6536} 6574}
6575#endif /* 0 */
6537 6576
6538/******************************************************************************* 6577/*******************************************************************************
6539 * 6578 *
@@ -6584,7 +6623,7 @@ e1000_disable_pciex_master(struct e1000_hw *hw)
6584 * E1000_SUCCESS at any other case. 6623 * E1000_SUCCESS at any other case.
6585 * 6624 *
6586 ******************************************************************************/ 6625 ******************************************************************************/
6587int32_t 6626static int32_t
6588e1000_get_auto_rd_done(struct e1000_hw *hw) 6627e1000_get_auto_rd_done(struct e1000_hw *hw)
6589{ 6628{
6590 int32_t timeout = AUTO_READ_DONE_TIMEOUT; 6629 int32_t timeout = AUTO_READ_DONE_TIMEOUT;
@@ -6623,7 +6662,7 @@ e1000_get_auto_rd_done(struct e1000_hw *hw)
6623 * E1000_SUCCESS at any other case. 6662 * E1000_SUCCESS at any other case.
6624 * 6663 *
6625 ***************************************************************************/ 6664 ***************************************************************************/
6626int32_t 6665static int32_t
6627e1000_get_phy_cfg_done(struct e1000_hw *hw) 6666e1000_get_phy_cfg_done(struct e1000_hw *hw)
6628{ 6667{
6629 int32_t timeout = PHY_CFG_TIMEOUT; 6668 int32_t timeout = PHY_CFG_TIMEOUT;
@@ -6666,7 +6705,7 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw)
6666 * E1000_SUCCESS at any other case. 6705 * E1000_SUCCESS at any other case.
6667 * 6706 *
6668 ***************************************************************************/ 6707 ***************************************************************************/
6669int32_t 6708static int32_t
6670e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw) 6709e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
6671{ 6710{
6672 int32_t timeout; 6711 int32_t timeout;
@@ -6711,7 +6750,7 @@ e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
6711 * returns: - None. 6750 * returns: - None.
6712 * 6751 *
6713 ***************************************************************************/ 6752 ***************************************************************************/
6714void 6753static void
6715e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw) 6754e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
6716{ 6755{
6717 uint32_t swsm; 6756 uint32_t swsm;
@@ -6747,7 +6786,7 @@ e1000_check_phy_reset_block(struct e1000_hw *hw)
6747 E1000_BLK_PHY_RESET : E1000_SUCCESS; 6786 E1000_BLK_PHY_RESET : E1000_SUCCESS;
6748} 6787}
6749 6788
6750uint8_t 6789static uint8_t
6751e1000_arc_subsystem_valid(struct e1000_hw *hw) 6790e1000_arc_subsystem_valid(struct e1000_hw *hw)
6752{ 6791{
6753 uint32_t fwsm; 6792 uint32_t fwsm;