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authorPaul Mackerras <paulus@samba.org>2006-12-03 23:59:07 -0500
committerPaul Mackerras <paulus@samba.org>2006-12-03 23:59:07 -0500
commit79acbb3ff2d8095b692e1502b9eb2ccec348de26 (patch)
tree6ab773e5a8f9de2cd6443362b21d0d6fffe3b35e /drivers/net/defxx.h
parent19a79859e168640f8e16d7b216d211c1c52b687a (diff)
parent2b5f6dcce5bf94b9b119e9ed8d537098ec61c3d2 (diff)
Merge branch 'linux-2.6' into for-linus
Diffstat (limited to 'drivers/net/defxx.h')
-rw-r--r--drivers/net/defxx.h15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/net/defxx.h b/drivers/net/defxx.h
index 8b1e9a11ca21..2ce8f97253eb 100644
--- a/drivers/net/defxx.h
+++ b/drivers/net/defxx.h
@@ -25,6 +25,7 @@
25 * macros to DEFXX.C. 25 * macros to DEFXX.C.
26 * 12-Sep-96 LVS Removed packet request header pointers. 26 * 12-Sep-96 LVS Removed packet request header pointers.
27 * 04 Aug 2003 macro Converted to the DMA API. 27 * 04 Aug 2003 macro Converted to the DMA API.
28 * 23 Oct 2006 macro Big-endian host support.
28 */ 29 */
29 30
30#ifndef _DEFXX_H_ 31#ifndef _DEFXX_H_
@@ -1344,7 +1345,7 @@ typedef struct
1344 1345
1345/* Register definition structures are defined for both big and little endian systems */ 1346/* Register definition structures are defined for both big and little endian systems */
1346 1347
1347#ifndef BIG_ENDIAN 1348#ifndef __BIG_ENDIAN
1348 1349
1349/* Little endian format of Type 1 Producer register */ 1350/* Little endian format of Type 1 Producer register */
1350 1351
@@ -1402,7 +1403,11 @@ typedef union
1402 } index; 1403 } index;
1403 } PI_TYPE_2_CONSUMER; 1404 } PI_TYPE_2_CONSUMER;
1404 1405
1405#else 1406/* Define swapping required by DMA transfers. */
1407#define PI_PDATA_A_INIT_M_BSWAP_INIT \
1408 (PI_PDATA_A_INIT_M_BSWAP_DATA)
1409
1410#else /* __BIG_ENDIAN */
1406 1411
1407/* Big endian format of Type 1 Producer register */ 1412/* Big endian format of Type 1 Producer register */
1408 1413
@@ -1460,7 +1465,11 @@ typedef union
1460 } index; 1465 } index;
1461 } PI_TYPE_2_CONSUMER; 1466 } PI_TYPE_2_CONSUMER;
1462 1467
1463#endif /* #ifndef BIG_ENDIAN */ 1468/* Define swapping required by DMA transfers. */
1469#define PI_PDATA_A_INIT_M_BSWAP_INIT \
1470 (PI_PDATA_A_INIT_M_BSWAP_DATA | PI_PDATA_A_INIT_M_BSWAP_LITERAL)
1471
1472#endif /* __BIG_ENDIAN */
1464 1473
1465/* Define EISA controller register offsets */ 1474/* Define EISA controller register offsets */
1466 1475