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authorStephen Hemminger <shemminger@osdl.org>2006-12-01 19:36:16 -0500
committerJeff Garzik <jeff@garzik.org>2006-12-02 00:24:49 -0500
commitf1d3d38af75789f1b82969b83b69cab540609789 (patch)
tree47d31e8a55fb65cf33797197b92a332630cfc3ef /drivers/net/chelsio/mv88x201x.c
parent415294ecbb32ddbd0a7a2b7bae0b60fedfa09cc4 (diff)
[PATCH] chelsio: add support for other 10G boards
Add support for other versions of the 10G Chelsio boards. This is basically a port of the vendor driver with the TOE features removed. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/chelsio/mv88x201x.c')
-rw-r--r--drivers/net/chelsio/mv88x201x.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/drivers/net/chelsio/mv88x201x.c b/drivers/net/chelsio/mv88x201x.c
index bf7d8538885d..c8e89480d906 100644
--- a/drivers/net/chelsio/mv88x201x.c
+++ b/drivers/net/chelsio/mv88x201x.c
@@ -85,29 +85,33 @@ static int mv88x201x_reset(struct cphy *cphy, int wait)
85 85
86static int mv88x201x_interrupt_enable(struct cphy *cphy) 86static int mv88x201x_interrupt_enable(struct cphy *cphy)
87{ 87{
88 u32 elmer;
89
90 /* Enable PHY LASI interrupts. */ 88 /* Enable PHY LASI interrupts. */
91 mdio_write(cphy, 0x1, 0x9002, 0x1); 89 mdio_write(cphy, 0x1, 0x9002, 0x1);
92 90
93 /* Enable Marvell interrupts through Elmer0. */ 91 /* Enable Marvell interrupts through Elmer0. */
94 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 92 if (t1_is_asic(cphy->adapter)) {
95 elmer |= ELMER0_GP_BIT6; 93 u32 elmer;
96 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 94
95 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
96 elmer |= ELMER0_GP_BIT6;
97 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
98 }
97 return 0; 99 return 0;
98} 100}
99 101
100static int mv88x201x_interrupt_disable(struct cphy *cphy) 102static int mv88x201x_interrupt_disable(struct cphy *cphy)
101{ 103{
102 u32 elmer;
103
104 /* Disable PHY LASI interrupts. */ 104 /* Disable PHY LASI interrupts. */
105 mdio_write(cphy, 0x1, 0x9002, 0x0); 105 mdio_write(cphy, 0x1, 0x9002, 0x0);
106 106
107 /* Disable Marvell interrupts through Elmer0. */ 107 /* Disable Marvell interrupts through Elmer0. */
108 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 108 if (t1_is_asic(cphy->adapter)) {
109 elmer &= ~ELMER0_GP_BIT6; 109 u32 elmer;
110 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 110
111 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
112 elmer &= ~ELMER0_GP_BIT6;
113 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
114 }
111 return 0; 115 return 0;
112} 116}
113 117
@@ -140,9 +144,11 @@ static int mv88x201x_interrupt_clear(struct cphy *cphy)
140#endif 144#endif
141 145
142 /* Clear Marvell interrupts through Elmer0. */ 146 /* Clear Marvell interrupts through Elmer0. */
143 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer); 147 if (t1_is_asic(cphy->adapter)) {
144 elmer |= ELMER0_GP_BIT6; 148 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer);
145 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer); 149 elmer |= ELMER0_GP_BIT6;
150 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer);
151 }
146 return 0; 152 return 0;
147} 153}
148 154