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authorDavid S. Miller <davem@davemloft.net>2014-04-01 17:49:50 -0400
committerDavid S. Miller <davem@davemloft.net>2014-04-01 17:49:50 -0400
commitf91ca783f11029940aa60a9a5aad4dce666e6414 (patch)
treef5ec20b9cbf024eabdfb7862f4fd6d51e31be8ea /drivers/net/can/c_can
parent7f1f6056f2f7293d5108eda905af42df58b78370 (diff)
parentb1d8e431bd5639c03ff99d08fd2d5d621969bdc5 (diff)
Merge tag 'linux-can-fixes-for-3.15-20140401' of git://gitorious.org/linux-can/linux-can
linux-can-fixes-for-3.15-20140401 Marc Kleine-Budde says: ==================== this is a pull request of 16 patches for the 3.15 release cycle. Bjorn Van Tilt contributes a patch which fixes a memory leak in usb_8dev's usb_8dev_start_xmit()s error path. A patch by Robert Schwebel fixes a typo in the can documentation. The remaining patches all target the c_can driver. Two of them are by me; they add a missing netif_napi_del() and return value checking. Thomas Gleixner contributes 12 patches, which address several shortcomings in the driver like hardware initialisation, concurrency, message ordering and poor performance. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/can/c_can')
-rw-r--r--drivers/net/can/c_can/c_can.c348
-rw-r--r--drivers/net/can/c_can/c_can.h29
-rw-r--r--drivers/net/can/c_can/c_can_platform.c47
3 files changed, 264 insertions, 160 deletions
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index 9c32e9ef7694..a5c8dcfa8357 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -114,6 +114,14 @@
114 IF_COMM_CONTROL | IF_COMM_TXRQST | \ 114 IF_COMM_CONTROL | IF_COMM_TXRQST | \
115 IF_COMM_DATAA | IF_COMM_DATAB) 115 IF_COMM_DATAA | IF_COMM_DATAB)
116 116
117/* For the low buffers we clear the interrupt bit, but keep newdat */
118#define IF_COMM_RCV_LOW (IF_COMM_MASK | IF_COMM_ARB | \
119 IF_COMM_CONTROL | IF_COMM_CLR_INT_PND | \
120 IF_COMM_DATAA | IF_COMM_DATAB)
121
122/* For the high buffers we clear the interrupt bit and newdat */
123#define IF_COMM_RCV_HIGH (IF_COMM_RCV_LOW | IF_COMM_TXRQST)
124
117/* IFx arbitration */ 125/* IFx arbitration */
118#define IF_ARB_MSGVAL BIT(15) 126#define IF_ARB_MSGVAL BIT(15)
119#define IF_ARB_MSGXTD BIT(14) 127#define IF_ARB_MSGXTD BIT(14)
@@ -122,7 +130,6 @@
122/* IFx message control */ 130/* IFx message control */
123#define IF_MCONT_NEWDAT BIT(15) 131#define IF_MCONT_NEWDAT BIT(15)
124#define IF_MCONT_MSGLST BIT(14) 132#define IF_MCONT_MSGLST BIT(14)
125#define IF_MCONT_CLR_MSGLST (0 << 14)
126#define IF_MCONT_INTPND BIT(13) 133#define IF_MCONT_INTPND BIT(13)
127#define IF_MCONT_UMASK BIT(12) 134#define IF_MCONT_UMASK BIT(12)
128#define IF_MCONT_TXIE BIT(11) 135#define IF_MCONT_TXIE BIT(11)
@@ -133,31 +140,10 @@
133#define IF_MCONT_DLC_MASK 0xf 140#define IF_MCONT_DLC_MASK 0xf
134 141
135/* 142/*
136 * IFx register masks: 143 * Use IF1 for RX and IF2 for TX
137 * allow easy operation on 16-bit registers when the
138 * argument is 32-bit instead
139 */ 144 */
140#define IFX_WRITE_LOW_16BIT(x) ((x) & 0xFFFF) 145#define IF_RX 0
141#define IFX_WRITE_HIGH_16BIT(x) (((x) & 0xFFFF0000) >> 16) 146#define IF_TX 1
142
143/* message object split */
144#define C_CAN_NO_OF_OBJECTS 32
145#define C_CAN_MSG_OBJ_RX_NUM 16
146#define C_CAN_MSG_OBJ_TX_NUM 16
147
148#define C_CAN_MSG_OBJ_RX_FIRST 1
149#define C_CAN_MSG_OBJ_RX_LAST (C_CAN_MSG_OBJ_RX_FIRST + \
150 C_CAN_MSG_OBJ_RX_NUM - 1)
151
152#define C_CAN_MSG_OBJ_TX_FIRST (C_CAN_MSG_OBJ_RX_LAST + 1)
153#define C_CAN_MSG_OBJ_TX_LAST (C_CAN_MSG_OBJ_TX_FIRST + \
154 C_CAN_MSG_OBJ_TX_NUM - 1)
155
156#define C_CAN_MSG_OBJ_RX_SPLIT 9
157#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
158
159#define C_CAN_NEXT_MSG_OBJ_MASK (C_CAN_MSG_OBJ_TX_NUM - 1)
160#define RECEIVE_OBJECT_BITS 0x0000ffff
161 147
162/* status interrupt */ 148/* status interrupt */
163#define STATUS_INTERRUPT 0x8000 149#define STATUS_INTERRUPT 0x8000
@@ -246,10 +232,9 @@ static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
246 C_CAN_MSG_OBJ_TX_FIRST; 232 C_CAN_MSG_OBJ_TX_FIRST;
247} 233}
248 234
249static inline int get_tx_echo_msg_obj(const struct c_can_priv *priv) 235static inline int get_tx_echo_msg_obj(int txecho)
250{ 236{
251 return (priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) + 237 return (txecho & C_CAN_NEXT_MSG_OBJ_MASK) + C_CAN_MSG_OBJ_TX_FIRST;
252 C_CAN_MSG_OBJ_TX_FIRST;
253} 238}
254 239
255static u32 c_can_read_reg32(struct c_can_priv *priv, enum reg index) 240static u32 c_can_read_reg32(struct c_can_priv *priv, enum reg index)
@@ -366,18 +351,6 @@ static void c_can_write_msg_object(struct net_device *dev,
366 c_can_object_put(dev, iface, objno, IF_COMM_ALL); 351 c_can_object_put(dev, iface, objno, IF_COMM_ALL);
367} 352}
368 353
369static inline void c_can_mark_rx_msg_obj(struct net_device *dev,
370 int iface, int ctrl_mask,
371 int obj)
372{
373 struct c_can_priv *priv = netdev_priv(dev);
374
375 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface),
376 ctrl_mask & ~(IF_MCONT_MSGLST | IF_MCONT_INTPND));
377 c_can_object_put(dev, iface, obj, IF_COMM_CONTROL);
378
379}
380
381static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev, 354static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,
382 int iface, 355 int iface,
383 int ctrl_mask) 356 int ctrl_mask)
@@ -387,45 +360,27 @@ static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,
387 360
388 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++) { 361 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++) {
389 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 362 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface),
390 ctrl_mask & ~(IF_MCONT_MSGLST | 363 ctrl_mask & ~IF_MCONT_NEWDAT);
391 IF_MCONT_INTPND | IF_MCONT_NEWDAT));
392 c_can_object_put(dev, iface, i, IF_COMM_CONTROL); 364 c_can_object_put(dev, iface, i, IF_COMM_CONTROL);
393 } 365 }
394} 366}
395 367
396static inline void c_can_activate_rx_msg_obj(struct net_device *dev, 368static int c_can_handle_lost_msg_obj(struct net_device *dev,
397 int iface, int ctrl_mask, 369 int iface, int objno, u32 ctrl)
398 int obj)
399{
400 struct c_can_priv *priv = netdev_priv(dev);
401
402 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface),
403 ctrl_mask & ~(IF_MCONT_MSGLST |
404 IF_MCONT_INTPND | IF_MCONT_NEWDAT));
405 c_can_object_put(dev, iface, obj, IF_COMM_CONTROL);
406}
407
408static void c_can_handle_lost_msg_obj(struct net_device *dev,
409 int iface, int objno)
410{ 370{
411 struct c_can_priv *priv = netdev_priv(dev);
412 struct net_device_stats *stats = &dev->stats; 371 struct net_device_stats *stats = &dev->stats;
413 struct sk_buff *skb; 372 struct c_can_priv *priv = netdev_priv(dev);
414 struct can_frame *frame; 373 struct can_frame *frame;
374 struct sk_buff *skb;
415 375
416 netdev_err(dev, "msg lost in buffer %d\n", objno); 376 ctrl &= ~(IF_MCONT_MSGLST | IF_MCONT_INTPND | IF_MCONT_NEWDAT);
417 377 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
418 c_can_object_get(dev, iface, objno, IF_COMM_ALL & ~IF_COMM_TXRQST); 378 c_can_object_put(dev, iface, objno, IF_COMM_CONTROL);
419
420 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface),
421 IF_MCONT_CLR_MSGLST);
422
423 c_can_object_put(dev, 0, objno, IF_COMM_CONTROL);
424 379
425 /* create an error msg */ 380 /* create an error msg */
426 skb = alloc_can_err_skb(dev, &frame); 381 skb = alloc_can_err_skb(dev, &frame);
427 if (unlikely(!skb)) 382 if (unlikely(!skb))
428 return; 383 return 0;
429 384
430 frame->can_id |= CAN_ERR_CRTL; 385 frame->can_id |= CAN_ERR_CRTL;
431 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 386 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
@@ -433,6 +388,7 @@ static void c_can_handle_lost_msg_obj(struct net_device *dev,
433 stats->rx_over_errors++; 388 stats->rx_over_errors++;
434 389
435 netif_receive_skb(skb); 390 netif_receive_skb(skb);
391 return 1;
436} 392}
437 393
438static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl) 394static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl)
@@ -477,9 +433,6 @@ static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl)
477 433
478 stats->rx_packets++; 434 stats->rx_packets++;
479 stats->rx_bytes += frame->can_dlc; 435 stats->rx_bytes += frame->can_dlc;
480
481 can_led_event(dev, CAN_LED_EVENT_RX);
482
483 return 0; 436 return 0;
484} 437}
485 438
@@ -548,10 +501,12 @@ static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
548 if (can_dropped_invalid_skb(dev, skb)) 501 if (can_dropped_invalid_skb(dev, skb))
549 return NETDEV_TX_OK; 502 return NETDEV_TX_OK;
550 503
504 spin_lock_bh(&priv->xmit_lock);
551 msg_obj_no = get_tx_next_msg_obj(priv); 505 msg_obj_no = get_tx_next_msg_obj(priv);
552 506
553 /* prepare message object for transmission */ 507 /* prepare message object for transmission */
554 c_can_write_msg_object(dev, 0, frame, msg_obj_no); 508 c_can_write_msg_object(dev, IF_TX, frame, msg_obj_no);
509 priv->dlc[msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST] = frame->can_dlc;
555 can_put_echo_skb(skb, dev, msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST); 510 can_put_echo_skb(skb, dev, msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST);
556 511
557 /* 512 /*
@@ -562,10 +517,26 @@ static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
562 if (c_can_is_next_tx_obj_busy(priv, get_tx_next_msg_obj(priv)) || 517 if (c_can_is_next_tx_obj_busy(priv, get_tx_next_msg_obj(priv)) ||
563 (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) == 0) 518 (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) == 0)
564 netif_stop_queue(dev); 519 netif_stop_queue(dev);
520 spin_unlock_bh(&priv->xmit_lock);
565 521
566 return NETDEV_TX_OK; 522 return NETDEV_TX_OK;
567} 523}
568 524
525static int c_can_wait_for_ctrl_init(struct net_device *dev,
526 struct c_can_priv *priv, u32 init)
527{
528 int retry = 0;
529
530 while (init != (priv->read_reg(priv, C_CAN_CTRL_REG) & CONTROL_INIT)) {
531 udelay(10);
532 if (retry++ > 1000) {
533 netdev_err(dev, "CCTRL: set CONTROL_INIT failed\n");
534 return -EIO;
535 }
536 }
537 return 0;
538}
539
569static int c_can_set_bittiming(struct net_device *dev) 540static int c_can_set_bittiming(struct net_device *dev)
570{ 541{
571 unsigned int reg_btr, reg_brpe, ctrl_save; 542 unsigned int reg_btr, reg_brpe, ctrl_save;
@@ -573,6 +544,7 @@ static int c_can_set_bittiming(struct net_device *dev)
573 u32 ten_bit_brp; 544 u32 ten_bit_brp;
574 struct c_can_priv *priv = netdev_priv(dev); 545 struct c_can_priv *priv = netdev_priv(dev);
575 const struct can_bittiming *bt = &priv->can.bittiming; 546 const struct can_bittiming *bt = &priv->can.bittiming;
547 int res;
576 548
577 /* c_can provides a 6-bit brp and 4-bit brpe fields */ 549 /* c_can provides a 6-bit brp and 4-bit brpe fields */
578 ten_bit_brp = bt->brp - 1; 550 ten_bit_brp = bt->brp - 1;
@@ -590,13 +562,17 @@ static int c_can_set_bittiming(struct net_device *dev)
590 "setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe); 562 "setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);
591 563
592 ctrl_save = priv->read_reg(priv, C_CAN_CTRL_REG); 564 ctrl_save = priv->read_reg(priv, C_CAN_CTRL_REG);
593 priv->write_reg(priv, C_CAN_CTRL_REG, 565 ctrl_save &= ~CONTROL_INIT;
594 ctrl_save | CONTROL_CCE | CONTROL_INIT); 566 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_CCE | CONTROL_INIT);
567 res = c_can_wait_for_ctrl_init(dev, priv, CONTROL_INIT);
568 if (res)
569 return res;
570
595 priv->write_reg(priv, C_CAN_BTR_REG, reg_btr); 571 priv->write_reg(priv, C_CAN_BTR_REG, reg_btr);
596 priv->write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe); 572 priv->write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe);
597 priv->write_reg(priv, C_CAN_CTRL_REG, ctrl_save); 573 priv->write_reg(priv, C_CAN_CTRL_REG, ctrl_save);
598 574
599 return 0; 575 return c_can_wait_for_ctrl_init(dev, priv, 0);
600} 576}
601 577
602/* 578/*
@@ -614,14 +590,14 @@ static void c_can_configure_msg_objects(struct net_device *dev)
614 590
615 /* first invalidate all message objects */ 591 /* first invalidate all message objects */
616 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_NO_OF_OBJECTS; i++) 592 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_NO_OF_OBJECTS; i++)
617 c_can_inval_msg_object(dev, 0, i); 593 c_can_inval_msg_object(dev, IF_RX, i);
618 594
619 /* setup receive message objects */ 595 /* setup receive message objects */
620 for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++) 596 for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++)
621 c_can_setup_receive_object(dev, 0, i, 0, 0, 597 c_can_setup_receive_object(dev, IF_RX, i, 0, 0,
622 (IF_MCONT_RXIE | IF_MCONT_UMASK) & ~IF_MCONT_EOB); 598 (IF_MCONT_RXIE | IF_MCONT_UMASK) & ~IF_MCONT_EOB);
623 599
624 c_can_setup_receive_object(dev, 0, C_CAN_MSG_OBJ_RX_LAST, 0, 0, 600 c_can_setup_receive_object(dev, IF_RX, C_CAN_MSG_OBJ_RX_LAST, 0, 0,
625 IF_MCONT_EOB | IF_MCONT_RXIE | IF_MCONT_UMASK); 601 IF_MCONT_EOB | IF_MCONT_RXIE | IF_MCONT_UMASK);
626} 602}
627 603
@@ -631,7 +607,7 @@ static void c_can_configure_msg_objects(struct net_device *dev)
631 * - set operating mode 607 * - set operating mode
632 * - configure message objects 608 * - configure message objects
633 */ 609 */
634static void c_can_chip_config(struct net_device *dev) 610static int c_can_chip_config(struct net_device *dev)
635{ 611{
636 struct c_can_priv *priv = netdev_priv(dev); 612 struct c_can_priv *priv = netdev_priv(dev);
637 613
@@ -668,15 +644,18 @@ static void c_can_chip_config(struct net_device *dev)
668 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED); 644 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
669 645
670 /* set bittiming params */ 646 /* set bittiming params */
671 c_can_set_bittiming(dev); 647 return c_can_set_bittiming(dev);
672} 648}
673 649
674static void c_can_start(struct net_device *dev) 650static int c_can_start(struct net_device *dev)
675{ 651{
676 struct c_can_priv *priv = netdev_priv(dev); 652 struct c_can_priv *priv = netdev_priv(dev);
653 int err;
677 654
678 /* basic c_can configuration */ 655 /* basic c_can configuration */
679 c_can_chip_config(dev); 656 err = c_can_chip_config(dev);
657 if (err)
658 return err;
680 659
681 priv->can.state = CAN_STATE_ERROR_ACTIVE; 660 priv->can.state = CAN_STATE_ERROR_ACTIVE;
682 661
@@ -685,6 +664,8 @@ static void c_can_start(struct net_device *dev)
685 664
686 /* enable status change, error and module interrupts */ 665 /* enable status change, error and module interrupts */
687 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS); 666 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS);
667
668 return 0;
688} 669}
689 670
690static void c_can_stop(struct net_device *dev) 671static void c_can_stop(struct net_device *dev)
@@ -700,9 +681,13 @@ static void c_can_stop(struct net_device *dev)
700 681
701static int c_can_set_mode(struct net_device *dev, enum can_mode mode) 682static int c_can_set_mode(struct net_device *dev, enum can_mode mode)
702{ 683{
684 int err;
685
703 switch (mode) { 686 switch (mode) {
704 case CAN_MODE_START: 687 case CAN_MODE_START:
705 c_can_start(dev); 688 err = c_can_start(dev);
689 if (err)
690 return err;
706 netif_wake_queue(dev); 691 netif_wake_queue(dev);
707 break; 692 break;
708 default: 693 default:
@@ -740,8 +725,6 @@ static int c_can_get_berr_counter(const struct net_device *dev,
740} 725}
741 726
742/* 727/*
743 * theory of operation:
744 *
745 * priv->tx_echo holds the number of the oldest can_frame put for 728 * priv->tx_echo holds the number of the oldest can_frame put for
746 * transmission into the hardware, but not yet ACKed by the CAN tx 729 * transmission into the hardware, but not yet ACKed by the CAN tx
747 * complete IRQ. 730 * complete IRQ.
@@ -752,33 +735,113 @@ static int c_can_get_berr_counter(const struct net_device *dev,
752 */ 735 */
753static void c_can_do_tx(struct net_device *dev) 736static void c_can_do_tx(struct net_device *dev)
754{ 737{
755 u32 val;
756 u32 msg_obj_no;
757 struct c_can_priv *priv = netdev_priv(dev); 738 struct c_can_priv *priv = netdev_priv(dev);
758 struct net_device_stats *stats = &dev->stats; 739 struct net_device_stats *stats = &dev->stats;
740 u32 val, obj, pkts = 0, bytes = 0;
759 741
760 for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) { 742 spin_lock_bh(&priv->xmit_lock);
761 msg_obj_no = get_tx_echo_msg_obj(priv); 743
744 for (; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) {
745 obj = get_tx_echo_msg_obj(priv->tx_echo);
762 val = c_can_read_reg32(priv, C_CAN_TXRQST1_REG); 746 val = c_can_read_reg32(priv, C_CAN_TXRQST1_REG);
763 if (!(val & (1 << (msg_obj_no - 1)))) { 747
764 can_get_echo_skb(dev, 748 if (val & (1 << (obj - 1)))
765 msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST);
766 c_can_object_get(dev, 0, msg_obj_no, IF_COMM_ALL);
767 stats->tx_bytes += priv->read_reg(priv,
768 C_CAN_IFACE(MSGCTRL_REG, 0))
769 & IF_MCONT_DLC_MASK;
770 stats->tx_packets++;
771 can_led_event(dev, CAN_LED_EVENT_TX);
772 c_can_inval_msg_object(dev, 0, msg_obj_no);
773 } else {
774 break; 749 break;
775 } 750
751 can_get_echo_skb(dev, obj - C_CAN_MSG_OBJ_TX_FIRST);
752 bytes += priv->dlc[obj - C_CAN_MSG_OBJ_TX_FIRST];
753 pkts++;
754 c_can_inval_msg_object(dev, IF_TX, obj);
776 } 755 }
777 756
778 /* restart queue if wrap-up or if queue stalled on last pkt */ 757 /* restart queue if wrap-up or if queue stalled on last pkt */
779 if (((priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) != 0) || 758 if (((priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) != 0) ||
780 ((priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) == 0)) 759 ((priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) == 0))
781 netif_wake_queue(dev); 760 netif_wake_queue(dev);
761
762 spin_unlock_bh(&priv->xmit_lock);
763
764 if (pkts) {
765 stats->tx_bytes += bytes;
766 stats->tx_packets += pkts;
767 can_led_event(dev, CAN_LED_EVENT_TX);
768 }
769}
770
771/*
772 * If we have a gap in the pending bits, that means we either
773 * raced with the hardware or failed to readout all upper
774 * objects in the last run due to quota limit.
775 */
776static u32 c_can_adjust_pending(u32 pend)
777{
778 u32 weight, lasts;
779
780 if (pend == RECEIVE_OBJECT_BITS)
781 return pend;
782
783 /*
784 * If the last set bit is larger than the number of pending
785 * bits we have a gap.
786 */
787 weight = hweight32(pend);
788 lasts = fls(pend);
789
790 /* If the bits are linear, nothing to do */
791 if (lasts == weight)
792 return pend;
793
794 /*
795 * Find the first set bit after the gap. We walk backwards
796 * from the last set bit.
797 */
798 for (lasts--; pend & (1 << (lasts - 1)); lasts--);
799
800 return pend & ~((1 << lasts) - 1);
801}
802
803static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
804 u32 pend, int quota)
805{
806 u32 pkts = 0, ctrl, obj, mcmd;
807
808 while ((obj = ffs(pend)) && quota > 0) {
809 pend &= ~BIT(obj - 1);
810
811 mcmd = obj < C_CAN_MSG_RX_LOW_LAST ?
812 IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;
813
814 c_can_object_get(dev, IF_RX, obj, mcmd);
815 ctrl = priv->read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_RX));
816
817 if (ctrl & IF_MCONT_MSGLST) {
818 int n = c_can_handle_lost_msg_obj(dev, IF_RX, obj, ctrl);
819
820 pkts += n;
821 quota -= n;
822 continue;
823 }
824
825 /*
826 * This really should not happen, but this covers some
827 * odd HW behaviour. Do not remove that unless you
828 * want to brick your machine.
829 */
830 if (!(ctrl & IF_MCONT_NEWDAT))
831 continue;
832
833 /* read the data from the message object */
834 c_can_read_msg_object(dev, IF_RX, ctrl);
835
836 if (obj == C_CAN_MSG_RX_LOW_LAST)
837 /* activate all lower message objects */
838 c_can_activate_all_lower_rx_msg_obj(dev, IF_RX, ctrl);
839
840 pkts++;
841 quota--;
842 }
843
844 return pkts;
782} 845}
783 846
784/* 847/*
@@ -805,10 +868,8 @@ static void c_can_do_tx(struct net_device *dev)
805 */ 868 */
806static int c_can_do_rx_poll(struct net_device *dev, int quota) 869static int c_can_do_rx_poll(struct net_device *dev, int quota)
807{ 870{
808 u32 num_rx_pkts = 0;
809 unsigned int msg_obj, msg_ctrl_save;
810 struct c_can_priv *priv = netdev_priv(dev); 871 struct c_can_priv *priv = netdev_priv(dev);
811 u16 val; 872 u32 pkts = 0, pend = 0, toread, n;
812 873
813 /* 874 /*
814 * It is faster to read only one 16bit register. This is only possible 875 * It is faster to read only one 16bit register. This is only possible
@@ -817,49 +878,31 @@ static int c_can_do_rx_poll(struct net_device *dev, int quota)
817 BUILD_BUG_ON_MSG(C_CAN_MSG_OBJ_RX_LAST > 16, 878 BUILD_BUG_ON_MSG(C_CAN_MSG_OBJ_RX_LAST > 16,
818 "Implementation does not support more message objects than 16"); 879 "Implementation does not support more message objects than 16");
819 880
820 while (quota > 0 && (val = priv->read_reg(priv, C_CAN_INTPND1_REG))) { 881 while (quota > 0) {
821 while ((msg_obj = ffs(val)) && quota > 0) { 882 if (!pend) {
822 val &= ~BIT(msg_obj - 1); 883 pend = priv->read_reg(priv, C_CAN_INTPND1_REG);
823 884 if (!pend)
824 c_can_object_get(dev, 0, msg_obj, IF_COMM_ALL & 885 break;
825 ~IF_COMM_TXRQST); 886 /*
826 msg_ctrl_save = priv->read_reg(priv, 887 * If the pending field has a gap, handle the
827 C_CAN_IFACE(MSGCTRL_REG, 0)); 888 * bits above the gap first.
828 889 */
829 if (msg_ctrl_save & IF_MCONT_MSGLST) { 890 toread = c_can_adjust_pending(pend);
830 c_can_handle_lost_msg_obj(dev, 0, msg_obj); 891 } else {
831 num_rx_pkts++; 892 toread = pend;
832 quota--;
833 continue;
834 }
835
836 if (msg_ctrl_save & IF_MCONT_EOB)
837 return num_rx_pkts;
838
839 if (!(msg_ctrl_save & IF_MCONT_NEWDAT))
840 continue;
841
842 /* read the data from the message object */
843 c_can_read_msg_object(dev, 0, msg_ctrl_save);
844
845 if (msg_obj < C_CAN_MSG_RX_LOW_LAST)
846 c_can_mark_rx_msg_obj(dev, 0,
847 msg_ctrl_save, msg_obj);
848 else if (msg_obj > C_CAN_MSG_RX_LOW_LAST)
849 /* activate this msg obj */
850 c_can_activate_rx_msg_obj(dev, 0,
851 msg_ctrl_save, msg_obj);
852 else if (msg_obj == C_CAN_MSG_RX_LOW_LAST)
853 /* activate all lower message objects */
854 c_can_activate_all_lower_rx_msg_obj(dev,
855 0, msg_ctrl_save);
856
857 num_rx_pkts++;
858 quota--;
859 } 893 }
894 /* Remove the bits from pend */
895 pend &= ~toread;
896 /* Read the objects */
897 n = c_can_read_objects(dev, priv, toread, quota);
898 pkts += n;
899 quota -= n;
860 } 900 }
861 901
862 return num_rx_pkts; 902 if (pkts)
903 can_led_event(dev, CAN_LED_EVENT_RX);
904
905 return pkts;
863} 906}
864 907
865static inline int c_can_has_and_handle_berr(struct c_can_priv *priv) 908static inline int c_can_has_and_handle_berr(struct c_can_priv *priv)
@@ -1133,17 +1176,20 @@ static int c_can_open(struct net_device *dev)
1133 goto exit_irq_fail; 1176 goto exit_irq_fail;
1134 } 1177 }
1135 1178
1136 napi_enable(&priv->napi); 1179 /* start the c_can controller */
1180 err = c_can_start(dev);
1181 if (err)
1182 goto exit_start_fail;
1137 1183
1138 can_led_event(dev, CAN_LED_EVENT_OPEN); 1184 can_led_event(dev, CAN_LED_EVENT_OPEN);
1139 1185
1140 /* start the c_can controller */ 1186 napi_enable(&priv->napi);
1141 c_can_start(dev);
1142
1143 netif_start_queue(dev); 1187 netif_start_queue(dev);
1144 1188
1145 return 0; 1189 return 0;
1146 1190
1191exit_start_fail:
1192 free_irq(dev->irq, dev);
1147exit_irq_fail: 1193exit_irq_fail:
1148 close_candev(dev); 1194 close_candev(dev);
1149exit_open_fail: 1195exit_open_fail:
@@ -1180,6 +1226,7 @@ struct net_device *alloc_c_can_dev(void)
1180 return NULL; 1226 return NULL;
1181 1227
1182 priv = netdev_priv(dev); 1228 priv = netdev_priv(dev);
1229 spin_lock_init(&priv->xmit_lock);
1183 netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT); 1230 netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT);
1184 1231
1185 priv->dev = dev; 1232 priv->dev = dev;
@@ -1260,15 +1307,16 @@ int c_can_power_up(struct net_device *dev)
1260 if (time_after(jiffies, time_out)) 1307 if (time_after(jiffies, time_out))
1261 return -ETIMEDOUT; 1308 return -ETIMEDOUT;
1262 1309
1263 c_can_start(dev); 1310 return c_can_start(dev);
1264
1265 return 0;
1266} 1311}
1267EXPORT_SYMBOL_GPL(c_can_power_up); 1312EXPORT_SYMBOL_GPL(c_can_power_up);
1268#endif 1313#endif
1269 1314
1270void free_c_can_dev(struct net_device *dev) 1315void free_c_can_dev(struct net_device *dev)
1271{ 1316{
1317 struct c_can_priv *priv = netdev_priv(dev);
1318
1319 netif_napi_del(&priv->napi);
1272 free_candev(dev); 1320 free_candev(dev);
1273} 1321}
1274EXPORT_SYMBOL_GPL(free_c_can_dev); 1322EXPORT_SYMBOL_GPL(free_c_can_dev);
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index d2e1c21b143f..faa8404162b3 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -22,6 +22,33 @@
22#ifndef C_CAN_H 22#ifndef C_CAN_H
23#define C_CAN_H 23#define C_CAN_H
24 24
25/*
26 * IFx register masks:
27 * allow easy operation on 16-bit registers when the
28 * argument is 32-bit instead
29 */
30#define IFX_WRITE_LOW_16BIT(x) ((x) & 0xFFFF)
31#define IFX_WRITE_HIGH_16BIT(x) (((x) & 0xFFFF0000) >> 16)
32
33/* message object split */
34#define C_CAN_NO_OF_OBJECTS 32
35#define C_CAN_MSG_OBJ_RX_NUM 16
36#define C_CAN_MSG_OBJ_TX_NUM 16
37
38#define C_CAN_MSG_OBJ_RX_FIRST 1
39#define C_CAN_MSG_OBJ_RX_LAST (C_CAN_MSG_OBJ_RX_FIRST + \
40 C_CAN_MSG_OBJ_RX_NUM - 1)
41
42#define C_CAN_MSG_OBJ_TX_FIRST (C_CAN_MSG_OBJ_RX_LAST + 1)
43#define C_CAN_MSG_OBJ_TX_LAST (C_CAN_MSG_OBJ_TX_FIRST + \
44 C_CAN_MSG_OBJ_TX_NUM - 1)
45
46#define C_CAN_MSG_OBJ_RX_SPLIT 9
47#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
48
49#define C_CAN_NEXT_MSG_OBJ_MASK (C_CAN_MSG_OBJ_TX_NUM - 1)
50#define RECEIVE_OBJECT_BITS 0x0000ffff
51
25enum reg { 52enum reg {
26 C_CAN_CTRL_REG = 0, 53 C_CAN_CTRL_REG = 0,
27 C_CAN_CTRL_EX_REG, 54 C_CAN_CTRL_EX_REG,
@@ -156,6 +183,7 @@ struct c_can_priv {
156 struct napi_struct napi; 183 struct napi_struct napi;
157 struct net_device *dev; 184 struct net_device *dev;
158 struct device *device; 185 struct device *device;
186 spinlock_t xmit_lock;
159 int tx_object; 187 int tx_object;
160 int current_status; 188 int current_status;
161 int last_status; 189 int last_status;
@@ -172,6 +200,7 @@ struct c_can_priv {
172 u32 __iomem *raminit_ctrlreg; 200 u32 __iomem *raminit_ctrlreg;
173 unsigned int instance; 201 unsigned int instance;
174 void (*raminit) (const struct c_can_priv *priv, bool enable); 202 void (*raminit) (const struct c_can_priv *priv, bool enable);
203 u32 dlc[C_CAN_MSG_OBJ_TX_NUM];
175}; 204};
176 205
177struct net_device *alloc_c_can_dev(void); 206struct net_device *alloc_c_can_dev(void);
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
index d66ac265269c..806d92753427 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -37,8 +37,10 @@
37 37
38#include "c_can.h" 38#include "c_can.h"
39 39
40#define CAN_RAMINIT_START_MASK(i) (1 << (i)) 40#define CAN_RAMINIT_START_MASK(i) (0x001 << (i))
41 41#define CAN_RAMINIT_DONE_MASK(i) (0x100 << (i))
42#define CAN_RAMINIT_ALL_MASK(i) (0x101 << (i))
43static DEFINE_SPINLOCK(raminit_lock);
42/* 44/*
43 * 16-bit c_can registers can be arranged differently in the memory 45 * 16-bit c_can registers can be arranged differently in the memory
44 * architecture of different implementations. For example: 16-bit 46 * architecture of different implementations. For example: 16-bit
@@ -69,16 +71,41 @@ static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
69 writew(val, priv->base + 2 * priv->regs[index]); 71 writew(val, priv->base + 2 * priv->regs[index]);
70} 72}
71 73
74static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,
75 u32 val)
76{
77 /* We look only at the bits of our instance. */
78 val &= mask;
79 while ((readl(priv->raminit_ctrlreg) & mask) != val)
80 udelay(1);
81}
82
72static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable) 83static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
73{ 84{
74 u32 val; 85 u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance);
75 86 u32 ctrl;
76 val = readl(priv->raminit_ctrlreg); 87
77 if (enable) 88 spin_lock(&raminit_lock);
78 val |= CAN_RAMINIT_START_MASK(priv->instance); 89
79 else 90 ctrl = readl(priv->raminit_ctrlreg);
80 val &= ~CAN_RAMINIT_START_MASK(priv->instance); 91 /* We clear the done and start bit first. The start bit is
81 writel(val, priv->raminit_ctrlreg); 92 * looking at the 0 -> transition, but is not self clearing;
93 * And we clear the init done bit as well.
94 */
95 ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance);
96 ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
97 writel(ctrl, priv->raminit_ctrlreg);
98 ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance);
99 c_can_hw_raminit_wait(priv, ctrl, mask);
100
101 if (enable) {
102 /* Set start bit and wait for the done bit. */
103 ctrl |= CAN_RAMINIT_START_MASK(priv->instance);
104 writel(ctrl, priv->raminit_ctrlreg);
105 ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
106 c_can_hw_raminit_wait(priv, ctrl, mask);
107 }
108 spin_unlock(&raminit_lock);
82} 109}
83 110
84static struct platform_device_id c_can_id_table[] = { 111static struct platform_device_id c_can_id_table[] = {