diff options
author | Dmitry Kravkov <dmitry@broadcom.com> | 2011-08-08 23:10:29 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-08-11 10:14:53 -0400 |
commit | 9f0096a1578bca77b28762c89b29affee69a20f4 (patch) | |
tree | 06c6df4da24842e324510b7d315ca8be4bc190d9 /drivers/net/bnx2x/bnx2x_main.c | |
parent | 2031bd3a8adce1259756e7f142b230c010035995 (diff) |
bnx2x: properly clean indirect addresses
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_main.c')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_main.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index 1f5467f9548c..f74582a22c68 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -10259,10 +10259,17 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
10259 | /* clean indirect addresses */ | 10259 | /* clean indirect addresses */ |
10260 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, | 10260 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, |
10261 | PCICFG_VENDOR_ID_OFFSET); | 10261 | PCICFG_VENDOR_ID_OFFSET); |
10262 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0 + BP_PORT(bp)*16, 0); | 10262 | /* Clean the following indirect addresses for all functions since it |
10263 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0 + BP_PORT(bp)*16, 0); | 10263 | * is not used by the driver. |
10264 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0 + BP_PORT(bp)*16, 0); | 10264 | */ |
10265 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0 + BP_PORT(bp)*16, 0); | 10265 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0, 0); |
10266 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0, 0); | ||
10267 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0); | ||
10268 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0); | ||
10269 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0); | ||
10270 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0); | ||
10271 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0); | ||
10272 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F1, 0); | ||
10266 | 10273 | ||
10267 | /* | 10274 | /* |
10268 | * Enable internal target-read (in case we are probed after PF FLR). | 10275 | * Enable internal target-read (in case we are probed after PF FLR). |