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authorKukjin Kim <kgene.kim@samsung.com>2014-07-01 18:53:06 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-12 18:35:14 -0400
commite393bc090088f731299def1cf466d45707cd9a6d (patch)
tree0270410e97b566f446eaf116bb901773804ab177 /drivers/mtd
parentf34b89bf836ed83b8afb554b0879269d545c8754 (diff)
mtd: onenand: remove s5pc100 related onenand codes
This patch removes s5pc100 related onenand codes because of no more support for S5PC100 SoC in mainline. Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/onenand/Kconfig4
-rw-r--r--drivers/mtd/onenand/samsung.c25
2 files changed, 3 insertions, 26 deletions
diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig
index ab2607273e80..dcae2f6a2b11 100644
--- a/drivers/mtd/onenand/Kconfig
+++ b/drivers/mtd/onenand/Kconfig
@@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2
32 32
33config MTD_ONENAND_SAMSUNG 33config MTD_ONENAND_SAMSUNG
34 tristate "OneNAND on Samsung SOC controller support" 34 tristate "OneNAND on Samsung SOC controller support"
35 depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4 35 depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4
36 help 36 help
37 Support for a OneNAND flash device connected to an Samsung SOC. 37 Support for a OneNAND flash device connected to an Samsung SOC.
38 S3C64XX/S5PC100 use command mapping method. 38 S3C64XX uses command mapping method.
39 S5PC110/S5PC210 use generic OneNAND method. 39 S5PC110/S5PC210 use generic OneNAND method.
40 40
41config MTD_ONENAND_OTP 41config MTD_ONENAND_OTP
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index efb819c3df2f..19cfb97adbc0 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -10,7 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 * Implementation: 12 * Implementation:
13 * S3C64XX and S5PC100: emulate the pseudo BufferRAM 13 * S3C64XX: emulate the pseudo BufferRAM
14 * S5PC110: use DMA 14 * S5PC110: use DMA
15 */ 15 */
16 16
@@ -32,7 +32,6 @@
32enum soc_type { 32enum soc_type {
33 TYPE_S3C6400, 33 TYPE_S3C6400,
34 TYPE_S3C6410, 34 TYPE_S3C6410,
35 TYPE_S5PC100,
36 TYPE_S5PC110, 35 TYPE_S5PC110,
37}; 36};
38 37
@@ -59,7 +58,6 @@ enum soc_type {
59#define MAP_11 (0x3) 58#define MAP_11 (0x3)
60 59
61#define S3C64XX_CMD_MAP_SHIFT 24 60#define S3C64XX_CMD_MAP_SHIFT 24
62#define S5PC100_CMD_MAP_SHIFT 26
63 61
64#define S3C6400_FBA_SHIFT 10 62#define S3C6400_FBA_SHIFT 10
65#define S3C6400_FPA_SHIFT 4 63#define S3C6400_FPA_SHIFT 4
@@ -69,10 +67,6 @@ enum soc_type {
69#define S3C6410_FPA_SHIFT 6 67#define S3C6410_FPA_SHIFT 6
70#define S3C6410_FSA_SHIFT 4 68#define S3C6410_FSA_SHIFT 4
71 69
72#define S5PC100_FBA_SHIFT 13
73#define S5PC100_FPA_SHIFT 7
74#define S5PC100_FSA_SHIFT 5
75
76/* S5PC110 specific definitions */ 70/* S5PC110 specific definitions */
77#define S5PC110_DMA_SRC_ADDR 0x400 71#define S5PC110_DMA_SRC_ADDR 0x400
78#define S5PC110_DMA_SRC_CFG 0x404 72#define S5PC110_DMA_SRC_CFG 0x404
@@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val)
195 return (type << S3C64XX_CMD_MAP_SHIFT) | val; 189 return (type << S3C64XX_CMD_MAP_SHIFT) | val;
196} 190}
197 191
198static unsigned int s5pc1xx_cmd_map(unsigned type, unsigned val)
199{
200 return (type << S5PC100_CMD_MAP_SHIFT) | val;
201}
202
203static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa) 192static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa)
204{ 193{
205 return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) | 194 return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) |
@@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa)
212 (fsa << S3C6410_FSA_SHIFT); 201 (fsa << S3C6410_FSA_SHIFT);
213} 202}
214 203
215static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa)
216{
217 return (fba << S5PC100_FBA_SHIFT) | (fpa << S5PC100_FPA_SHIFT) |
218 (fsa << S5PC100_FSA_SHIFT);
219}
220
221static void s3c_onenand_reset(void) 204static void s3c_onenand_reset(void)
222{ 205{
223 unsigned long timeout = 0x10000; 206 unsigned long timeout = 0x10000;
@@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
835 } else if (onenand->type == TYPE_S3C6410) { 818 } else if (onenand->type == TYPE_S3C6410) {
836 onenand->mem_addr = s3c6410_mem_addr; 819 onenand->mem_addr = s3c6410_mem_addr;
837 onenand->cmd_map = s3c64xx_cmd_map; 820 onenand->cmd_map = s3c64xx_cmd_map;
838 } else if (onenand->type == TYPE_S5PC100) {
839 onenand->mem_addr = s5pc100_mem_addr;
840 onenand->cmd_map = s5pc1xx_cmd_map;
841 } else if (onenand->type == TYPE_S5PC110) { 821 } else if (onenand->type == TYPE_S5PC110) {
842 /* Use generic onenand functions */ 822 /* Use generic onenand functions */
843 this->read_bufferram = s5pc110_read_bufferram; 823 this->read_bufferram = s5pc110_read_bufferram;
@@ -1111,9 +1091,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = {
1111 .name = "s3c6410-onenand", 1091 .name = "s3c6410-onenand",
1112 .driver_data = TYPE_S3C6410, 1092 .driver_data = TYPE_S3C6410,
1113 }, { 1093 }, {
1114 .name = "s5pc100-onenand",
1115 .driver_data = TYPE_S5PC100,
1116 }, {
1117 .name = "s5pc110-onenand", 1094 .name = "s5pc110-onenand",
1118 .driver_data = TYPE_S5PC110, 1095 .driver_data = TYPE_S5PC110,
1119 }, { }, 1096 }, { },