Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6:
  mtd: nand: Fix probe of Samsung NAND chips
  mtd: nand: Fix regression in BBM detection
  pxa3xx: fix ns2cycle equation

2 files changed, 5 insertions, 8 deletions

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a3c7473dd409..d551ddd9537a 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2866,6 +2866,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
                  */
                 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
                                 id_data[0] == NAND_MFR_SAMSUNG &&
+                                (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
                                 id_data[5] != 0x00) {
                         /* Calc pagesize */
                         mtd->writesize = 2048 << (extid & 0x03);
@@ -2934,14 +2935,10 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
                 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1;
 
         /* Set the bad block position */
-        if (!(busw & NAND_BUSWIDTH_16) && (*maf_id == NAND_MFR_STMICRO ||
-                                (*maf_id == NAND_MFR_SAMSUNG &&
-                                 mtd->writesize == 512) ||
-                                *maf_id == NAND_MFR_AMD))
-                chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
-        else
+        if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
                 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
-
+        else
+                chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
 
         /* Get chip options, preserve non chip based options */
         chip->options &= ~NAND_CHIPOPTIONS_MSK;
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index e02fa4f0e3c9..4d89f3780207 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -363,7 +363,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = {
 #define tAR_NDTR1(r)    (((r) >> 0) & 0xf)
 
 /* convert nano-seconds to nand flash controller clock cycles */
-#define ns2cycle(ns, clk)       (int)(((ns) * (clk / 1000000) / 1000) - 1)
+#define ns2cycle(ns, clk)       (int)((ns) * (clk / 1000000) / 1000)
 
 /* convert nand flash controller clock cycles to nano-seconds */
 #define cycle2ns(c, clk)        ((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))