diff options
author | Sachin Kamat <sachin.kamat@linaro.org> | 2012-07-16 06:32:26 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-09-29 09:56:48 -0400 |
commit | 54cd0208c6be19d6944f40a083fe97dd56de3489 (patch) | |
tree | 75406f1ad3d0b9f6cb44ec749965f660ad20544a /drivers/mtd/nand | |
parent | a68c5ec85685a8eb7a93a0577f91c5e0952df39e (diff) |
mtd: s3c2410: Fix checkpatch warnings and errors related to whitespaces
Fixes checkpatch warnings and errors related to whitespaces.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r-- | drivers/mtd/nand/s3c2410.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 38cecc9620e4..e82c679abe48 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c | |||
@@ -218,7 +218,7 @@ static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) | |||
218 | return result; | 218 | return result; |
219 | } | 219 | } |
220 | 220 | ||
221 | #define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk)) | 221 | #define to_ns(ticks, clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk)) |
222 | 222 | ||
223 | /* controller setup */ | 223 | /* controller setup */ |
224 | 224 | ||
@@ -261,7 +261,8 @@ static int s3c2410_nand_setrate(struct s3c2410_nand_info *info) | |||
261 | } | 261 | } |
262 | 262 | ||
263 | dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", | 263 | dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", |
264 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); | 264 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), |
265 | twrph1, to_ns(twrph1, clkrate)); | ||
265 | 266 | ||
266 | switch (info->cpu_type) { | 267 | switch (info->cpu_type) { |
267 | case TYPE_S3C2410: | 268 | case TYPE_S3C2410: |
@@ -318,13 +319,13 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info) | |||
318 | if (ret < 0) | 319 | if (ret < 0) |
319 | return ret; | 320 | return ret; |
320 | 321 | ||
321 | switch (info->cpu_type) { | 322 | switch (info->cpu_type) { |
322 | case TYPE_S3C2410: | 323 | case TYPE_S3C2410: |
323 | default: | 324 | default: |
324 | break; | 325 | break; |
325 | 326 | ||
326 | case TYPE_S3C2440: | 327 | case TYPE_S3C2440: |
327 | case TYPE_S3C2412: | 328 | case TYPE_S3C2412: |
328 | /* enable the controller and de-assert nFCE */ | 329 | /* enable the controller and de-assert nFCE */ |
329 | 330 | ||
330 | writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); | 331 | writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); |
@@ -803,7 +804,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, | |||
803 | dev_info(info->device, "System booted from NAND\n"); | 804 | dev_info(info->device, "System booted from NAND\n"); |
804 | 805 | ||
805 | break; | 806 | break; |
806 | } | 807 | } |
807 | 808 | ||
808 | chip->IO_ADDR_R = chip->IO_ADDR_W; | 809 | chip->IO_ADDR_R = chip->IO_ADDR_W; |
809 | 810 | ||
@@ -913,7 +914,7 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info, | |||
913 | static int s3c24xx_nand_probe(struct platform_device *pdev) | 914 | static int s3c24xx_nand_probe(struct platform_device *pdev) |
914 | { | 915 | { |
915 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); | 916 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
916 | enum s3c_cpu_type cpu_type; | 917 | enum s3c_cpu_type cpu_type; |
917 | struct s3c2410_nand_info *info; | 918 | struct s3c2410_nand_info *info; |
918 | struct s3c2410_nand_mtd *nmtd; | 919 | struct s3c2410_nand_mtd *nmtd; |
919 | struct s3c2410_nand_set *sets; | 920 | struct s3c2410_nand_set *sets; |