aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mmc/host
diff options
context:
space:
mode:
authorSukumar Ghorai <s-ghorai@ti.com>2010-09-15 10:49:23 -0400
committerTony Lindgren <tony@atomide.com>2010-09-27 13:15:26 -0400
commit3a63833ec3002816a759a49ebda4e229c089114e (patch)
tree0ba266febb87cd181ed414b2f3ee103c37470e88 /drivers/mmc/host
parent7193559af4243279790fd8dbfef82f8536d9c514 (diff)
omap: mmc: extended to pass host capabilities from board file
wires variable is renamed, extended and this single variable to be used to pass the platform capabilities, e.g DDR mode. Also removed the hardcoded value was using as bus-width. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/omap.c2
-rw-r--r--drivers/mmc/host/omap_hsmmc.c18
2 files changed, 3 insertions, 17 deletions
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index d98ddcfac5e5..a9d62cfa87a2 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1317,7 +1317,7 @@ static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id)
1317 host->slots[id] = slot; 1317 host->slots[id] = slot;
1318 1318
1319 mmc->caps = 0; 1319 mmc->caps = 0;
1320 if (host->pdata->slots[id].wires >= 4) 1320 if (host->pdata->slots[id].caps & MMC_CAP_8_BIT_DATA)
1321 mmc->caps |= MMC_CAP_4_BIT_DATA; 1321 mmc->caps |= MMC_CAP_4_BIT_DATA;
1322 1322
1323 mmc->ops = &mmc_omap_ops; 1323 mmc->ops = &mmc_omap_ops;
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 4526d2791f29..53f8fa599cf5 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -2116,23 +2116,9 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
2116 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 2116 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
2117 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 2117 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE;
2118 2118
2119 switch (mmc_slot(host).wires) { 2119 mmc->caps |= mmc_slot(host).caps;
2120 case 8: 2120 if (mmc->caps & MMC_CAP_8_BIT_DATA)
2121 mmc->caps |= MMC_CAP_8_BIT_DATA;
2122 /* Fall through */
2123 case 4:
2124 mmc->caps |= MMC_CAP_4_BIT_DATA; 2121 mmc->caps |= MMC_CAP_4_BIT_DATA;
2125 break;
2126 case 1:
2127 /* Nothing to crib here */
2128 case 0:
2129 /* Assuming nothing was given by board, Core use's 1-Bit */
2130 break;
2131 default:
2132 /* Completely unexpected.. Core goes with 1-Bit Width */
2133 dev_crit(mmc_dev(host->mmc), "Invalid width %d\n used!"
2134 "using 1 instead\n", mmc_slot(host).wires);
2135 }
2136 2122
2137 if (mmc_slot(host).nonremovable) 2123 if (mmc_slot(host).nonremovable)
2138 mmc->caps |= MMC_CAP_NONREMOVABLE; 2124 mmc->caps |= MMC_CAP_NONREMOVABLE;