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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2014-12-31 05:54:10 -0500
committerUlf Hansson <ulf.hansson@linaro.org>2015-01-12 04:14:56 -0500
commitaa8165f914420f143476305a01894b017d3abe6b (patch)
tree13fdeb64f343efc80cc3d7f9810df1efb114eca1 /drivers/mmc/host/sdhci-pxav3.c
parentb5540ce1512eede3bed68ab1e9949df9ad556091 (diff)
mmc: sdhci-pxav3: do the mbus window configuration after enabling clocks
In commit 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller"), the sdhci-pxav3 driver was extended to include support for the SDHCI controller found in the Armada 38x processor. This mainly involved adding some MBus window related configuration. However, this configuration is currently done too early in ->probe(): it is done before clocks are enabled, while this configuration involves touching the registers of the controller, which will hang the SoC if the clock is disabled. It wasn't noticed until now because the bootloader typically leaves gatable clocks enabled, but in situations where we have a deferred probe (due to a CD GPIO that cannot be taken, for example), then the probe will be re-tried later, after a clock disable has been done in the exit path of the failed probe attempt of the device. This second probe() will hang the system due to the clock being disabled. This can for example be produced on Armada 385 GP, which has a CD GPIO connected to an I2C PCA9555. If the driver for the PCA9555 is not compiled into the kernel, then we will have the following sequence of events: 1. The SDHCI probes 2. It does the MBus configuration (which works, because the clock is left enabled by the bootloader) 3. It enables the clock 4. It tries to get the CD GPIO, which fails due to the driver being missing, so -EPROBE_DEFER is returned. 5. Before returning -EPROBE_DEFER, the driver cleans up what was done, which includes disabling the clock. 6. Later on, the SDHCI probe is tried again. 7. It does the MBus configuration, which hangs because the clock is no longer enabled. This commit does the obvious fix of doing the MBus configuration after the clock has been enabled by the driver. Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller") Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pxav3.c')
-rw-r--r--drivers/mmc/host/sdhci-pxav3.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 45238871192d..ca3424e7ef71 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -300,13 +300,6 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
300 if (IS_ERR(host)) 300 if (IS_ERR(host))
301 return PTR_ERR(host); 301 return PTR_ERR(host);
302 302
303 if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
304 ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
305 if (ret < 0)
306 goto err_mbus_win;
307 }
308
309
310 pltfm_host = sdhci_priv(host); 303 pltfm_host = sdhci_priv(host);
311 pltfm_host->priv = pxa; 304 pltfm_host->priv = pxa;
312 305
@@ -325,6 +318,12 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
325 if (!IS_ERR(pxa->clk_core)) 318 if (!IS_ERR(pxa->clk_core))
326 clk_prepare_enable(pxa->clk_core); 319 clk_prepare_enable(pxa->clk_core);
327 320
321 if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
322 ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
323 if (ret < 0)
324 goto err_mbus_win;
325 }
326
328 /* enable 1/8V DDR capable */ 327 /* enable 1/8V DDR capable */
329 host->mmc->caps |= MMC_CAP_1_8V_DDR; 328 host->mmc->caps |= MMC_CAP_1_8V_DDR;
330 329
@@ -396,11 +395,11 @@ err_add_host:
396 pm_runtime_disable(&pdev->dev); 395 pm_runtime_disable(&pdev->dev);
397err_of_parse: 396err_of_parse:
398err_cd_req: 397err_cd_req:
398err_mbus_win:
399 clk_disable_unprepare(pxa->clk_io); 399 clk_disable_unprepare(pxa->clk_io);
400 if (!IS_ERR(pxa->clk_core)) 400 if (!IS_ERR(pxa->clk_core))
401 clk_disable_unprepare(pxa->clk_core); 401 clk_disable_unprepare(pxa->clk_core);
402err_clk_get: 402err_clk_get:
403err_mbus_win:
404 sdhci_pltfm_free(pdev); 403 sdhci_pltfm_free(pdev);
405 return ret; 404 return ret;
406} 405}