Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 538 insertions, 95 deletions

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 840b301b5671..fe140724a02e 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -2,7 +2,7 @@
  *  linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
  *
  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
- *  Copyright (C) 2010 ST-Ericsson AB.
+ *  Copyright (C) 2010 ST-Ericsson SA
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -14,17 +14,21 @@
 #include <linux/ioport.h>
 #include <linux/device.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/highmem.h>
 #include <linux/log2.h>
 #include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
 #include <linux/amba/bus.h>
 #include <linux/clk.h>
 #include <linux/scatterlist.h>
 #include <linux/gpio.h>
-#include <linux/amba/mmci.h>
 #include <linux/regulator/consumer.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/amba/mmci.h>
 
 #include <asm/div64.h>
 #include <asm/io.h>
@@ -41,27 +45,66 @@ static unsigned int fmax = 515633;
  * @clkreg: default value for MCICLOCK register
  * @clkreg_enable: enable value for MMCICLOCK register
  * @datalength_bits: number of bits in the MMCIDATALENGTH register
+ * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY
+ *            is asserted (likewise for RX)
+ * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY
+ *                is asserted (likewise for RX)
+ * @sdio: variant supports SDIO
+ * @st_clkdiv: true if using a ST-specific clock divider algorithm
+ * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register
  */
 struct variant_data {
         unsigned int            clkreg;
         unsigned int            clkreg_enable;
         unsigned int            datalength_bits;
+        unsigned int            fifosize;
+        unsigned int            fifohalfsize;
+        bool                    sdio;
+        bool                    st_clkdiv;
+        bool                    blksz_datactrl16;
 };
 
 static struct variant_data variant_arm = {
+        .fifosize               = 16 * 4,
+        .fifohalfsize           = 8 * 4,
+        .datalength_bits        = 16,
+};
+
+static struct variant_data variant_arm_extended_fifo = {
+        .fifosize               = 128 * 4,
+        .fifohalfsize           = 64 * 4,
         .datalength_bits        = 16,
 };
 
 static struct variant_data variant_u300 = {
-        .clkreg_enable          = 1 << 13, /* HWFCEN */
+        .fifosize               = 16 * 4,
+        .fifohalfsize           = 8 * 4,
+        .clkreg_enable          = MCI_ST_U300_HWFCEN,
         .datalength_bits        = 16,
+        .sdio                   = true,
 };
 
 static struct variant_data variant_ux500 = {
+        .fifosize               = 30 * 4,
+        .fifohalfsize           = 8 * 4,
         .clkreg                 = MCI_CLK_ENABLE,
-        .clkreg_enable          = 1 << 14, /* HWFCEN */
+        .clkreg_enable          = MCI_ST_UX500_HWFCEN,
         .datalength_bits        = 24,
+        .sdio                   = true,
+        .st_clkdiv              = true,
 };
+
+static struct variant_data variant_ux500v2 = {
+        .fifosize               = 30 * 4,
+        .fifohalfsize           = 8 * 4,
+        .clkreg                 = MCI_CLK_ENABLE,
+        .clkreg_enable          = MCI_ST_UX500_HWFCEN,
+        .datalength_bits        = 24,
+        .sdio                   = true,
+        .st_clkdiv              = true,
+        .blksz_datactrl16       = true,
+};
+
 /*
  * This must be called with host->lock held
  */
@@ -73,8 +116,25 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
         if (desired) {
                 if (desired >= host->mclk) {
                         clk = MCI_CLK_BYPASS;
+                        if (variant->st_clkdiv)
+                                clk |= MCI_ST_UX500_NEG_EDGE;
                         host->cclk = host->mclk;
+                } else if (variant->st_clkdiv) {
+                        /*
+                         * DB8500 TRM says f = mclk / (clkdiv + 2)
+                         * => clkdiv = (mclk / f) - 2
+                         * Round the divider up so we don't exceed the max
+                         * frequency
+                         */
+                        clk = DIV_ROUND_UP(host->mclk, desired) - 2;
+                        if (clk >= 256)
+                                clk = 255;
+                        host->cclk = host->mclk / (clk + 2);
                 } else {
+                        /*
+                         * PL180 TRM says f = mclk / (2 * (clkdiv + 1))
+                         * => clkdiv = mclk / (2 * f) - 1
+                         */
                         clk = host->mclk / (2 * desired) - 1;
                         if (clk >= 256)
                                 clk = 255;
@@ -105,9 +165,6 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
         host->mrq = NULL;
         host->cmd = NULL;
 
-        if (mrq->data)
-                mrq->data->bytes_xfered = host->data_xfered;
-
         /*
          * Need to drop the host lock here; mmc_request_done may call
          * back into the driver...
@@ -117,10 +174,26 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
         spin_lock(&host->lock);
 }
 
+static void mmci_set_mask1(struct mmci_host *host, unsigned int mask)
+{
+        void __iomem *base = host->base;
+
+        if (host->singleirq) {
+                unsigned int mask0 = readl(base + MMCIMASK0);
+
+                mask0 &= ~MCI_IRQ1MASK;
+                mask0 |= mask;
+
+                writel(mask0, base + MMCIMASK0);
+        }
+
+        writel(mask, base + MMCIMASK1);
+}
+
 static void mmci_stop_data(struct mmci_host *host)
 {
         writel(0, host->base + MMCIDATACTRL);
-        writel(0, host->base + MMCIMASK1);
+        mmci_set_mask1(host, 0);
         host->data = NULL;
 }
 
@@ -136,8 +209,251 @@ static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
         sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 }
 
+/*
+ * All the DMA operation mode stuff goes inside this ifdef.
+ * This assumes that you have a generic DMA device interface,
+ * no custom DMA interfaces are supported.
+ */
+#ifdef CONFIG_DMA_ENGINE
+static void __devinit mmci_dma_setup(struct mmci_host *host)
+{
+        struct mmci_platform_data *plat = host->plat;
+        const char *rxname, *txname;
+        dma_cap_mask_t mask;
+
+        if (!plat || !plat->dma_filter) {
+                dev_info(mmc_dev(host->mmc), "no DMA platform data\n");
+                return;
+        }
+
+        /* Try to acquire a generic DMA engine slave channel */
+        dma_cap_zero(mask);
+        dma_cap_set(DMA_SLAVE, mask);
+
+        /*
+         * If only an RX channel is specified, the driver will
+         * attempt to use it bidirectionally, however if it is
+         * is specified but cannot be located, DMA will be disabled.
+         */
+        if (plat->dma_rx_param) {
+                host->dma_rx_channel = dma_request_channel(mask,
+                                                           plat->dma_filter,
+                                                           plat->dma_rx_param);
+                /* E.g if no DMA hardware is present */
+                if (!host->dma_rx_channel)
+                        dev_err(mmc_dev(host->mmc), "no RX DMA channel\n");
+        }
+
+        if (plat->dma_tx_param) {
+                host->dma_tx_channel = dma_request_channel(mask,
+                                                           plat->dma_filter,
+                                                           plat->dma_tx_param);
+                if (!host->dma_tx_channel)
+                        dev_warn(mmc_dev(host->mmc), "no TX DMA channel\n");
+        } else {
+                host->dma_tx_channel = host->dma_rx_channel;
+        }
+
+        if (host->dma_rx_channel)
+                rxname = dma_chan_name(host->dma_rx_channel);
+        else
+                rxname = "none";
+
+        if (host->dma_tx_channel)
+                txname = dma_chan_name(host->dma_tx_channel);
+        else
+                txname = "none";
+
+        dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n",
+                 rxname, txname);
+
+        /*
+         * Limit the maximum segment size in any SG entry according to
+         * the parameters of the DMA engine device.
+         */
+        if (host->dma_tx_channel) {
+                struct device *dev = host->dma_tx_channel->device->dev;
+                unsigned int max_seg_size = dma_get_max_seg_size(dev);
+
+                if (max_seg_size < host->mmc->max_seg_size)
+                        host->mmc->max_seg_size = max_seg_size;
+        }
+        if (host->dma_rx_channel) {
+                struct device *dev = host->dma_rx_channel->device->dev;
+                unsigned int max_seg_size = dma_get_max_seg_size(dev);
+
+                if (max_seg_size < host->mmc->max_seg_size)
+                        host->mmc->max_seg_size = max_seg_size;
+        }
+}
+
+/*
+ * This is used in __devinit or __devexit so inline it
+ * so it can be discarded.
+ */
+static inline void mmci_dma_release(struct mmci_host *host)
+{
+        struct mmci_platform_data *plat = host->plat;
+
+        if (host->dma_rx_channel)
+                dma_release_channel(host->dma_rx_channel);
+        if (host->dma_tx_channel && plat->dma_tx_param)
+                dma_release_channel(host->dma_tx_channel);
+        host->dma_rx_channel = host->dma_tx_channel = NULL;
+}
+
+static void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data)
+{
+        struct dma_chan *chan = host->dma_current;
+        enum dma_data_direction dir;
+        u32 status;
+        int i;
+
+        /* Wait up to 1ms for the DMA to complete */
+        for (i = 0; ; i++) {
+                status = readl(host->base + MMCISTATUS);
+                if (!(status & MCI_RXDATAAVLBLMASK) || i >= 100)
+                        break;
+                udelay(10);
+        }
+
+        /*
+         * Check to see whether we still have some data left in the FIFO -
+         * this catches DMA controllers which are unable to monitor the
+         * DMALBREQ and DMALSREQ signals while allowing us to DMA to non-
+         * contiguous buffers.  On TX, we'll get a FIFO underrun error.
+         */
+        if (status & MCI_RXDATAAVLBLMASK) {
+                dmaengine_terminate_all(chan);
+                if (!data->error)
+                        data->error = -EIO;
+        }
+
+        if (data->flags & MMC_DATA_WRITE) {
+                dir = DMA_TO_DEVICE;
+        } else {
+                dir = DMA_FROM_DEVICE;
+        }
+
+        dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, dir);
+
+        /*
+         * Use of DMA with scatter-gather is impossible.
+         * Give up with DMA and switch back to PIO mode.
+         */
+        if (status & MCI_RXDATAAVLBLMASK) {
+                dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n");
+                mmci_dma_release(host);
+        }
+}
+
+static void mmci_dma_data_error(struct mmci_host *host)
+{
+        dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n");
+        dmaengine_terminate_all(host->dma_current);
+}
+
+static int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl)
+{
+        struct variant_data *variant = host->variant;
+        struct dma_slave_config conf = {
+                .src_addr = host->phybase + MMCIFIFO,
+                .dst_addr = host->phybase + MMCIFIFO,
+                .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
+                .dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
+                .src_maxburst = variant->fifohalfsize >> 2, /* # of words */
+                .dst_maxburst = variant->fifohalfsize >> 2, /* # of words */
+        };
+        struct mmc_data *data = host->data;
+        struct dma_chan *chan;
+        struct dma_device *device;
+        struct dma_async_tx_descriptor *desc;
+        int nr_sg;
+
+        host->dma_current = NULL;
+
+        if (data->flags & MMC_DATA_READ) {
+                conf.direction = DMA_FROM_DEVICE;
+                chan = host->dma_rx_channel;
+        } else {
+                conf.direction = DMA_TO_DEVICE;
+                chan = host->dma_tx_channel;
+        }
+
+        /* If there's no DMA channel, fall back to PIO */
+        if (!chan)
+                return -EINVAL;
+
+        /* If less than or equal to the fifo size, don't bother with DMA */
+        if (host->size <= variant->fifosize)
+                return -EINVAL;
+
+        device = chan->device;
+        nr_sg = dma_map_sg(device->dev, data->sg, data->sg_len, conf.direction);
+        if (nr_sg == 0)
+                return -EINVAL;
+
+        dmaengine_slave_config(chan, &conf);
+        desc = device->device_prep_slave_sg(chan, data->sg, nr_sg,
+                                            conf.direction, DMA_CTRL_ACK);
+        if (!desc)
+                goto unmap_exit;
+
+        /* Okay, go for it. */
+        host->dma_current = chan;
+
+        dev_vdbg(mmc_dev(host->mmc),
+                 "Submit MMCI DMA job, sglen %d blksz %04x blks %04x flags %08x\n",
+                 data->sg_len, data->blksz, data->blocks, data->flags);
+        dmaengine_submit(desc);
+        dma_async_issue_pending(chan);
+
+        datactrl |= MCI_DPSM_DMAENABLE;
+
+        /* Trigger the DMA transfer */
+        writel(datactrl, host->base + MMCIDATACTRL);
+
+        /*
+         * Let the MMCI say when the data is ended and it's time
+         * to fire next DMA request. When that happens, MMCI will
+         * call mmci_data_end()
+         */
+        writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK,
+               host->base + MMCIMASK0);
+        return 0;
+
+unmap_exit:
+        dmaengine_terminate_all(chan);
+        dma_unmap_sg(device->dev, data->sg, data->sg_len, conf.direction);
+        return -ENOMEM;
+}
+#else
+/* Blank functions if the DMA engine is not available */
+static inline void mmci_dma_setup(struct mmci_host *host)
+{
+}
+
+static inline void mmci_dma_release(struct mmci_host *host)
+{
+}
+
+static inline void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data)
+{
+}
+
+static inline void mmci_dma_data_error(struct mmci_host *host)
+{
+}
+
+static inline int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl)
+{
+        return -ENOSYS;
+}
+#endif
+
 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
 {
+        struct variant_data *variant = host->variant;
         unsigned int datactrl, timeout, irqmask;
         unsigned long long clks;
         void __iomem *base;
@@ -148,9 +464,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
 
         host->data = data;
         host->size = data->blksz * data->blocks;
-        host->data_xfered = 0;
-
-        mmci_init_sg(host, data);
+        data->bytes_xfered = 0;
 
         clks = (unsigned long long)data->timeout_ns * host->cclk;
         do_div(clks, 1000000000UL);
@@ -164,16 +478,33 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
         blksz_bits = ffs(data->blksz) - 1;
         BUG_ON(1 << blksz_bits != data->blksz);
 
-        datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
-        if (data->flags & MMC_DATA_READ) {
+        if (variant->blksz_datactrl16)
+                datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);
+        else
+                datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
+
+        if (data->flags & MMC_DATA_READ)
                 datactrl |= MCI_DPSM_DIRECTION;
+
+        /*
+         * Attempt to use DMA operation mode, if this
+         * should fail, fall back to PIO mode
+         */
+        if (!mmci_dma_start_data(host, datactrl))
+                return;
+
+        /* IRQ mode, map the SG list for CPU reading/writing */
+        mmci_init_sg(host, data);
+
+        if (data->flags & MMC_DATA_READ) {
                 irqmask = MCI_RXFIFOHALFFULLMASK;
 
                 /*
-                 * If we have less than a FIFOSIZE of bytes to transfer,
-                 * trigger a PIO interrupt as soon as any data is available.
+                 * If we have less than the fifo 'half-full' threshold to
+                 * transfer, trigger a PIO interrupt as soon as any data
+                 * is available.
                  */
-                if (host->size < MCI_FIFOSIZE)
+                if (host->size < variant->fifohalfsize)
                         irqmask |= MCI_RXDATAAVLBLMASK;
         } else {
                 /*
@@ -183,9 +514,14 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
                 irqmask = MCI_TXFIFOHALFEMPTYMASK;
         }
 
+        /* The ST Micro variants has a special bit to enable SDIO */
+        if (variant->sdio && host->mmc->card)
+                if (mmc_card_sdio(host->mmc->card))
+                        datactrl |= MCI_ST_DPSM_SDIOEN;
+
         writel(datactrl, base + MMCIDATACTRL);
         writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
-        writel(irqmask, base + MMCIMASK1);
+        mmci_set_mask1(host, irqmask);
 }
 
 static void
@@ -220,49 +556,58 @@ static void
 mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
               unsigned int status)
 {
-        if (status & MCI_DATABLOCKEND) {
-                host->data_xfered += data->blksz;
-#ifdef CONFIG_ARCH_U300
+        /* First check for errors */
+        if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
+                u32 remain, success;
+
+                /* Terminate the DMA transfer */
+                if (dma_inprogress(host))
+                        mmci_dma_data_error(host);
+
                 /*
-                 * On the U300 some signal or other is
-                 * badly routed so that a data write does
-                 * not properly terminate with a MCI_DATAEND
-                 * status flag. This quirk will make writes
-                 * work again.
+                 * Calculate how far we are into the transfer.  Note that
+                 * the data counter gives the number of bytes transferred
+                 * on the MMC bus, not on the host side.  On reads, this
+                 * can be as much as a FIFO-worth of data ahead.  This
+                 * matters for FIFO overruns only.
                  */
-                if (data->flags & MMC_DATA_WRITE)
-                        status |= MCI_DATAEND;
-#endif
-        }
-        if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
-                dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status);
-                if (status & MCI_DATACRCFAIL)
+                remain = readl(host->base + MMCIDATACNT);
+                success = data->blksz * data->blocks - remain;
+
+                dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n",
+                        status, success);
+                if (status & MCI_DATACRCFAIL) {
+                        /* Last block was not successful */
+                        success -= 1;
                         data->error = -EILSEQ;
-                else if (status & MCI_DATATIMEOUT)
+                } else if (status & MCI_DATATIMEOUT) {
                         data->error = -ETIMEDOUT;
-                else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
+                } else if (status & MCI_STARTBITERR) {
+                        data->error = -ECOMM;
+                } else if (status & MCI_TXUNDERRUN) {
+                        data->error = -EIO;
+                } else if (status & MCI_RXOVERRUN) {
+                        if (success > host->variant->fifosize)
+                                success -= host->variant->fifosize;
+                        else
+                                success = 0;
                         data->error = -EIO;
-                status |= MCI_DATAEND;
-
-                /*
-                 * We hit an error condition.  Ensure that any data
-                 * partially written to a page is properly coherent.
-                 */
-                if (data->flags & MMC_DATA_READ) {
-                        struct sg_mapping_iter *sg_miter = &host->sg_miter;
-                        unsigned long flags;
-
-                        local_irq_save(flags);
-                        if (sg_miter_next(sg_miter)) {
-                                flush_dcache_page(sg_miter->page);
-                                sg_miter_stop(sg_miter);
-                        }
-                        local_irq_restore(flags);
                 }
+                data->bytes_xfered = round_down(success, data->blksz);
         }
-        if (status & MCI_DATAEND) {
+
+        if (status & MCI_DATABLOCKEND)
+                dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n");
+
+        if (status & MCI_DATAEND || data->error) {
+                if (dma_inprogress(host))
+                        mmci_dma_unmap(host, data);
                 mmci_stop_data(host);
 
+                if (!data->error)
+                        /* The error clause is handled above, success! */
+                        data->bytes_xfered = data->blksz * data->blocks;
+
                 if (!data->stop) {
                         mmci_request_end(host, data->mrq);
                 } else {
@@ -279,15 +624,15 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
 
         host->cmd = NULL;
 
-        cmd->resp[0] = readl(base + MMCIRESPONSE0);
-        cmd->resp[1] = readl(base + MMCIRESPONSE1);
-        cmd->resp[2] = readl(base + MMCIRESPONSE2);
-        cmd->resp[3] = readl(base + MMCIRESPONSE3);
-
         if (status & MCI_CMDTIMEOUT) {
                 cmd->error = -ETIMEDOUT;
         } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
                 cmd->error = -EILSEQ;
+        } else {
+                cmd->resp[0] = readl(base + MMCIRESPONSE0);
+                cmd->resp[1] = readl(base + MMCIRESPONSE1);
+                cmd->resp[2] = readl(base + MMCIRESPONSE2);
+                cmd->resp[3] = readl(base + MMCIRESPONSE3);
         }
 
         if (!cmd->data || cmd->error) {
@@ -332,16 +677,43 @@ static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int rema
 
 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
 {
+        struct variant_data *variant = host->variant;
         void __iomem *base = host->base;
         char *ptr = buffer;
 
         do {
                 unsigned int count, maxcnt;
 
-                maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
+                maxcnt = status & MCI_TXFIFOEMPTY ?
+                         variant->fifosize : variant->fifohalfsize;
                 count = min(remain, maxcnt);
 
-                writesl(base + MMCIFIFO, ptr, count >> 2);
+                /*
+                 * The ST Micro variant for SDIO transfer sizes
+                 * less then 8 bytes should have clock H/W flow
+                 * control disabled.
+                 */
+                if (variant->sdio &&
+                    mmc_card_sdio(host->mmc->card)) {
+                        if (count < 8)
+                                writel(readl(host->base + MMCICLOCK) &
+                                        ~variant->clkreg_enable,
+                                        host->base + MMCICLOCK);
+                        else
+                                writel(readl(host->base + MMCICLOCK) |
+                                        variant->clkreg_enable,
+                                        host->base + MMCICLOCK);
+                }
+
+                /*
+                 * SDIO especially may want to send something that is
+                 * not divisible by 4 (as opposed to card sectors
+                 * etc), and the FIFO only accept full 32-bit writes.
+                 * So compensate by adding +3 on the count, a single
+                 * byte become a 32bit write, 7 bytes will be two
+                 * 32bit writes etc.
+                 */
+                writesl(base + MMCIFIFO, ptr, (count + 3) >> 2);
 
                 ptr += count;
                 remain -= count;
@@ -362,6 +734,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
 {
         struct mmci_host *host = dev_id;
         struct sg_mapping_iter *sg_miter = &host->sg_miter;
+        struct variant_data *variant = host->variant;
         void __iomem *base = host->base;
         unsigned long flags;
         u32 status;
@@ -406,9 +779,6 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
                 if (remain)
                         break;
 
-                if (status & MCI_RXACTIVE)
-                        flush_dcache_page(sg_miter->page);
-
                 status = readl(base + MMCISTATUS);
         } while (1);
 
@@ -417,11 +787,11 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
         local_irq_restore(flags);
 
         /*
-         * If we're nearing the end of the read, switch to
-         * "any data available" mode.
+         * If we have less than the fifo 'half-full' threshold to transfer,
+         * trigger a PIO interrupt as soon as any data is available.
          */
-        if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
-                writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
+        if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize)
+                mmci_set_mask1(host, MCI_RXDATAAVLBLMASK);
 
         /*
          * If we run out of data, disable the data IRQs; this
@@ -430,7 +800,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
          * stops us racing with our data end IRQ.
          */
         if (host->size == 0) {
-                writel(0, base + MMCIMASK1);
+                mmci_set_mask1(host, 0);
                 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
         }
 
@@ -453,6 +823,14 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
                 struct mmc_data *data;
 
                 status = readl(host->base + MMCISTATUS);
+
+                if (host->singleirq) {
+                        if (status & readl(host->base + MMCIMASK1))
+                                mmci_pio_irq(irq, dev_id);
+
+                        status &= ~MCI_IRQ1MASK;
+                }
+
                 status &= readl(host->base + MMCIMASK0);
                 writel(status, host->base + MMCICLEAR);
 
@@ -507,19 +885,27 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
         struct mmci_host *host = mmc_priv(mmc);
         u32 pwr = 0;
         unsigned long flags;
+        int ret;
 
         switch (ios->power_mode) {
         case MMC_POWER_OFF:
-                if(host->vcc &&
-                   regulator_is_enabled(host->vcc))
-                        regulator_disable(host->vcc);
+                if (host->vcc)
+                        ret = mmc_regulator_set_ocr(mmc, host->vcc, 0);
                 break;
         case MMC_POWER_UP:
-#ifdef CONFIG_REGULATOR
-                if (host->vcc)
-                        /* This implicitly enables the regulator */
-                        mmc_regulator_set_ocr(host->vcc, ios->vdd);
-#endif
+                if (host->vcc) {
+                        ret = mmc_regulator_set_ocr(mmc, host->vcc, ios->vdd);
+                        if (ret) {
+                                dev_err(mmc_dev(mmc), "unable to set OCR\n");
+                                /*
+                                 * The .set_ios() function in the mmc_host_ops
+                                 * struct return void, and failing to set the
+                                 * power should be rare so we print an error
+                                 * and return here.
+                                 */
+                                return;
+                        }
+                }
                 if (host->plat->vdd_handler)
                         pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd,
                                                        ios->power_mode);
@@ -564,18 +950,23 @@ static int mmci_get_ro(struct mmc_host *mmc)
         if (host->gpio_wp == -ENOSYS)
                 return -ENOSYS;
 
-        return gpio_get_value(host->gpio_wp);
+        return gpio_get_value_cansleep(host->gpio_wp);
 }
 
 static int mmci_get_cd(struct mmc_host *mmc)
 {
         struct mmci_host *host = mmc_priv(mmc);
+        struct mmci_platform_data *plat = host->plat;
         unsigned int status;
 
-        if (host->gpio_cd == -ENOSYS)
-                status = host->plat->status(mmc_dev(host->mmc));
-        else
-                status = !gpio_get_value(host->gpio_cd);
+        if (host->gpio_cd == -ENOSYS) {
+                if (!plat->status)
+                        return 1; /* Assume always present */
+
+                status = plat->status(mmc_dev(host->mmc));
+        } else
+                status = !!gpio_get_value_cansleep(host->gpio_cd)
+                        ^ plat->cd_invert;
 
         /*
          * Use positive logic throughout - status is zero for no card,
@@ -584,6 +975,15 @@ static int mmci_get_cd(struct mmc_host *mmc)
         return status;
 }
 
+static irqreturn_t mmci_cd_irq(int irq, void *dev_id)
+{
+        struct mmci_host *host = dev_id;
+
+        mmc_detect_change(host->mmc, msecs_to_jiffies(500));
+
+        return IRQ_HANDLED;
+}
+
 static const struct mmc_host_ops mmci_ops = {
         .request        = mmci_request,
         .set_ios        = mmci_set_ios,
@@ -591,7 +991,8 @@ static const struct mmc_host_ops mmci_ops = {
         .get_cd         = mmci_get_cd,
 };
 
-static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
+static int __devinit mmci_probe(struct amba_device *dev,
+        const struct amba_id *id)
 {
         struct mmci_platform_data *plat = dev->dev.platform_data;
         struct variant_data *variant = id->data;
@@ -620,6 +1021,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
 
         host->gpio_wp = -ENOSYS;
         host->gpio_cd = -ENOSYS;
+        host->gpio_cd_irq = -1;
 
         host->hw_designer = amba_manf(dev);
         host->hw_revision = amba_rev(dev);
@@ -653,6 +1055,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
                 dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n",
                         host->mclk);
         }
+        host->phybase = dev->res.start;
         host->base = ioremap(dev->res.start, resource_size(&dev->res));
         if (!host->base) {
                 ret = -ENOMEM;
@@ -699,13 +1102,11 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
         if (host->vcc == NULL)
                 mmc->ocr_avail = plat->ocr_mask;
         mmc->caps = plat->capabilities;
-        mmc->caps |= MMC_CAP_NEEDS_POLL;
 
         /*
          * We can do SGIO
          */
-        mmc->max_hw_segs = 16;
-        mmc->max_phys_segs = NR_SG;
+        mmc->max_segs = NR_SG;
 
         /*
          * Since only a certain number of bits are valid in the data length
@@ -744,6 +1145,20 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
                         host->gpio_cd = plat->gpio_cd;
                 else if (ret != -ENOSYS)
                         goto err_gpio_cd;
+
+                /*
+                 * A gpio pin that will detect cards when inserted and removed
+                 * will most likely want to trigger on the edges if it is
+                 * 0 when ejected and 1 when inserted (or mutatis mutandis
+                 * for the inverted case) so we request triggers on both
+                 * edges.
+                 */
+                ret = request_any_context_irq(gpio_to_irq(plat->gpio_cd),
+                                mmci_cd_irq,
+                                IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+                                DRIVER_NAME " (cd)", host);
+                if (ret >= 0)
+                        host->gpio_cd_irq = gpio_to_irq(plat->gpio_cd);
         }
         if (gpio_is_valid(plat->gpio_wp)) {
                 ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)");
@@ -755,23 +1170,35 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
                         goto err_gpio_wp;
         }
 
+        if ((host->plat->status || host->gpio_cd != -ENOSYS)
+            && host->gpio_cd_irq < 0)
+                mmc->caps |= MMC_CAP_NEEDS_POLL;
+
         ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
         if (ret)
                 goto unmap;
 
-        ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host);
-        if (ret)
-                goto irq0_free;
+        if (dev->irq[1] == NO_IRQ)
+                host->singleirq = true;
+        else {
+                ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED,
+                                  DRIVER_NAME " (pio)", host);
+                if (ret)
+                        goto irq0_free;
+        }
 
         writel(MCI_IRQENABLE, host->base + MMCIMASK0);
 
         amba_set_drvdata(dev, mmc);
 
-        mmc_add_host(mmc);
+        dev_info(&dev->dev, "%s: PL%03x manf %x rev%u at 0x%08llx irq %d,%d (pio)\n",
+                 mmc_hostname(mmc), amba_part(dev), amba_manf(dev),
+                 amba_rev(dev), (unsigned long long)dev->res.start,
+                 dev->irq[0], dev->irq[1]);
 
-        dev_info(&dev->dev, "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
-                mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
-                (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
+        mmci_dma_setup(host);
+
+        mmc_add_host(mmc);
 
         return 0;
 
@@ -781,6 +1208,8 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
         if (host->gpio_wp != -ENOSYS)
                 gpio_free(host->gpio_wp);
  err_gpio_wp:
+        if (host->gpio_cd_irq >= 0)
+                free_irq(host->gpio_cd_irq, host);
         if (host->gpio_cd != -ENOSYS)
                 gpio_free(host->gpio_cd);
  err_gpio_cd:
@@ -814,11 +1243,15 @@ static int __devexit mmci_remove(struct amba_device *dev)
                 writel(0, host->base + MMCICOMMAND);
                 writel(0, host->base + MMCIDATACTRL);
 
+                mmci_dma_release(host);
                 free_irq(dev->irq[0], host);
-                free_irq(dev->irq[1], host);
+                if (!host->singleirq)
+                        free_irq(dev->irq[1], host);
 
                 if (host->gpio_wp != -ENOSYS)
                         gpio_free(host->gpio_wp);
+                if (host->gpio_cd_irq >= 0)
+                        free_irq(host->gpio_cd_irq, host);
                 if (host->gpio_cd != -ENOSYS)
                         gpio_free(host->gpio_cd);
 
@@ -826,8 +1259,8 @@ static int __devexit mmci_remove(struct amba_device *dev)
                 clk_disable(host->clk);
                 clk_put(host->clk);
 
-                if (regulator_is_enabled(host->vcc))
-                        regulator_disable(host->vcc);
+                if (host->vcc)
+                        mmc_regulator_set_ocr(mmc, host->vcc, 0);
                 regulator_put(host->vcc);
 
                 mmc_free_host(mmc);
@@ -878,10 +1311,15 @@ static int mmci_resume(struct amba_device *dev)
 static struct amba_id mmci_ids[] = {
         {
                 .id     = 0x00041180,
-                .mask   = 0x000fffff,
+                .mask   = 0xff0fffff,
                 .data   = &variant_arm,
         },
         {
+                .id     = 0x01041180,
+                .mask   = 0xff0fffff,
+                .data   = &variant_arm_extended_fifo,
+        },
+        {
                 .id     = 0x00041181,
                 .mask   = 0x000fffff,
                 .data   = &variant_arm,
@@ -899,9 +1337,14 @@ static struct amba_id mmci_ids[] = {
         },
         {
                 .id     = 0x00480180,
-                .mask   = 0x00ffffff,
+                .mask   = 0xf0ffffff,
                 .data   = &variant_ux500,
         },
+        {
+                .id     = 0x10480180,
+                .mask   = 0xf0ffffff,
+                .data   = &variant_ux500v2,
+        },
         { 0, 0 },
 };