litmus-rt.git - The LITMUS^RT kernel.

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author	Linus Torvalds <torvalds@woody.linux-foundation.org>	2007-11-26 22:18:22 -0500
committer	Linus Torvalds <torvalds@woody.linux-foundation.org>	2007-11-26 22:18:22 -0500
commit	6d272940537e834848d88c11b428e9973b8fa2bc (patch)
tree	f01b6d173c62e5f9daeb50937ff6d1d17e4320f6 /drivers/misc/thinkpad_acpi.h
parent	f4d53cedce872fe1439818d15e067b497b5d466f (diff)
parent	e190222d04cb1119c62876ac87cf9b9403ba3bd5 (diff)

Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (21 commits) libata: bump transfer chunk size if it's odd libata: Return proper ATA INT status in pata_bf54x driver pata_ali: trim trailing whitespace (fix checkpatch complaints) pata_isapnp: Polled devices pata_hpt37x: Fix cable detect bug spotted by Sergei pata_ali: Lots of problems still showing up with small ATAPI DMA pata_ali: Add Mitac 8317 and derivatives libata-core: List more documentation sources for reference ata_piix: Invalid use of writel/readl with iomap sata_sil24: fix sg table sizing pata_jmicron: fix disabled port handling in jmicron_pre_reset() pata_sil680: kill bogus reset code (take 2) ata_piix: port enable for the first SATA controller of ICH8 is 0xf not 0x3 ata_piix: only enable the first port on apple macbook pro ata_piix: reorganize controller IDs pata_sis.c: Add Packard Bell EasyNote K5305 to laptops libata-scsi: be tolerant of 12-byte ATAPI commands in 16-byte CDBs libata: use ATA_HORKAGE_STUCK_ERR for ATAPI tape drives libata: workaround DRQ=1 ERR=1 for ATAPI tape drives libata: remove unused functions ...

Diffstat (limited to 'drivers/misc/thinkpad_acpi.h')

0 files changed, 0 insertions, 0 deletions

/* * sata_promise.c - Promise SATA * * Maintained by: Jeff Garzik <jgarzik@pobox.com> * Mikael Pettersson <mikpe@it.uu.se> * Please ALWAYS copy linux-ide@vger.kernel.org * on emails. * * Copyright 2003-2004 Red Hat, Inc. * * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING. If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. * * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/DocBook/libata.* * * Hardware information only available under NDA. * */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/init.h> #include <linux/blkdev.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/device.h> #include <scsi/scsi.h> #include <scsi/scsi_host.h> #include <scsi/scsi_cmnd.h> #include <linux/libata.h> #include "sata_promise.h" #define DRV_NAME "sata_promise" #define DRV_VERSION "2.12" enum { PDC_MAX_PORTS = 4, PDC_MMIO_BAR = 3, PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */ /* register offsets */ PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */ PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */ PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */ PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */ PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */ PDC_DEVICE = 0x18, /* Device/Head reg (per port) */ PDC_COMMAND = 0x1C, /* Command/status reg (per port) */ PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */ PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ PDC_FLASH_CTL = 0x44, /* Flash control register */ PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ /* PDC_GLOBAL_CTL bit definitions */ PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */ PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */ PDC_DH_ERR = (1 << 10), /* PCI error while loading data */ PDC2_HTO_ERR = (1 << 12), /* host bus timeout */ PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */ PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */ PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */ PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */ PDC_DRIVE_ERR = (1 << 21), /* drive error */ PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */ PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */ PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR, PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR, PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR | PDC1_ERR_MASK | PDC2_ERR_MASK, board_2037x = 0, /* FastTrak S150 TX2plus */ board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */ board_20319 = 2, /* FastTrak S150 TX4 */ board_20619 = 3, /* FastTrak TX4000 */ board_2057x = 4, /* SATAII150 Tx2plus */ board_2057x_pata = 5, /* SATAII150 Tx2plus PATA port */ board_40518 = 6, /* SATAII150 Tx4 */ PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ /* Sequence counter control registers bit definitions */ PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */ /* Feature register values */ PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */ PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */ /* Device/Head register values */ PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */ /* PDC_CTLSTAT bit definitions */ PDC_DMA_ENABLE = (1 << 7), PDC_IRQ_DISABLE = (1 << 10), PDC_RESET = (1 << 11), /* HDMA reset */ PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING, /* ap->flags bits */ PDC_FLAG_GEN_II = (1 << 24), PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */ PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */ }; struct pdc_port_priv { u8 *pkt; dma_addr_t pkt_dma; }; static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int pdc_common_port_start(struct ata_port *ap); static int pdc_sata_port_start(struct ata_port *ap); static void pdc_qc_prep(struct ata_queued_cmd *qc); static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); static int pdc_check_atapi_dma(struct ata_queued_cmd *qc); static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc); static void pdc_irq_clear(struct ata_port *ap); static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); static void pdc_freeze(struct ata_port *ap); static void pdc_sata_freeze(struct ata_port *ap); static void pdc_thaw(struct ata_port *ap); static void pdc_sata_thaw(struct ata_port *ap); static void pdc_pata_error_handler(struct ata_port *ap); static void pdc_sata_error_handler(struct ata_port *ap); static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); static int pdc_pata_cable_detect(struct ata_port *ap); static int pdc_sata_cable_detect(struct ata_port *ap); static struct scsi_host_template pdc_ata_sht = { ATA_BASE_SHT(DRV_NAME), .sg_tablesize = PDC_MAX_PRD, .dma_boundary = ATA_DMA_BOUNDARY, }; static const struct ata_port_operations pdc_common_ops = { .inherits = &ata_sff_port_ops, .tf_load = pdc_tf_load_mmio, .exec_command = pdc_exec_command_mmio, .check_atapi_dma = pdc_check_atapi_dma, .qc_prep = pdc_qc_prep, .qc_issue = pdc_qc_issue_prot, .irq_clear = pdc_irq_clear, .post_internal_cmd = pdc_post_internal_cmd, }; static struct ata_port_operations pdc_sata_ops = { .inherits = &pdc_common_ops, .cable_detect = pdc_sata_cable_detect, .freeze = pdc_sata_freeze, .thaw = pdc_sata_thaw, .error_handler = pdc_sata_error_handler, .scr_read = pdc_sata_scr_read, .scr_write = pdc_sata_scr_write, .port_start = pdc_sata_port_start, }; /* First-generation chips need a more restrictive ->check_atapi_dma op */ static struct ata_port_operations pdc_old_sata_ops = { .inherits = &pdc_sata_ops, .check_atapi_dma = pdc_old_sata_check_atapi_dma, }; static struct ata_port_operations pdc_pata_ops = { .inherits = &pdc_common_ops, .cable_detect = pdc_pata_cable_detect, .freeze = pdc_freeze, .thaw = pdc_thaw, .error_handler = pdc_pata_error_handler, .port_start = pdc_common_port_start, }; static const struct ata_port_info pdc_port_info[] = { [board_2037x] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | PDC_FLAG_SATA_PATA, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_old_sata_ops, }, [board_2037x_pata] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_pata_ops, }, [board_20319] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | PDC_FLAG_4_PORTS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_old_sata_ops, }, [board_20619] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | PDC_FLAG_4_PORTS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_pata_ops, }, [board_2057x] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_sata_ops, }, [board_2057x_pata] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | PDC_FLAG_GEN_II, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_pata_ops, }, [board_40518] = { .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &pdc_sata_ops, }, }; static const struct pci_device_id pdc_ata_pci_tbl[] = { { PCI_VDEVICE(PROMISE, 0x3371), board_2037x }, { PCI_VDEVICE(PROMISE, 0x3373), board_2037x }, { PCI_VDEVICE(PROMISE, 0x3375), board_2037x }, { PCI_VDEVICE(PROMISE, 0x3376), board_2037x }, { PCI_VDEVICE(PROMISE, 0x3570), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3571), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3574), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3577), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x }, { PCI_VDEVICE(PROMISE, 0x3318), board_20319 }, { PCI_VDEVICE(PROMISE, 0x3319), board_20319 }, { PCI_VDEVICE(PROMISE, 0x3515), board_40518 }, { PCI_VDEVICE(PROMISE, 0x3519), board_40518 }, { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 }, { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 }, { PCI_VDEVICE(PROMISE, 0x6629), board_20619 }, { } /* terminate list */ };


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