diff options
author | Paul Parsons <lost.distance@yahoo.com> | 2012-04-10 19:35:34 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-05-01 06:00:22 -0400 |
commit | 2fe372fc2a037c8de0c721b45cd0e4e9c8d8c25e (patch) | |
tree | 26a25dcc10e86203adf981c280ed325b606c8921 /drivers/mfd | |
parent | 1baf665b8167c0ab1240e76b1eae647d5ab60b23 (diff) |
mfd: Avoid unbalanced asic3 irq wakeup enables/disables
The mfd/asic3 driver does not currently define a irq_set_wake() handler.
Consequently any attempt to configure the 3 ASIC3 GPIO buttons - RECORD,
CALENDAR, HOME - as wakeup sources results in Unbalanced IRQ warnings
when the system is woken from sleep mode:
WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 342 wake disable
...
WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 337 wake disable
...
WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 339 wake disable
...
This patch adds a irq_set_wake() handler to the mfd/asic3 driver.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/asic3.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 4c3ec8113e7e..9d4a492e4295 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c | |||
@@ -353,12 +353,28 @@ static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type) | |||
353 | return 0; | 353 | return 0; |
354 | } | 354 | } |
355 | 355 | ||
356 | static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on) | ||
357 | { | ||
358 | struct asic3 *asic = irq_data_get_irq_chip_data(data); | ||
359 | u32 bank, index; | ||
360 | u16 bit; | ||
361 | |||
362 | bank = asic3_irq_to_bank(asic, data->irq); | ||
363 | index = asic3_irq_to_index(asic, data->irq); | ||
364 | bit = 1<<index; | ||
365 | |||
366 | asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on); | ||
367 | |||
368 | return 0; | ||
369 | } | ||
370 | |||
356 | static struct irq_chip asic3_gpio_irq_chip = { | 371 | static struct irq_chip asic3_gpio_irq_chip = { |
357 | .name = "ASIC3-GPIO", | 372 | .name = "ASIC3-GPIO", |
358 | .irq_ack = asic3_mask_gpio_irq, | 373 | .irq_ack = asic3_mask_gpio_irq, |
359 | .irq_mask = asic3_mask_gpio_irq, | 374 | .irq_mask = asic3_mask_gpio_irq, |
360 | .irq_unmask = asic3_unmask_gpio_irq, | 375 | .irq_unmask = asic3_unmask_gpio_irq, |
361 | .irq_set_type = asic3_gpio_irq_type, | 376 | .irq_set_type = asic3_gpio_irq_type, |
377 | .irq_set_wake = asic3_gpio_irq_set_wake, | ||
362 | }; | 378 | }; |
363 | 379 | ||
364 | static struct irq_chip asic3_irq_chip = { | 380 | static struct irq_chip asic3_irq_chip = { |